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4b87091acf019ea915c08da77701cc9beaba78f4
llvm-project/llvm/test/CodeGen/AArch64
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Florian Hahn 4b87091acf [SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (#154148) 
SCEVExpander's builder already uses InstSimplifyFolder. Use it to
construct binary ops via CreateBinOp instead of BinaryOperator::Create.

This helps to simplify away a few more instructions during SCEV
expansion.

PR: https://github.com/llvm/llvm-project/pull/154148
2026-04-25 17:08:20 +01:00
..
Atomics
[GISel] Disable opt_brcond_by_inverting_cond combine at O0 (#193417)
2026-04-24 09:11:23 +01:00
GlobalISel
[GIsel] Add constant-folding for bit-counting ops (#194010)
2026-04-24 20:06:44 -07:00
2s-complement-asm.ll
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16bit-float-promotion-with-nofp.ll
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128bit_load_store.ll
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a55-fuse-address.mir
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a57-csel.ll
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aarch64_be-global-const.ll
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aarch64_be-shuffle-vector.ll
[AArch64] Fix shufflevector miscompilation on aarch64_be (#193076)
2026-04-23 09:27:17 +00:00
aarch64_f16_be.ll
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aarch64_fnmadd.ll
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aarch64_tree_tests.ll
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aarch64_win64cc_vararg.ll
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aarch64-2014-08-11-MachineCombinerCrash.ll
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aarch64-2014-12-02-combine-soften.ll
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aarch64-a57-fp-load-balancing.ll
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aarch64-address-type-promotion-assertion.ll
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aarch64-address-type-promotion.ll
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aarch64-addv.ll
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aarch64-avoid-illegal-extract-subvector.ll
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aarch64-be-bv.ll
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aarch64-bf16-dotprod-intrinsics.ll
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aarch64-bf16-ldst-intrinsics.ll
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aarch64-bif-gen.ll
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aarch64-bit-gen.ll
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aarch64-bitwisenot-fold.ll
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aarch64-bswap-ext.ll
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aarch64-checkMergeStoreCandidatesForDependencies.ll
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aarch64-codegen-prepare-atp.ll
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aarch64-combine-add-sub-mul.ll
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aarch64-combine-add-zext.ll
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aarch64-combine-fmul-fsub.mir
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aarch64-combine-gather-lanes-limit-size.mir
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aarch64-combine-gather-lanes-with-call.mir
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aarch64-combine-gather-lanes.mir
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aarch64-condopt-cross-block-different-regs.mir
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aarch64-condopt-nzcvdef.mir
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aarch64-condopt-unsigned.mir
[AArch64] ConditionOptimizer: modify intra-block path to use tryOptimizePair (#188643)
2026-03-26 12:23:33 +00:00
aarch64-DAGCombine-findBetterNeighborChains-crash.ll
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aarch64-dup-dot-crash.ll
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aarch64-dup-ext-crash.ll
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aarch64-dup-ext-scalable.ll
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aarch64-dup-ext-vectortype-crash.ll
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aarch64-dup-ext.ll
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aarch64-dup-extract-scalable.ll
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aarch64-dynamic-stack-layout.ll
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aarch64-fastcc-stackup.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
aarch64-fix-cortex-a53-835769.ll
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aarch64-fixup-statepoint-regs-crash.ll
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aarch64-fold-lslfast.ll
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aarch64-gep-opt.ll
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aarch64-histcnt-dag-combine-hang.ll
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aarch64-icmp-opt.ll
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aarch64-inline-asm-bitcast-crash.ll
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aarch64-insert-subvector-undef.ll
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aarch64-interleaved-access-w-undef.ll
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aarch64-interleaved-ld-combine.ll
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aarch64-isel-csinc-type.ll
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aarch64-isel-csinc.ll
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aarch64-isel-umin.ll
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aarch64-known-bits-hadd.ll
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aarch64-large-stack-spbump.mir
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aarch64-ldst-modified-baseReg.mir
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aarch64-ldst-no-premature-sp-pop.mir
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aarch64-ldst-opt-instr-ref.mir
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aarch64-ldst-subsuperReg-no-ldp.mir
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aarch64-load-ext.ll
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aarch64-loop-gep-opt.ll
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aarch64-lsr-bfi.ll
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aarch64-matmul-fp16.ll
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aarch64-matmul-fp32.ll
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aarch64-matmul.ll
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aarch64-matrix-umull-smull.ll
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aarch64-mcpu-oryon-runtime-unroll.ll
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aarch64-minmaxv.ll
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aarch64-mixed-ptr-sizes.ll
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aarch64-mops-consecutive.ll
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aarch64-mops-mte.ll
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aarch64-mops.ll
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aarch64-mov-debug-locs.mir
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aarch64-mull-masks.ll
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aarch64-mulv.ll
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aarch64-named-reg-w18.ll
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aarch64-named-reg-x18.ll
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aarch64-neon-faminmax.ll
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aarch64-neon-vector-insert-uaddlv.ll
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aarch64-p2align-max-bytes-neoverse.ll
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aarch64-p2align-max-bytes.ll
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aarch64-pmull2.ll
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aarch64-post-coalescer.mir
[NewPM] Adds a port for AArch64PostCoalescerPass (#189520)
2026-04-01 19:18:18 -07:00
aarch64-reassociate-accumulators-sve.ll
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aarch64-reassociate-accumulators.ll
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aarch64-saturating-arithmetic.ll
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aarch64-scal-to-vec-bitcast-insert.ll
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aarch64-scalarize-vec-load-ext.ll
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aarch64-sched-store.ll
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aarch64-signedreturnaddress.ll
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aarch64-smax-constantfold.ll
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aarch64-sme2-asm.ll
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
aarch64-sme-stubs.ll
[compiler-rt] Don't provide __arm_sme_state for baremetal targets (#191434)
2026-04-20 10:00:18 +01:00
aarch64-sme-za-call-lowering.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
aarch64-smov-gen.ll
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aarch64-smull.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
aarch64-split-logic-bitmask-immediate.ll
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aarch64-stp-cluster.ll
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aarch64-sve2-faminmax.ll
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aarch64-sve-and-combine-crash.ll
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aarch64-sve-asm-negative.ll
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aarch64-sve-asm.ll
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
aarch64-sve-fill-spill-pair.ll
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aarch64-sve-ldst-one.ll
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aarch64-sve-setcc-promote-nxv8i8-crash.ll
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aarch64-swp-ws-live-intervals-1.mir
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aarch64-swp-ws-live-intervals.mir
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aarch64-sys-intrinsic.ll
[AArch64][llvm] Remove support for FEAT_MPAMv2_VID (#193191)
2026-04-24 12:01:32 +01:00
aarch64-sysreg128.ll
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aarch64-tail-dup-size.ll
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aarch64-tbz.ll
[GISel] Disable opt_brcond_by_inverting_cond combine at O0 (#193417)
2026-04-24 09:11:23 +01:00
aarch64-tensorflow-isel-regression.ll
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aarch64-tls-flags.ll
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aarch64-tryBitfieldInsertOpFromOr-crash.ll
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aarch64-unroll-and-jam.ll
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aarch64-uzp1-combine.ll
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aarch64-v1f32-arg.ll
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aarch64-vcvtfp2fxs-combine.ll
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aarch64-vector-pcs.mir
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aarch64-vectorcombine-invalid-extract-index-crash.ll
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aarch64-vuzp.ll
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aarch64-wide-mul.ll
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aarch64-wide-shuffle.ll
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aarch64-za-clobber.ll
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
aarch64st1.mir
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aarch-multipart.ll
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abd-combine.ll
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abds-neg.ll
[SDAG][abd] Combine abd of small types (#181538)
2026-03-31 13:40:51 +00:00
abds.ll
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abdu-neg.ll
[SDAG][abd] Combine abd of small types (#181538)
2026-03-31 13:40:51 +00:00
abdu.ll
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abs.ll
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active_lane_mask.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
adc.ll
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add-extract.ll
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add-i256.ll
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add-negative.ll
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add.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
addcarry-crash.ll
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addg_subg.mir
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addimm-mulimm.ll
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addp-shuffle.ll
[AArch64] Extend testing of add-like-ors. NFC (#193071)
2026-04-20 21:11:08 +01:00
addr-of-ret-addr.ll
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addrsig-macho.ll
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adds_cmn.ll
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addsub_ext.ll
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addsub-24bit-imm.mir
[NewPM] Adds a port for AArch64MIPeepholeOpt (#187515)
2026-03-20 09:17:34 -07:00
addsub-constant-folding.ll
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addsub-shifted-reg-cheap-as-move.ll
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addsub-shifted.ll
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addsub.ll
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addtruncshift.ll
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aes.ll
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aggressive-interleaving.ll
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alias_mask_i128.ll
[IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (#188248)
2026-04-24 07:21:11 +01:00
alias_mask_nosve.ll
[IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (#188248)
2026-04-24 07:21:11 +01:00
alias_mask_scalable_nosve2.ll
[IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (#188248)
2026-04-24 07:21:11 +01:00
alias_mask_scalable.ll
[IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (#188248)
2026-04-24 07:21:11 +01:00
alias_mask.ll
[IR] Remove pointer arguments from loop.dependence.{war|raw}.mask (#188248)
2026-04-24 07:21:11 +01:00
align-down.ll
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alloca-load-store-scalable-array.ll
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alloca-load-store-scalable-struct.ll
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alloca-oversized.ll
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alloca.ll
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allow-check.ll
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ampere1-sched-add.mir
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analyze-branch.ll
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analyzecmp.ll
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and-mask-removal.ll
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and-mask-variable.ll
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and-sink.ll
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andandshift.ll
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andcompare.ll
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andorbrcompare.ll
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andorxor.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
apple-latest-cpu.ll
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apply-disjoint-flag-in-dagcombine.ll
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apply-terminal-rule.mir
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arc-contract-claim-rv.ll
[ObjCARC] Run ObjCARCContract before PreISelIntrinsicLowering (#184149)
2026-03-27 15:37:47 +00:00
arg_promotion.ll
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argument-blocks-array-of-struct.ll
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argument-blocks.ll
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arithmetic_fence.ll
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arm64_32-addrs.ll
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arm64_32-atomics.ll
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arm64_32-fastisel.ll
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arm64_32-frame-pointers.ll
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arm64_32-gep-sink.ll
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arm64_32-indexed-memory.ll
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arm64_32-memcpy.ll
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arm64_32-neon.ll
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arm64_32-null.ll
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arm64_32-pointer-extend.ll
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arm64_32-stack-pointers.ll
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arm64_32-tls.ll
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arm64_32-va.ll
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arm64_32.ll
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arm64-2011-03-09-CPSRSpill.ll
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arm64-2011-03-17-AsmPrinterCrash.ll
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arm64-2011-03-21-Unaligned-Frame-Index.ll
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arm64-2011-04-21-CPSRBug.ll
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arm64-2011-10-18-LdStOptBug.ll
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arm64-2012-01-11-ComparisonDAGCrash.ll
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arm64-2012-05-07-DAGCombineVectorExtract.ll
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arm64-2012-05-07-MemcpyAlignBug.ll
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arm64-2012-05-09-LOADgot-bug.ll
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arm64-2012-05-22-LdStOptBug.ll
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arm64-2012-06-06-FPToUI.ll
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arm64-2012-07-11-InstrEmitterBug.ll
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arm64-2013-01-13-ffast-fcmp.ll
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arm64-2013-01-23-frem-crash.ll
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arm64-2013-01-23-sext-crash.ll
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arm64-2013-02-12-shufv8i8.ll
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arm64-aapcs-be.ll
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arm64-aapcs.ll
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arm64-abi_align.ll
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arm64-abi-hfa-args.ll
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arm64-abi-varargs.ll
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arm64-abi.ll
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arm64-addp.ll
[AArch64] Extend testing of add-like-ors. NFC (#193071)
2026-04-20 21:11:08 +01:00
arm64-addr-mode-folding.ll
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arm64-addr-type-promotion.ll
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arm64-addrmode.ll
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arm64-AdvSIMD-Scalar.ll
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arm64-alloc-no-stack-realign.ll
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arm64-alloca-frame-pointer-offset.ll
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arm64-andCmpBrToTBZ.ll
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arm64-ands-bad-peephole.ll
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arm64-AnInfiniteLoopInDAGCombine.ll
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arm64-anyregcc-crash.ll
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arm64-anyregcc.ll
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arm64-arith-saturating.ll
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arm64-arith.ll
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arm64-arm64-dead-def-elimination-flag.ll
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arm64-assert-zext-sext.ll
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arm64-atomic-128.ll
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arm64-atomic.ll
[AArch64][CodeGen] match (or x (not y)) to generate mov+orn (#191145)
2026-04-09 10:05:31 +00:00
arm64-bcc.ll
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arm64-big-endian-bitconverts.ll
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arm64-big-endian-eh.ll
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arm64-big-endian-varargs.ll
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arm64-big-endian-vector-callee.ll
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arm64-big-endian-vector-caller.ll
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arm64-big-imm-offsets.ll
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arm64-big-stack.ll
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arm64-bitfield-extract.ll
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arm64-blockaddress.ll
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arm64-break.ll
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arm64-build-vector.ll
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arm64-builtins-linux.ll
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arm64-call-tailcalls.ll
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arm64-cast-opt.ll
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arm64-ccmp-heuristics.ll
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arm64-ccmp.ll
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arm64-clrsb.ll
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arm64-coalesce-ext.ll
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arm64-coalescing-MOVi32imm.ll
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arm64-code-model-large-darwin.ll
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arm64-codegen-prepare-extload.ll
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arm64-collect-loh-garbage-crash.ll
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arm64-collect-loh-str.ll
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arm64-collect-loh.ll
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arm64-complex-ret.ll
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arm64-const-addr.ll
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arm64-constrained-fcmp-no-nans-opt.ll
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arm64-convert-v4f64.ll
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arm64-copy-phys-zero-reg.mir
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arm64-copy-tuple.ll
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arm64-crc32.ll
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arm64-crypto.ll
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arm64-cse.ll
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arm64-csel.ll
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arm64-csldst-mmo.ll
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arm64-custom-call-saved-reg.ll
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arm64-cvt-bitcast.ll
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arm64-cvt-simd-fptoi-strictfp.ll
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arm64-cvt-simd-fptoi.ll
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arm64-cvt-simd-intrinsics.ll
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arm64-cvt-simd-round-rint-strictfp.ll
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arm64-cvt-simd-round-rint.ll
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arm64-cvt.ll
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arm64-cvtf-simd-itofp.ll
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arm64-dagcombiner-convergence.ll
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arm64-dagcombiner-dead-indexed-load.ll
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arm64-dagcombiner-load-slicing.ll
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arm64-darwin-cc.ll
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arm64-dead-def-frame-index.ll
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arm64-dead-register-def-bug.ll
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arm64-detect-vec-redux.ll
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arm64-dup.ll
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arm64-early-ifcvt.ll
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arm64-elf-calls.ll
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arm64-elf-constpool.ll
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arm64-EXT-undef-mask.ll
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arm64-ext.ll
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arm64-extend-int-to-fp.ll
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arm64-extend.ll
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arm64-extload-knownzero.ll
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arm64-extract_subvector.ll
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arm64-extract-insert-varidx.ll
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arm64-extract.ll
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arm64-fast-isel-addr-offset.ll
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arm64-fast-isel-alloca.ll
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arm64-fast-isel-br.ll
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arm64-fast-isel-call.ll
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arm64-fast-isel-conversion-fallback.ll
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arm64-fast-isel-conversion.ll
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arm64-fast-isel-crc32.ll
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arm64-fast-isel-fcmp.ll
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arm64-fast-isel-gv.ll
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arm64-fast-isel-icmp.ll
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arm64-fast-isel-indirectbr.ll
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arm64-fast-isel-intrinsic.ll
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arm64-fast-isel-materialize.ll
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arm64-fast-isel-noconvert.ll
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arm64-fast-isel-rem.ll
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arm64-fast-isel-ret.ll
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arm64-fast-isel-store.ll
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arm64-fast-isel-tag.ll
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arm64-fast-isel.ll
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arm64-fastcc-tailcall.ll
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arm64-fastisel-gep-promote-before-add.ll
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arm64-fcmp-opt.ll
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arm64-fcopysign.ll
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arm64-fixed-point-scalar-cvt-dagcombine.ll
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arm64-fma-combine-with-fpfusion.ll
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arm64-fma-combines.ll
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arm64-fmadd.ll
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arm64-fmax-safe.ll
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arm64-fmax.ll
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arm64-fminv.ll
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arm64-fml-combines.ll
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arm64-fmuladd.ll
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arm64-fold-address.ll
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arm64-fold-lshr.ll
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arm64-fold-lsl.ll
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arm64-fp128-folding.ll
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arm64-fp128.ll
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arm64-fp-contract-zero.ll
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arm64-fp-imm-size.ll
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arm64-fp-imm.ll
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arm64-fp.ll
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arm64-fpcr.ll
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arm64-fpenv.ll
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arm64-frame-index.ll
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arm64-global-address.ll
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arm64-hello.ll
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arm64-hlt.ll
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arm64-homogeneous-prolog-epilog-bad-outline.mir
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arm64-homogeneous-prolog-epilog-frame-tail.ll
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arm64-homogeneous-prolog-epilog-no-helper.ll
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arm64-homogeneous-prolog-epilog-odd-csrs.ll
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arm64-homogeneous-prolog-epilog-tail-call.mir
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arm64-homogeneous-prolog-epilog.ll
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arm64-i16-subreg-extract.ll
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arm64-icmp-opt.ll
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arm64-indexed-memory.ll
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arm64-indexed-vector-ldst-2.ll
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arm64-indexed-vector-ldst.ll
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arm64-inline-asm-error-I.ll
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arm64-inline-asm-error-J.ll
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arm64-inline-asm-error-K.ll
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arm64-inline-asm-error-L.ll
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arm64-inline-asm-error-M.ll
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arm64-inline-asm-error-N.ll
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arm64-inline-asm-zero-reg-error.ll
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arm64-inline-asm.ll
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arm64-instruction-mix-remarks.ll
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arm64-int-neon.ll
[AArch64][GlobalISel] Add patterns for scalar sqdmlal/sqdmlsl (#187246)
2026-04-07 10:34:10 +01:00
arm64-isel-or.ll
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arm64-join-reserved.ll
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arm64-jumptable.ll
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arm64-large-frame.ll
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arm64-ld1.ll
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arm64-ld-from-st.ll
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arm64-ldp-aa.ll
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arm64-ldp-cluster.ll
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arm64-ldp.ll
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arm64-ldst-unscaled-pre-post.mir
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arm64-ldur.ll
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arm64-ldxr-stxr.ll
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arm64-leaf.ll
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arm64-long-shift.ll
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arm64-memcpy-inline.ll
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arm64-memset-inline.ll
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arm64-memset-to-bzero-pgso.ll
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arm64-memset-to-bzero.ll
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arm64-misaligned-memcpy-inline.ll
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arm64-misched-basic-A53.ll
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arm64-misched-basic-A57.ll
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arm64-misched-forwarding-A53.ll
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arm64-misched-memdep-bug.ll
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arm64-misched-multimmo.ll
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arm64-movi.ll
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arm64-mte.ll
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arm64-mul.ll
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arm64-named-reg-alloc.ll
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arm64-named-reg-notareg.ll
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arm64-narrow-st-merge.ll
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arm64-neg.ll
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arm64-neon-2velem-high.ll
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arm64-neon-2velem.ll
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arm64-neon-3vdiff.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
arm64-neon-aba-abd.ll
[GlobalISel] Add G_ABDU and G_ABDS to computeKnownBits. (#186822)
2026-03-20 17:08:14 +00:00
arm64-neon-across.ll
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arm64-neon-add-pairwise.ll
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arm64-neon-add-sub.ll
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arm64-neon-copy.ll
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arm64-neon-copyPhysReg-tuple.ll
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arm64-neon-mul-div-cte.ll
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arm64-neon-mul-div.ll
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arm64-neon-scalar-by-elem-mul.ll
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arm64-neon-select_cc.ll
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arm64-neon-simd-ldst-one.ll
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arm64-neon-simd-shift.ll
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arm64-neon-simd-vget.ll
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arm64-neon-st-lane-aa.ll
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arm64-neon-v1i1-setcc.ll
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arm64-neon-v8.1a.ll
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arm64-neon-vector-list-spill.ll
…
arm64-neon-vector-shuffle-extract.ll
…
arm64-non-pow2-ldst.ll
…
arm64-nvcast.ll
…
arm64-opt-remarks-lazy-bfi.ll
…
arm64-patchpoint-scratch-regs.ll
…
arm64-patchpoint.ll
…
arm64-pic-local-symbol.ll
…
arm64-platform-reg.ll
…
arm64-popcnt.ll
…
arm64-prefetch-addrmode.ll
…
arm64-prefetch-ir.ll
…
arm64-prefetch-new.ll
…
arm64-prefetch.ll
…
arm64-preserve-all.ll
…
arm64-preserve-most.ll
…
arm64-promote-const-complex-initializers.ll
…
arm64-promote-const.ll
…
arm64-raddhn-combine.ll
…
arm64-redzone.ll
…
arm64-reg-copy-noneon.ll
…
arm64-register-offset-addressing.ll
…
arm64-register-pairing.ll
…
arm64-regress-f128csel-flags.ll
…
arm64-regress-interphase-shift.ll
…
arm64-regress-opt-cmp-signed.mir
…
arm64-regress-opt-cmp.mir
…
arm64-reserve-call-saved-reg.ll
…
arm64-reserved-arg-reg-call-error.ll
…
arm64-return-vector.ll
…
arm64-returnaddr.ll
…
arm64-rev.ll
…
arm64-rounding.ll
…
arm64-saddlp1d-uaddlp1d.mir
…
arm64-scaled_iv.ll
…
arm64-scvt.ll
…
arm64-setcc-int-to-fp-combine.ll
…
arm64-setcc-swap-infloop.ll
…
arm64-shifted-sext.ll
…
arm64-shrink-v1i64.ll
…
arm64-shrink-wrapping.ll
…
arm64-simd-scalar-to-vector.ll
…
arm64-simplest-elf.ll
…
arm64-sincos.ll
…
arm64-sitofp-combine-chains.ll
…
arm64-sli-sri-opt.ll
…
arm64-smaxv.ll
…
arm64-sminv.ll
…
arm64-spill-lr.ll
…
arm64-spill-remarks-treshold-hotness.ll
…
arm64-spill-remarks.ll
…
arm64-spill.ll
…
arm64-sqshl-uqshl-i64Contant.ll
…
arm64-srl-and.ll
…
arm64-st1.ll
…
arm64-stack-no-frame.ll
…
arm64-stackmap-nops.ll
…
arm64-stackmap.ll
…
arm64-stackpointer.ll
…
arm64-stacksave.ll
…
arm64-storebytesmerge.ll
…
arm64-stp-aa.ll
…
arm64-stp.ll
…
arm64-strict-align.ll
…
arm64-stur.ll
[AArch64] Add tablegen patterns for store of high-half. (#190320)
2026-04-13 17:24:14 +01:00
arm64-subsections.ll
…
arm64-subvector-extend.ll
…
arm64-summary-remarks.ll
…
arm64-swizzle-tbl-i16-layout.ll
…
arm64-tbl.ll
…
arm64-this-return.ll
[AArch64][GISel] Update and regenerate arm64-this-return.ll (#191515)
2026-04-10 21:32:58 +01:00
arm64-tls-darwin.ll
…
arm64-tls-dynamic-together.ll
…
arm64-tls-dynamics.ll
…
arm64-tls-initial-exec.ll
…
arm64-tls-local-exec.ll
…
arm64-trap.ll
…
arm64-triv-disjoint-mem-access.ll
…
arm64-trn.ll
…
arm64-trunc-store.ll
…
arm64-umaxv.ll
…
arm64-uminv.ll
…
arm64-umov.ll
…
arm64-unaligned_ldst.ll
…
arm64-uzp2-combine.ll
…
arm64-uzp.ll
…
arm64-vaargs.ll
…
arm64-vabs.ll
…
arm64-vadd.ll
…
arm64-vaddlv.ll
…
arm64-vaddv.ll
…
arm64-variadic-aapcs.ll
…
arm64-vbitwise.ll
…
arm64-vcmp.ll
…
arm64-vcnt.ll
…
arm64-vcombine.ll
…
arm64-vcvt_f32_su32.ll
…
arm64-vcvt_f.ll
…
arm64-vcvt_n.ll
…
arm64-vcvt_su32_f32.ll
…
arm64-vcvt-fptoi.ll
[LLVM][CodeGen][AArch64] Replace tablegen based lowering of vector half/bfloat operations. (#190164)
2026-04-08 11:28:25 +01:00
arm64-vcvt.ll
…
arm64-vcvtxd_f32_f64.ll
…
arm64-vecCmpBr.ll
…
arm64-vecFold.ll
…
arm64-vector-ext.ll
…
arm64-vector-imm.ll
…
arm64-vector-insertion.ll
…
arm64-vector-ldst.ll
…
arm64-vext_reverse.ll
…
arm64-vext.ll
…
arm64-vhadd.ll
[AArch64] Add more scalar testing for hadd patterns. NFC (#193313)
2026-04-21 21:39:03 +01:00
arm64-vhsub.ll
…
arm64-virtual_base.ll
…
arm64-vmax.ll
…
arm64-vminmaxnm.ll
…
arm64-vmovn.ll
…
arm64-vmul.ll
[AArch64] Addition tests for add_like Or of smlal/umlal. NFC (#194138)
2026-04-25 13:53:33 +01:00
arm64-volatile.ll
…
arm64-vqadd.ll
…
arm64-vqsub.ll
…
arm64-vselect.ll
…
arm64-vsetcc_fp.ll
…
arm64-vshift.ll
…
arm64-vshr.ll
…
arm64-vshuffle.ll
…
arm64-vsqrt.ll
…
arm64-vsra.ll
…
arm64-vsub.ll
…
arm64-weak-reference.ll
…
arm64-windows-calls.ll
…
arm64-windows-tailcall.ll
…
arm64-xaluo.ll
…
arm64-zero-cycle-regmove-fpr8.mir
…
arm64-zero-cycle-regmove-fpr.ll
…
arm64-zero-cycle-regmove-gpr.ll
…
arm64-zero-cycle-zeroing-fpr.ll
…
arm64-zero-cycle-zeroing-gpr.ll
…
arm64-zeroreg.ll
…
arm64-zext.ll
…
arm64-zextload-unscaled.ll
…
arm64-zip.ll
[AArch64][GlobalISel] Fix nonterminating legalization for <8 x s4> vectors. (#192747)
2026-04-17 14:49:01 -07:00
arm64ec-alias.ll
…
arm64ec-available-externally.ll
…
arm64ec-builtins.ll
…
arm64ec-dllimport.ll
…
arm64ec-dont-call.ll
…
arm64ec-eh.ll
…
arm64ec-empty-name.ll
…
arm64ec-entry-thunks-local-linkage.ll
…
arm64ec-entry-thunks.ll
…
arm64ec-exit-thunks.ll
…
arm64ec-hybrid-patchable.ll
…
arm64ec-indirect-call.ll
…
arm64ec-reservedregs.ll
…
arm64ec-symbols.ll
…
arm64ec-varargs.ll
…
asm-large-immediate.ll
…
asm-ld1-wrong-constraint.ll
…
asm-print-comments.ll
…
asm-srcloc.ll
…
assertion-rc-mismatch.ll
…
atomic-ops-ldapr.ll
…
atomic-ops-lse.ll
…
atomic-ops-not-barriers.ll
…
atomic-ops.ll
…
atomic-oversize.ll
…
atomicrmw-cond-sub-clamp.ll
…
atomicrmw-fadd.ll
…
atomicrmw-fmax.ll
…
atomicrmw-fmin.ll
…
atomicrmw-fsub.ll
…
atomicrmw-O0.ll
[AArch64][CodeGen] match (or x (not y)) to generate mov+orn (#191145)
2026-04-09 10:05:31 +00:00
atomicrmw-uinc-udec-wrap.ll
…
atomicrmw-xchg-fp.ll
…
autoupgrade-aarch64-neon-addp-float.ll
…
avg.ll
…
avoid-free-ext-promotion.ll
Revert "[SimplifyCFG] Extend jump-threading to allow live local defs … (#190269)
2026-04-02 23:05:26 +00:00
avoid-pre-trunc.ll
…
avoid-zero-copy.mir
…
basic-block-sections-cold.ll
…
basic-block-sections-unsafe.ll
…
basic-pic.ll
…
bcax.ll
…
bcmp-inline-small.ll
Move ExpandMemCmp and MergeIcmp to the middle end (#77370)
2026-04-02 09:57:00 +02:00
bcmp.ll
Move ExpandMemCmp and MergeIcmp to the middle end (#77370)
2026-04-02 09:57:00 +02:00
bf16_fast_math.ll
…
bf16-convert-intrinsics.ll
…
bf16-imm.ll
…
bf16-instructions.ll
[AArch64][GlobalISel] Add fpext bf16 legalization. (#193342)
2026-04-23 08:24:34 +01:00
bf16-select.ll
…
bf16-shuffle.ll
…
bf16-v4-instructions.ll
[AArch64][GlobalISel] Add fpext bf16 legalization. (#193342)
2026-04-23 08:24:34 +01:00
bf16-v8-instructions.ll
[AArch64][GlobalISel] Add a variant of gi_extract_high_v8bf16 (#193345)
2026-04-24 11:14:17 +00:00
bf16-vector-bitcast.ll
…
bf16-vector-shuffle.ll
…
bf16.ll
…
bfis-in-loop.ll
…
bics.ll
…
big-callframe.ll
…
bisect-post-ra-machine-sink.mir
…
bit-test.ll
…
bitcast_truncstore.ll
…
bitcast-extend.ll
[AArch64][GlobalISel] FP Info implementation for AArch64. (#177158)
2026-04-20 09:38:16 +01:00
bitcast-promote-widen.ll
…
bitcast-v2i8.ll
…
bitcast.ll
[AArch64][GISel] Clamp bitcast to v2i64 (#191360)
2026-04-13 11:26:29 +01:00
bitcnt-i256.ll
…
bitfield-extract.ll
…
bitfield-insert-0.ll
…
bitfield-insert.ll
…
bitfield.ll
…
bitreverse.ll
…
block-placement-optimize-branches.ll
…
blockaddress.ll
…
blr-bti-preserves-operands.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
bool-ext-inc.ll
…
bool-loads.ll
…
br-cond-not-merge.ll
…
br-to-eh-lpad.ll
…
br-undef-cond.ll
…
branch-cond-split-fcmp.ll
…
branch-folder-merge-mmos.ll
…
branch-folder-oneinst.mir
…
branch-on-bool.ll
[AArch64] Normalize (bool CC 1) to (bool NewCC 0) in LowerBR_CC (#189380)
2026-04-07 21:03:10 +01:00
branch-relax-alignment.ll
…
branch-relax-asm.ll
…
branch-relax-b.ll
…
branch-relax-bcc.ll
…
branch-relax-block-size.mir
…
branch-relax-cbz.ll
…
branch-relax-cross-section.mir
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
branch-relax-xray.ll
…
branch-target-enforcement-indirect-calls.ll
…
breg.ll
…
bsl.ll
…
bsp_implicit_ops.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
bswap-known-bits.ll
[DAGCombiner] Fold bswap of single-byte-known-nonzero value to a shift (#193473)
2026-04-23 17:34:13 +02:00
bswap.ll
[AArch64] Select REV16 for zext(bswap(i16)) (#189576)
2026-04-02 11:32:39 +01:00
bti-branch-relaxation.ll
…
bti-ehpad.ll
…
bti-linkage.ll
…
build-attributes-all.ll
…
build-attributes-bti.ll
…
build-attributes-gcs.ll
…
build-attributes-pac.ll
…
build-attributes-pauthabi.ll
…
build-one-lane.ll
…
build-pair-isel.ll
…
build-vector-dup-simd-nnan.ll
…
build-vector-dup-simd.ll
…
build-vector-extract.ll
…
build-vector-to-extract-subvec-crash.ll
…
build-vector-two-dup.ll
…
byval-type.ll
…
call-rv-marker.ll
…
callbr-asm-label-bti.ll
…
callbr-asm-label.ll
…
callbr-asm-obj-file.ll
…
callbr-asm-outputs-indirect-isel.ll
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
callee-save.ll
…
calleetypeid-directcall-mismatched.ll
…
callsite-emit-calleetypeid-tailcall.ll
…
callsite-emit-calleetypeid.ll
…
cbz_wzr.mir
[NewPM] Port AArch64RedundantCondBranch to the new pass manager (#190897)
2026-04-17 16:45:08 -07:00
ccmp-cse.ll
…
ccmp-look-through-copy.mir
[NewPM] Adds a port for AArch64ConditionalComparesPass (#192755)
2026-04-18 18:59:11 +00:00
ccmp-successor-probs.mir
[NewPM] Adds a port for AArch64ConditionalComparesPass (#192755)
2026-04-18 18:59:11 +00:00
cfguard-arm64ec.ll
…
cfguard-checks.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
cfguard-module-flag.ll
[win] Add a flag to control the Control Flow Guard mechanism on Windows (#176276)
2026-04-14 08:56:47 -07:00
cfi_restore.mir
…
cfi-fixup-multi-block-prologue.mir
…
cfi-fixup-multi-section.mir
…
cfi-fixup.ll
…
cfi-fixup.mir
…
cfi-sync-async.ll
…
cfinv-def-nzcv.mir
…
cfinv-use-nzcv.mir
…
cgdata-global-hash.ll
…
cgdata-merge-crash.ll
…
cgdata-merge-gvar-nsconst.ll
…
cgdata-merge-gvar-objc.ll
…
cgdata-merge-gvar-string.ll
…
cgdata-merge-local.ll
…
cgdata-merge-no-params.ll
…
cgdata-merge-preserve-entry-count.ll
…
cgdata-no-merge-attached-call-garget.ll
…
cgdata-no-merge-unnamed.ll
…
cgdata-outline-gvar.ll
…
cgdata-outlined-name.ll
…
cgdata-read-double-outline.ll
…
cgdata-read-lto-outline.ll
…
cgdata-read-priority.ll
…
cgdata-read-single-outline-suffix.ll
…
cgdata-read-single-outline.ll
…
cgdata-write-outline.ll
…
cgp-trivial-phi-node.ll
…
cgp-usubo.ll
…
cheap-as-a-move.ll
…
check-sign-bit-before-extension.ll
…
chkstk.ll
…
clear-dead-implicit-def-impdef.ll
…
clear-dead-implicit-def-impdef.mir
…
clmul-fixed.ll
…
clmul-scalable.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
clmul.ll
…
cls.ll
[GISel] Keep non-negative info in SUB(CTLZ) (#189314)
2026-03-30 22:10:47 +02:00
cluster-frame-index.mir
…
cmp-bool.ll
…
cmp-chains.ll
…
cmp-const-max.ll
…
cmp-frameindex.ll
…
cmp-i256.ll
…
cmp-select-sign.ll
…
cmp-to-cmn.ll
…
cmpbr-branch-relaxation.mir
…
cmpbr-early-ifcvt.mir
…
cmpbr-reg-imm-at-bounds.ll
…
cmpbr-reg-imm.ll
…
cmpbr-reg-reg.ll
…
cmpbr-zext-sext.ll
…
cmpwithshort.ll
…
cmpxchg-idioms.ll
…
cmpxchg-lse-even-regs.ll
…
cmpxchg-O0.ll
…
coalescer-drop-subreg-to-reg-imm-ops.mir
…
code-model-large.ll
…
code-model-tiny-abs.ll
…
combine_andor_with_cmps.ll
…
combine-and-like.ll
…
combine-andintoload.ll
…
combine-comparisons-by-cse.ll
…
combine-mul.ll
…
combine-sdiv.ll
…
combine-storetomstore.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
commandline-metadata.ll
…
compare-branch.ll
…
compiler-ident.ll
…
complex-copy-noneon.ll
…
complex-deinterleaving-add-mull-fixed-contract.ll
…
complex-deinterleaving-add-mull-fixed-fast.ll
…
complex-deinterleaving-add-mull-scalable-contract.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
complex-deinterleaving-add-mull-scalable-fast.ll
…
complex-deinterleaving-cdot.ll
…
complex-deinterleaving-crash.ll
…
complex-deinterleaving-f16-add-scalable.ll
…
complex-deinterleaving-f16-add.ll
…
complex-deinterleaving-f16-mul-scalable.ll
…
complex-deinterleaving-f16-mul.ll
…
complex-deinterleaving-f32-add-scalable.ll
…
complex-deinterleaving-f32-add.ll
…
complex-deinterleaving-f32-mul-scalable.ll
…
complex-deinterleaving-f32-mul.ll
…
complex-deinterleaving-f64-add-scalable.ll
…
complex-deinterleaving-f64-add.ll
…
complex-deinterleaving-f64-mul-scalable.ll
…
complex-deinterleaving-f64-mul.ll
…
complex-deinterleaving-i8-add-scalable.ll
…
complex-deinterleaving-i16-add-scalable.ll
…
complex-deinterleaving-i16-mul-scalable.ll
…
complex-deinterleaving-i32-add-scalable.ll
…
complex-deinterleaving-i32-mul-scalable.ll
…
complex-deinterleaving-i64-add-scalable.ll
…
complex-deinterleaving-i64-mul-scalable.ll
…
complex-deinterleaving-mixed-cases.ll
…
complex-deinterleaving-multiuses.ll
…
complex-deinterleaving-opt-crash-178671.ll
…
complex-deinterleaving-opt-crash.ll
…
complex-deinterleaving-reductions-predicated-scalable.ll
[LV][NFC] Rename PreferPredicateOverEpilogue to TailFoldingPolicy (#191803)
2026-04-20 16:29:51 +01:00
complex-deinterleaving-reductions-scalable.ll
[AArch64][SVE] Prefer FMOV for scalar insert into first element of zero. (#187236)
2026-03-19 08:48:14 +00:00
complex-deinterleaving-reductions.ll
…
complex-deinterleaving-splat-scalable.ll
…
complex-deinterleaving-splat.ll
…
complex-deinterleaving-symmetric-fixed.ll
…
complex-deinterleaving-symmetric-scalable.ll
…
complex-deinterleaving-uniform-cases.ll
…
complex-deinterleaving-unrolled-cdot.ll
…
complex-fp-to-int.ll
…
complex-int-to-fp.ll
…
compute-call-frame-size-unreachable-pass.ll
…
concat_vector-scalar-combine.ll
…
concat_vector-truncate-combine.ll
…
concat_vector-truncated-scalar-combine.ll
…
concat-vector-add-combine.ll
…
concat-vector.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
concatbinop.ll
…
cond-br-tuning-instr-ref.mir
…
cond-br-tuning.ll
…
cond-sel-value-prop.ll
…
cond-sel.ll
…
consecutive-stores-of-faddv.ll
…
const-isel.ll
…
const-shift-of-constmasked.ll
…
const-vector-big-endian.ll
…
constant-pool-partition.ll
…
consthoist-gep.ll
…
convert-highly-predictable-select-to-branch.ll
…
convertphitype.ll
…
copyprop.ll
…
copyprop.mir
…
cpa-globalisel.ll
[GISel] Disable opt_brcond_by_inverting_cond combine at O0 (#193417)
2026-04-24 09:11:23 +01:00
cpa-selectiondag.ll
…
cpus.ll
…
csel-andor-onebit.ll
…
csel-cmp-cse.ll
…
csel-subs-swapped.ll
…
csel-zero-float.ll
…
csinc-cmp-removal.mir
…
csr-copy-hint.mir
…
csr-split.ll
…
ctlo.ll
…
ctlz_zero_undef.ll
…
ctlz.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
ctpop-nonean.ll
…
ctpop.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
cttz.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
custom-sections.ll
…
cvt-fp-int-fp.ll
…
cxx-tlscc.ll
…
dag-combine-concat-vectors.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
dag-combine-freeze.ll
…
dag-combine-insert-subvector.ll
…
dag-combine-invaraints.ll
…
dag-combine-lifetime-end-store-typesize.ll
…
dag-combine-mul-shl.ll
…
dag-combine-select.ll
…
dag-combine-setcc.ll
Move ExpandMemCmp and MergeIcmp to the middle end (#77370)
2026-04-02 09:57:00 +02:00
dag-combine-trunc-build-vec.ll
…
dag-numsignbits.ll
…
dag-ReplaceAllUsesOfValuesWith.ll
[DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) (#162242)
2026-04-21 12:53:33 +00:00
DAGCombine_vscale.ll
…
darwinpcs-tail.ll
…
dbg-assign-tag-offset-mix-loc.ll
…
dbg-assign-tag-offset.ll
…
dbg-declare-swift-async.ll
…
dbg-declare-tag-offset.ll
…
dbg-value-swift-async-non-entry-block.ll
…
dbg-value-swift-async.ll
…
dbg-value-tag-offset.ll
…
deactivation-symbols.ll
…
debug-info-sve-dbg-declare.mir
…
debug-info-sve-dbg-value.mir
…
debug-info-sve-pair.mir
…
debugtrap.ll
…
directcond.ll
…
div_minsize.ll
…
div-i256.ll
…
div-rem-pair-recomposition-signed.ll
…
div-rem-pair-recomposition-unsigned.ll
…
divrem.ll
…
dllexport.ll
…
dllimport.ll
…
dont-shrink-wrap-stack-mayloadorstore.mir
…
dont-take-over-the-world.ll
…
double_reduct.ll
…
dp1.ll
…
dp2.ll
…
dp-3source.ll
…
dso_local_equivalent.ll
…
dump-reserved-cycles.mir
…
dump-schedule-trace.mir
…
dup-ext-load-combine.ll
…
dup.ll
[AArch64][GlobalISel] Fix nonterminating legalization for <8 x s4> vectors. (#192747)
2026-04-17 14:49:01 -07:00
duplane-index-patfrags.ll
…
dwarf-cfi.ll
…
dwarf-eh-prepare-dbg.ll
…
dynamic-regmask-preserve-none.ll
…
early-ifcvt-likely-predictable.mir
…
early-ifcvt-load-to-cond-br.mir
…
early-ifcvt-on-double-killed-reg.mir
…
early-ifcvt-regclass-mismatch.mir
…
early-ifcvt-remarks.mir
…
early-ifcvt-same-value.mir
…
eh_recoverfp.ll
…
ehcontguard.ll
…
elf-globals-pic.ll
…
elf-globals-static.ll
…
elf-preemption.ll
…
elim-dead-mi.mir
…
eliminate-trunc.ll
…
emit_fneg_with_non_register_operand.mir
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
emit-prologue-clobber-verification.mir
…
emutls_alias.ll
…
emutls_generic.ll
…
emutls.ll
Fix emulated TLS alignment for large variables (#171037)
2026-03-31 09:37:06 -07:00
eon.ll
…
eor3.ll
…
exception-handling-windows-elf.ll
…
execute-only-empty.ll
…
execute-only-section.ll
…
exp10-libcall-names.ll
…
expand-blr-rvmarker-pseudo.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
expand-constructive-zzi.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
expand-load-got-pseudo.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
expand-movi-renamable.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
expand-select.ll
…
expand-sme-pseudos.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
expand-subs-pseudo.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
expand-vector-rot.ll
…
ext-narrow-index.ll
…
extbinopload.ll
…
extend_inreg_of_concat_subvectors.ll
…
extend_vecreduce_add.ll
…
extern-weak.ll
…
extra-callee-save.mir
…
extract-bits.ll
…
extract-insert.ll
…
extract-lowbits.ll
…
extract-sext-zext.ll
…
extract-subvec-combine.ll
…
extract-vector-cmp.ll
…
extract-vector-elt-sve.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
extract-vector-elt.ll
…
extract.ll
…
extractvector-of-load.mir
…
extractvector-oob-load.mir
…
f16-imm.ll
…
f16-instructions.ll
…
f16-neon-intrinsics.ll
…
f16f32dot-fixed-length-fdot.ll
[AArch64] Fix codegen for FEAT_F16F32DOT with SVE2/SME. (#192668)
2026-04-17 16:42:27 +01:00
fabd-no-neon.ll
…
fabs-combine.ll
…
fabs-fp128.ll
…
fabs.ll
…
fadd-combines.ll
…
faddp-half.ll
[LLVM][CodeGen][AArch64] Replace tablegen based lowering of vector half/bfloat operations. (#190164)
2026-04-08 11:28:25 +01:00
faddp.ll
[AArch64] Extend testing of add-like-ors. NFC (#193071)
2026-04-20 21:11:08 +01:00
faddsub.ll
…
faddv-fp16.ll
…
faddv.ll
…
falkor-hwpf-fix.ll
…
falkor-hwpf-fix.mir
…
falkor-hwpf.ll
…
fast-isel-address-extends.ll
…
fast-isel-addressing-modes.ll
…
fast-isel-assume.ll
…
fast-isel-atomic-fallback.ll
…
fast-isel-atomic.ll
…
fast-isel-branch_weights.ll
…
fast-isel-branch-cond-mask.ll
…
fast-isel-branch-cond-split.ll
…
fast-isel-call-return.ll
…
fast-isel-call-struct-return-fallback.ll
…
fast-isel-call-struct-return.ll
…
fast-isel-cbz.ll
…
fast-isel-cmp-branch.ll
…
fast-isel-cmp-vec.ll
…
fast-isel-cmpxchg.ll
…
fast-isel-const-float.ll
…
fast-isel-dbg.ll
…
fast-isel-erase.ll
…
fast-isel-folded-shift.ll
…
fast-isel-folding.ll
…
fast-isel-fpimm.ll
…
fast-isel-gep.ll
…
fast-isel-int-ext2.ll
…
fast-isel-int-ext3.ll
…
fast-isel-int-ext4.ll
…
fast-isel-int-ext5.ll
…
fast-isel-int-ext.ll
…
fast-isel-intrinsic.ll
…
fast-isel-logic-op.ll
…
fast-isel-memcpy.ll
…
fast-isel-mul.ll
…
fast-isel-runtime-libcall.ll
…
fast-isel-sdiv.ll
…
fast-isel-select.ll
…
fast-isel-shift.ll
…
fast-isel-sp-adjust.ll
…
fast-isel-sqrt.ll
…
fast-isel-switch-phi.ll
…
fast-isel-tail-call.ll
…
fast-isel-tbz.ll
…
fast-isel-trunc.ll
…
fast-isel-vector-arithmetic.ll
…
fast-isel-vret.ll
…
fast-regalloc-empty-bb-with-liveins.mir
…
fastcc-reserved.ll
…
fastcc.ll
…
fastisel-debugvalue-undef.ll
…
fcmp-fp128.ll
…
fcmp.ll
…
fcopysign-noneon.ll
…
fcopysign.ll
…
fcsel-zero.ll
…
fcvt_combine.ll
[LLVM][CodeGen][AArch64] Replace tablegen based lowering of vector half/bfloat operations. (#190164)
2026-04-08 11:28:25 +01:00
fcvt-fixed.ll
…
fcvt-i256.ll
…
fcvt-int.ll
…
fcvt.ll
…
fdiv-combine.ll
…
fdiv-const.ll
…
fdiv.ll
…
fence-singlethread.ll
…
fexplog.ll
…
fixed_masked_deinterleaved_loads.ll
…
fixed_masked_interleaved_stores.ll
…
fixed-expanding-load.ll
[AArch64] Lower masked.expandload intrinsic using SVE2p2/SME2p2 EXPAND (#190999)
2026-04-20 11:06:34 +01:00
fixed-length-bf16-arith.ll
…
fixed-point-conv-vec-pat.ll
…
fixed-vector-deinterleave.ll
[AArch64][ISel] Add lowering for fixed-width deinterleave3 (#192972)
2026-04-22 15:49:24 +01:00
fixed-vector-interleave.ll
[AArch64][Isel] Add lowering for fixed-width interleave3 (#192677)
2026-04-20 14:13:30 +01:00
fjcvtzs.ll
…
fjcvtzs.mir
…
flags-multiuse.ll
…
float-conv-elim.ll
…
floatdp_1source.ll
…
floatdp_2source.ll
…
fma-fneg-combine.ll
…
fmaximum-legalization.ll
…
fminimummaximum.ll
…
fminmax.ll
…
fminp-fmaxp.ll
…
fmla.ll
[LLVM][CodeGen][AArch64] Replace tablegen based lowering of vector half/bfloat operations. (#190164)
2026-04-08 11:28:25 +01:00
fmlal-loreg.ll
…
fmov-imm-licm.ll
…
fmul.ll
…
fneg.ll
…
fnmul.ll
…
fold-constants.ll
…
fold-csel-cttz-and.ll
…
fold-global-offsets.ll
…
fold-int-pow2-with-fmul-or-fdiv.ll
…
fold-sext-in-reg-predicate-fixed-length.ll
…
force-enable-intervals.mir
…
fp8-neon-fdot.ll
…
fp8-neon-fmla.ll
…
fp8-sme2-cvtn.ll
…
fp8-sve-cvt-cvtlt.ll
…
fp8-sve-cvtn.ll
…
fp8-sve-fdot.ll
…
fp8-sve-fmla.ll
…
fp16_fast_math.ll
…
fp16_intrinsic_lane.ll
…
fp16_intrinsic_scalar_1op.ll
…
fp16_intrinsic_scalar_2op.ll
…
fp16_intrinsic_scalar_3op.ll
…
fp16_intrinsic_vector_1op.ll
…
fp16_intrinsic_vector_2op.ll
…
fp16_intrinsic_vector_3op.ll
…
fp16-fmla.ll
…
fp16-v4-instructions.ll
…
fp16-v8-instructions.ll
…
fp16-v16-instructions.ll
…
fp16-vector-bitcast.ll
…
fp16-vector-load-store.ll
…
fp16-vector-nvcast.ll
…
fp16-vector-shuffle.ll
…
fp128-folding.ll
…
fp-cond-sel.ll
…
fp-const-fold.ll
…
fp-conversion-to-tbl.ll
…
fp-dp3.ll
…
fp-fcanonicalize.ll
…
fp-intrinsics-fp16.ll
…
fp-intrinsics-vector.ll
…
fp-intrinsics.ll
…
fp-maximumnum-minimumnum.ll
…
fp-to-int-to-fp.ll
…
fp-veclib-expansion.ll
…
fpclamptosat_vec.ll
…
fpclamptosat.ll
…
fpconv-vector-op-scalarize.ll
…
fpenv.ll
…
fpext.ll
…
fpimm.ll
…
fpmode.ll
…
fpow.ll
…
fpowi.ll
…
fprcvt-cvtf.ll
…
fptoi-256.ll
…
fptoi.ll
…
fptosi-sat-scalar.ll
…
fptosi-sat-vector.ll
…
fptosi-strictfp.ll
…
fptoui-sat-scalar.ll
…
fptoui-sat-vector.ll
…
fptouint-i8-zext.ll
…
fptrunc.ll
…
frameaddr.ll
…
framelayout-fp-csr.ll
…
framelayout-fpr128-csr.ll
…
framelayout-fpr128-spill.mir
…
framelayout-frame-record.mir
…
framelayout-offset-immediate-change.mir
…
framelayout-scavengingslot-stack-hazard.mir
…
framelayout-scavengingslot.mir
…
framelayout-split-sve.mir
…
framelayout-sve-basepointer.mir
…
framelayout-sve-calleesaves-fix.mir
…
framelayout-sve-fixed-width-access.mir
…
framelayout-sve-scavengingslot.mir
…
framelayout-sve-win.mir
…
framelayout-sve.mir
…
framelayout-unaligned-fp.ll
…
free-zext.ll
…
freeze.ll
…
frem-power2.ll
…
frem.ll
…
frexp-arm64ec.ll
…
frintn.ll
…
fsh-combiner-disabled.ll
…
fsh.ll
…
fsincos.ll
…
fsqrt.ll
…
ftrunc.ll
…
func-argpassing.ll
…
func-calls.ll
…
func-sanitizer.ll
…
funclet-local-stack-size.ll
…
funclet-match-add-sub-stack.ll
…
funcptr_cast.ll
…
function-info-noredzone-present.ll
…
function-subtarget-features.ll
…
funnel-shift-rot.ll
…
funnel-shift.ll
…
fuse-addr-mode.mir
…
gcs-intrinsics.ll
…
gep-nullptr.ll
…
get_vector_length.ll
…
get-active-lane-mask-extract.ll
…
ghc-cc.ll
…
global-alignment.ll
…
global-merge-1.ll
…
global-merge-2.ll
…
global-merge-3.ll
…
global-merge-4.ll
…
global-merge-external.ll
…
global-merge-group-by-use.ll
…
global-merge-hidden-minsize.ll
…
global-merge-ignore-single-use-minsize.ll
…
global-merge-ignore-single-use.ll
…
global-merge-minsize.ll
…
global-merge-profile-sections.ll
…
global-merge.ll
…
got-abuse.ll
…
gpr_cttz.ll
…
graalcc.ll
…
hadd-combine-scalar.ll
[AArch64] Add more scalar testing for hadd patterns. NFC (#193313)
2026-04-21 21:39:03 +01:00
hadd-combine.ll
[AArch64][GlobalISel] Add hadd-combine globalisel test coverage. NFC (#193591)
2026-04-22 21:54:24 +01:00
half-precision-signof-no-assert.ll
…
half.ll
…
hardened-br-jump-table.ll
…
highextractbitcast.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
hints.ll
…
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
…
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
…
hwasan-check-memaccess-fixedshadow.ll
…
hwasan-check-memaccess.ll
…
hwasan-prefer-fp.ll
…
hwasan-zero-ptr.ll
…
i1-contents.ll
…
i128_volatile_load_store.ll
…
i128_with_overflow.ll
…
i128-align.ll
…
i128-cmp.ll
…
i128-fast-isel-fallback.ll
…
i128-math.ll
…
i256-math.ll
…
iabs.ll
…
icmp-cst.ll
…
icmp-or-load.ll
…
icmp-shift-opt.ll
…
icmp-ult-eq-fold.ll
…
icmp.ll
…
ifcvt-select.ll
…
ifunc-asm.ll
…
ignore-signed-zero.ll
…
illegal-float-ops.ll
…
illegal-floating-point-vector-compares.ll
…
ilp32-tlsdesc.ll
…
ilp32-va.ll
…
imm-splat-ops.ll
[AArch64] Promote more NEON splats to SVE immediates (#186776)
2026-03-25 18:04:37 +00:00
immcost.ll
…
implicit-def-remat-requires-impdef-check.mir
…
implicit-def-subreg-to-reg-regression.ll
…
implicit-def-with-impdef-greedy-assert.mir
…
implicit-null-check.ll
…
implicit-sret.ll
…
implicitly-set-zero-high-64-bits.ll
…
inc-of-add.ll
…
init-array.ll
…
init-undef.mir
…
inline-asm-blockaddress.ll
…
inline-asm-clobber-arm64ec.ll
…
inline-asm-clobber-base-frame-pointer.ll
…
inline-asm-clobber.ll
…
inline-asm-constraints-bad-sve.ll
…
inline-asm-constraints-badI.ll
…
inline-asm-constraints-badK2.ll
…
inline-asm-constraints-badK.ll
…
inline-asm-constraints-badL.ll
…
inline-asm-flag-output.ll
…
inline-asm-globaladdress.ll
…
inline-asm-i-constraint-i1.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-nop-reg.ll
…
inline-asm-prepare.ll
…
inline-asm-speculation.ll
…
inlineasm-illegal-type.ll
…
inlineasm-ldr-pseudo.ll
…
inlineasm-output-template.ll
…
inlineasm-S-constraint.ll
…
inlineasm-Uc-constraint.ll
…
inlineasm-X-allocation.ll
…
inlineasm-X-constraint.ll
…
insert-extend.ll
…
insert-subvector-res-legalization.ll
…
insert-subvector.ll
…
insertextract.ll
[LegalizeTypes][DAG] Use SHL(X,1) instead of ADD(X,X) for variable vector indices for extraction/insertion legalization (#188277)
2026-04-22 18:05:16 +00:00
insertshuffleload.ll
…
instr-ref-ldv.ll
…
int-to-fp-no-neon.ll
…
interleaved-load-combine-pr90695.ll
…
intrinsic-cttz-elts-sve.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
intrinsic-cttz-elts.ll
[SelectionDAG] Expand CTTZ_ELTS[_ZERO_POISON] and handle legalization (#188691)
2026-03-31 07:25:57 +00:00
intrinsic-vector-match-sve2.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
intrinsics-memory-barrier.ll
…
inttoptr_debug_value.ll
…
irg_sp_tagp.ll
…
irg-nomem.mir
…
irg.ll
…
is_fpclass-bfloat.ll
optimize is_finite assembly (#169402)
2026-03-29 14:28:07 +00:00
is_fpclass.ll
optimize is_finite assembly (#169402)
2026-03-29 14:28:07 +00:00
isinf.ll
…
Issue57251.ll
…
issue-171032.ll
…
itofp-bf16.ll
[AArch64] Fix lowering of non-power2 uitofp (#190921)
2026-04-20 09:51:04 +01:00
itofp.ll
[AArch64] Fix lowering of non-power2 uitofp (#190921)
2026-04-20 09:51:04 +01:00
jti-correct-datatype.mir
…
jump-table-32.ll
…
jump-table-compress.mir
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
jump-table-duplicate.mir
…
jump-table-exynos.ll
…
jump-table-partition.ll
…
jump-table.ll
…
kcfi-bti.ll
…
kcfi-patchable-function-prefix.ll
…
kcfi.ll
…
known-fpclass-splat-vector.ll
[DAG] computeKnownFPClass - add ISD::SPLAT_VECTOR handling (#189780)
2026-04-04 14:54:12 +00:00
known-never-nan.ll
[GISel] Use GISelValueTracking in isKnownNeverNaN (#190542)
2026-04-13 13:42:12 +00:00
knownpow2-trunc-orzero.ll
[DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (#184365)
2026-03-28 16:50:19 +00:00
lack-of-signed-truncation-check.ll
…
landingpad-ifcvt.ll
…
large_shift.ll
…
large-consts.ll
…
large-offset-ldr-merge.mir
…
large-stack-cmp.ll
…
large-stack.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
late-taildup-computed-goto.ll
…
latency.ll
…
ld1postmul.ll
…
ldexp-arm64ec.ll
…
ldexp.ll
[AArch64] Fix legalization of bf16 ldexp. (#190805)
2026-04-13 08:36:58 +01:00
ldp-stp-control-features.ll
…
ldp-stp-scaled-unscaled-pairs.ll
…
ldp-stp-unknown-size.mir
…
ldradr.ll
…
ldrpre-ldr-merge.mir
…
ldst_update_cfpath.mir
…
ldst-implicitop.mir
…
ldst-miflags.mir
…
ldst-nopreidx-sp-redzone.mir
…
ldst-opt-aa.mir
…
ldst-opt-after-block-placement.ll
…
ldst-opt-mte-with-dbg.mir
…
ldst-opt-mte.mir
…
ldst-opt-non-imm-offset.mir
…
ldst-opt-zr-clobber.mir
…
ldst-opt.ll
[NFC][AArch64] Regenerate ldst-opt.ll checks to use update_llc_test_checks (#193712)
2026-04-23 11:34:14 +00:00
ldst-opt.mir
…
ldst-paired-aliasing.ll
…
ldst-prepost-uses.ll
…
ldst-regoffset.ll
…
ldst-unscaledimm.ll
…
ldst-unsignedimm.ll
…
ldst-zero.ll
…
legalize-bug-bogus-cpu.ll
…
licm-regclass-copy.mir
…
lifetime-poison.ll
…
lit.local.cfg
…
literal_pools_float_apple.ll
…
literal_pools_float.ll
…
live-debugvalues-sve.mir
…
live-interval-analysis.mir
…
llrint-conv-fp16.ll
…
llrint-conv.ll
…
llround-conv-fp16.ll
…
llround-conv.ll
…
llvm-ir-to-intrinsic.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
llvm-masked-gather-legal-for-sve.ll
…
llvm-masked-scatter-legal-for-sve.ll
…
llvm.exp10.ll
…
llvm.frexp.ll
…
llvm.modf.ll
…
llvm.sincos-fmf.ll
…
llvm.sincos.ll
…
llvm.sincospi.error.ll
…
llvm.sincospi.ll
…
load-combine-big-endian.ll
…
load-combine.ll
…
load-insert-undef.ll
…
load-insert-zero.ll
[AArch64][SVE] Prefer FMOV for scalar insert into first element of zero. (#187236)
2026-03-19 08:48:14 +00:00
load-store-forwarding.ll
…
load-zext-bitcast.ll
…
load.ll
…
local_vars.ll
…
local-bounds-single-trap.ll
…
local-sym-storage-class.ll
…
logic-reassociate.ll
…
logic-shift.ll
…
logical_shifted_reg.ll
…
logical-imm.ll
…
logical-op-with-not.ll
[AArch64][CodeGen] match (or x (not y)) to generate mov+orn (#191145)
2026-04-09 10:05:31 +00:00
loh-adrp-add-ldr-clobber.mir
…
loh-use-between-adrp-add.mir
…
loh.mir
…
loop-micro-op-buffer-size-t99.ll
…
loop-sink-limit.mir
…
loop-sink.mir
…
lower-ptrmask-arm64_32.ll
…
lower-ptrmask.ll
…
lower-range-metadata-func-call.ll
…
lowerMUL-newload.ll
…
lr-reserved-for-ra-live-in.ll
…
lrint-conv-fp16-win.ll
…
lrint-conv-fp16.ll
…
lrint-conv-win.ll
…
lrint-conv.ll
…
lround-conv-fp16-win.ll
…
lround-conv-fp16.ll
…
lround-conv-win.ll
…
lround-conv.ll
…
ls64-inline-asm.ll
…
ls64-intrinsics.ll
…
lshr-trunc-lshr.ll
…
lslfast.ll
…
luti-with-sme2.ll
…
machine_cse_illegal_hoist.ll
…
machine_cse_impdef_killflags.ll
…
machine_cse.ll
…
machine-combiner-copy.ll
…
machine-combiner-eor.mir
…
machine-combiner-fmul-dup.mir
…
machine-combiner-instr-fmf.mir
…
machine-combiner-madd.ll
…
machine-combiner-maddimm.mir
…
machine-combiner-reassociate-accumulators.mir
…
machine-combiner-reassociate-ops-in-different-blocks.mir
…
machine-combiner-reassociate.mir
…
machine-combiner-subadd2.mir
…
machine-combiner-subadd.ll
…
machine-combiner-subregs.mir
…
machine-combiner-transient.ll
…
machine-combiner.ll
…
machine-combiner.mir
…
machine-copy-prop.ll
…
machine-copy-remove.ll
…
machine-copy-remove.mir
[NewPM] Port AArch64RedundantCopyElimination (#190582)
2026-04-08 08:48:06 -07:00
machine-cp-backward-uses.mir
…
machine-cp-clobbers.mir
…
machine-cp-constant-reg.mir
…
machine-cp-sub-reg.mir
…
machine-cse-profitable-check.ll
…
machine-dead-copy.mir
…
machine-latecleanup-inlineasm.mir
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
machine-licm-hoist-load.ll
Move ExpandMemCmp and MergeIcmp to the middle end (#77370)
2026-04-02 09:57:00 +02:00
machine-licm-sink-instr.ll
…
machine-licm-sub-loop.ll
…
machine-outliner-2fixup-blr-terminator.mir
…
machine-outliner-adrp-got-split.mir
…
machine-outliner-all-stack.mir
…
machine-outliner-bad-adrp.mir
…
machine-outliner-bad-register.mir
…
machine-outliner-bti.mir
…
machine-outliner-bundle-debuginfo.mir
…
machine-outliner-bundle.mir
…
machine-outliner-calls.mir
…
machine-outliner-cfi-tail-some.mir
…
machine-outliner-cfi-tail.mir
…
machine-outliner-cfi.mir
…
machine-outliner-compatible-candidates.mir
…
machine-outliner-create-lr-livein.mir
…
machine-outliner-default.mir
…
machine-outliner-drop-stack.mir
…
machine-outliner-flags.ll
…
machine-outliner-function-annotate.mir
…
machine-outliner-inline-asm-adrp.mir
…
machine-outliner-iterative-2.mir
…
machine-outliner-iterative.mir
…
machine-outliner-labels.mir
…
machine-outliner-leaf-descendants.ll
…
machine-outliner-loh.ll
…
machine-outliner-loh.mir
…
machine-outliner-mapper-debug-output.mir
…
machine-outliner-mapper-stats.mir
…
machine-outliner-mapping-stats.mir
…
machine-outliner-no-noreturn-no-stack.mir
…
machine-outliner-noredzone.ll
…
machine-outliner-noreturn-no-stack.mir
…
machine-outliner-noreturn-save-lr.mir
…
machine-outliner-only-unsafe-ranges.mir
…
machine-outliner-ordering.mir
…
machine-outliner-outline-bti.ll
…
machine-outliner-overlap.mir
…
machine-outliner-patchable.ll
…
machine-outliner-patchable.mir
…
machine-outliner-pgo.ll
…
machine-outliner-regsave.mir
…
machine-outliner-remarks.ll
…
machine-outliner-retaddr-sign-cfi.ll
…
machine-outliner-retaddr-sign-diff-scope-same-key.ll
…
machine-outliner-retaddr-sign-non-leaf.ll
…
machine-outliner-retaddr-sign-regsave.mir
…
machine-outliner-retaddr-sign-same-scope-diff-key.ll
…
machine-outliner-retaddr-sign-same-scope-same-key-a.ll
…
machine-outliner-retaddr-sign-same-scope-same-key-b.ll
…
machine-outliner-retaddr-sign-sp-mod.ll
…
machine-outliner-retaddr-sign-sp-mod.mir
…
machine-outliner-retaddr-sign-subtarget.ll
…
machine-outliner-retaddr-sign-thunk.ll
…
machine-outliner-retaddr-sign-v8-3.ll
…
machine-outliner-safe-range-in-middle.mir
…
machine-outliner-side-effect-2.mir
…
machine-outliner-side-effect.mir
…
machine-outliner-size-info.mir
…
machine-outliner-sort-per-priority.ll
…
machine-outliner-sort-per-priority.mir
…
machine-outliner-tail.ll
…
machine-outliner-threshold.mir
…
machine-outliner-throw2.ll
…
machine-outliner-throw.ll
…
machine-outliner-thunk.ll
…
machine-outliner-unsafe-range-at-beginning.mir
…
machine-outliner-unsafe-range-at-end.mir
…
machine-outliner-unsafe-stack-call.mir
…
machine-outliner.ll
…
machine-outliner.mir
…
machine-scheduler.mir
…
machine-sink-cache-invalidation.ll
…
machine-sink-getmemoperandwithoffset.mir
…
machine-sink-kill-flags.ll
…
machine-sink-zr.mir
…
machine-sme-abi-find-insert-pt.mir
…
machine-zero-copy-remove.mir
[NewPM] Port AArch64RedundantCopyElimination (#190582)
2026-04-08 08:48:06 -07:00
macho-global-symbols.ll
…
macho-none.ll
…
macho-trap.ll
…
macro-fusion-addsub-2reg-const1.mir
…
macro-fusion-cluster-conflict.mir
[MacroFusion] Early return when insts already clustered (#191710)
2026-04-16 08:50:56 +03:00
macro-fusion-last.mir
…
macro-fusion.ll
…
madd-combiner.ll
…
masked-integer-compare.ll
…
masked-sdiv-fixed-length.ll
[LLVM][CodeGen][SVE] Add custom lowering for ISD::MASKED_SDIV/UDIV. (#191164)
2026-04-17 13:42:19 +01:00
masked-sdiv-scalable.ll
[LLVM][CodeGen][SVE] Add custom lowering for ISD::MASKED_SDIV/UDIV. (#191164)
2026-04-17 13:42:19 +01:00
masked-srem-fixed-length.ll
[IR] Add llvm.masked.{udiv,sdiv,urem,srem} intrinsics (#189705)
2026-04-09 07:26:12 +00:00
masked-srem-scalable.ll
[IR] Add llvm.masked.{udiv,sdiv,urem,srem} intrinsics (#189705)
2026-04-09 07:26:12 +00:00
masked-udiv-fixed-length.ll
[LLVM][CodeGen][SVE] Add custom lowering for ISD::MASKED_SDIV/UDIV. (#191164)
2026-04-17 13:42:19 +01:00
masked-udiv-scalable.ll
[LLVM][CodeGen][SVE] Add custom lowering for ISD::MASKED_SDIV/UDIV. (#191164)
2026-04-17 13:42:19 +01:00
masked-urem-fixed-length.ll
[IR] Add llvm.masked.{udiv,sdiv,urem,srem} intrinsics (#189705)
2026-04-09 07:26:12 +00:00
masked-urem-scalable.ll
[IR] Add llvm.masked.{udiv,sdiv,urem,srem} intrinsics (#189705)
2026-04-09 07:26:12 +00:00
mattr-all.ll
…
mature-mc-support.ll
…
max-jump-table.ll
…
max-stores-per-mem-ops.ll
…
memcmp.ll
[AArch64] Select REV16 for zext(bswap(i16)) (#189576)
2026-04-02 11:32:39 +01:00
memcpy-f128.ll
…
memcpy-scoped-aa.ll
…
memmove-inline.ll
Enable generic overlapping optimization for memmove (#177885)
2026-03-27 07:22:05 +00:00
memset-inline.ll
…
memset-vs-memset-inline.ll
…
memset.ll
…
memsize-remarks.ll
…
memtag-compact-unwind.ll
…
memtag-loop-nzcv.ll
…
memtag-merge-writeback.mir
…
memtag-stg-loop-reg-pressure.mir
…
merge-scoped-aa-store.ll
…
merge-store-dependency.ll
…
merge-store.ll
[AArch64] Add tablegen patterns for store of high-half. (#190320)
2026-04-13 17:24:14 +01:00
merge-trunc-store.ll
…
mergestores_noimplicitfloat.ll
…
midpoint-int.ll
…
min-jump-table.ll
…
min-max-combine.ll
…
min-max.ll
…
mingw-refptr.ll
…
minmax-of-minmax.ll
…
minmax.ll
…
mir-yaml-has-streaming-mode-changes.ll
…
misched-branch-targets.mir
…
misched-bundle.mir
…
misched-cutoff.mir
…
misched-detail-resource-booking-01.mir
…
misched-detail-resource-booking-02.mir
…
misched-fuse-cset.ll
…
misched-fusion-addadrp.ll
…
misched-fusion-addr-tune.ll
…
misched-fusion-addr.ll
…
misched-fusion-aes.ll
…
misched-fusion-arith-logic.mir
…
misched-fusion-cmp-bcc.ll
[GISel] Disable opt_brcond_by_inverting_cond combine at O0 (#193417)
2026-04-24 09:11:23 +01:00
misched-fusion-cmp.mir
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
misched-fusion-crypto-eor.mir
…
misched-fusion-csel.ll
…
misched-fusion-fcsel.ll
…
misched-fusion-lit.ll
…
misched-fusion.ll
…
misched-move-imm.mir
…
misched-predicate-virtreg.mir
…
misched-sort-resource-in-trace.mir
…
misched-stp.ll
…
mla_mls_merge.ll
…
mlicm-csr-mask.mir
…
mlicm-implicit-defs.mir
…
mlicm-stack-write-check.mir
…
mops-mmo-size.ll
[AArch64] Use an unknown size for memcpy ops with non-constant sizes. (#187445)
2026-03-20 07:28:16 +00:00
mops-register-alias.ll
…
movi64_sve.ll
…
movid-no-neon.ll
…
movimm-expand-ldst.ll
…
movimm-expand-ldst.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
movimm-wzr.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
movw-consts.ll
…
movw-shift-encoding.ll
…
mul_by_elt.ll
…
mul_pow2.ll
…
mul-cmp.ll
…
mul-i128-overflow.ll
…
mul-i256.ll
…
mul-lohi.ll
…
mul.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
mulcmle.ll
…
mulhu-srl-promoted-ops.ll
…
multi-vector-load-size.ll
…
multi-vector-store-size.ll
…
naked-fn-with-frame-pointer.ll
…
named-vector-shuffle-reverse-neon.ll
…
named-vector-shuffle-reverse-sve.ll
…
named-vector-shuffles-neon.ll
…
named-vector-shuffles-sve.ll
…
neg-abs.ll
…
neg-imm.ll
…
neg-selects.ll
[GISel] import pattern (A-(B-C)) to A+(C-B) (#181676)
2026-03-19 16:03:41 +00:00
neon_rbit.ll
…
neon-abd.ll
Retry "[SDAG] (abs (add nsw a, -b)) -> (abds a, b) (#175801)" (#186659)
2026-04-01 13:37:29 +00:00
neon-addlv.ll
…
neon-anyof-splat.ll
…
neon-bitcast.ll
…
neon-bitselect.ll
…
neon-bitwise-instructions.ll
[GlobalISel] Add sub(-1, x) -> (xor x, -1) from SelectionDAG (#181014)
2026-04-03 17:53:30 +01:00
neon-compare-instructions.ll
…
neon-diagnostics.ll
…
neon-dot-product.ll
…
neon-dotpattern.ll
…
neon-dotreduce.ll
…
neon-extadd-extract.ll
…
neon-extadd.ll
…
neon-extmul.ll
…
neon-extract.ll
…
neon-extractbitcast-mir.ll
…
neon-extracttruncate.ll
…
neon-famin-famax.ll
…
neon-fma-FMF.ll
…
neon-fma.ll
…
neon-fp8-cvt.ll
…
neon-fp8-fscale.ll
…
neon-fp16fml.ll
…
neon-fpextend_f16.ll
…
neon-fpround_f128.ll
…
neon-idiv.ll
…
neon-inline-asm-16-bit-fp.ll
…
neon-ins-trunc-elt.ll
…
neon-insert-sve-elt.ll
…
neon-insextbitcast.ll
…
neon-lowhalf128-optimisation.ll
…
neon-luti.ll
…
neon-mla-mls.ll
…
neon-mov.ll
…
neon-mul-shl.ll
[AArch64] Optimize vector multiplications by certain constants for v2i64 (#183827)
2026-04-07 13:11:21 +01:00
neon-or-combine.ll
…
neon-partial-reduce-dot-product.ll
…
neon-perm.ll
…
neon-reverseshuffle.ll
…
neon-rshrn.ll
…
neon-saba.ll
…
neon-sad.ll
…
neon-scalar-by-elem-fma.ll
…
neon-scalar-copy.ll
…
neon-scalarize-histogram.ll
…
neon-sha3.ll
…
neon-shift-left-long.ll
…
neon-shift-neg.ll
…
neon-shuffle-vector-tbl.ll
…
neon-sm4-sm3.ll
…
neon-stepvector.ll
…
neon-truncstore.ll
…
neon-vcadd.ll
…
neon-vcmla.ll
…
neon-vector-splat.ll
…
neon-vmull-high-p8.ll
…
neon-vmull-high-p64.ll
…
neon-wide-splat.ll
…
neon-widen-shuffle.ll
…
nest-register.ll
…
nested-iv-regalloc.mir
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
new-load-requires-renaming-in-mssa.ll
…
no_cfi.ll
…
no-fp-asm-clobbers-crash.ll
…
no-promote-scalabale-const-to-global.ll
…
no-quad-ldp-stp.ll
…
no-reorder-cfi-merge-back-load.mir
…
no-reorder-cfi-merge-back-store.mir
…
no-reorder-cfi-merge-fwd-load.mir
…
no-reorder-cfi-merge-fwd.mir
…
no-reorder-cfi-no-merge.mir
…
no-reorder-cfi.ll
…
no-stack-arg-probe.ll
…
no-sve-no-neon.ll
…
no-tail-call-bzero-from-memset.ll
…
no-xzr-liveins.mir
…
nofpclass.ll
…
nomerge.ll
…
nonlazybind.ll
…
nontemporal-load-interleaved.ll
…
nontemporal-load.ll
…
nontemporal-store-interleaved-optsize.ll
…
nontemporal-store-interleaved.ll
…
nontemporal-store-optsize.ll
…
nontemporal-store.ll
…
note-gnu-property-elf-pauthabi.ll
…
note-gnu-property-gcs.ll
…
note-gnu-property-pac-bti-0.ll
…
note-gnu-property-pac-bti-1.ll
…
note-gnu-property-pac-bti-2.ll
…
note-gnu-property-pac-bti-3.ll
…
note-gnu-property-pac-bti-4.ll
…
null-mctargetstreamer.ll
…
nzcv-save.ll
…
O0-pipeline.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
O3-pipeline.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
optimize_combine_large_shifts.ll
…
optimize-cond-branch.ll
…
optimize-imm.ll
…
or-combine.ll
…
outlining-with-streaming-mode-changes.ll
…
overeager_mla_fusing.ll
…
overflow.ll
…
overlapping-copy-bundle-cycle.mir
…
overlapping-copy-bundle.mir
…
p2align-zero-fillvalue.ll
…
pacbti-llvm-generated-funcs-1.ll
…
pacbti-llvm-generated-funcs-2.ll
…
pacbti-module-attrs.ll
…
paired-load.ll
…
parity.ll
…
partial-pipeline-execution.ll
…
partial-reduction-add-predicated.ll
…
partial-reduction-add.ll
…
partial-reduction-sub-fp.ll
[ISel][AArch64] Add CodeGen support for partial sub reductions. (#186809)
2026-04-23 11:34:15 +01:00
partial-reduction-sub.ll
[ISel][AArch64] Add CodeGen support for partial sub reductions. (#186809)
2026-04-23 11:34:15 +01:00
patchable-function-entry-bti.ll
…
patchable-function-entry-empty.mir
…
patchable-function-entry.ll
…
pauthlr-prologue-duplication.mir
…
PBQP-chain.ll
…
PBQP-coalesce-benefit.ll
…
PBQP-csr.ll
…
PBQP.ll
…
pcsections.ll
[GISel] Disable opt_brcond_by_inverting_cond combine at O0 (#193417)
2026-04-24 09:11:23 +01:00
peephole-and-tst.ll
…
peephole-csel.ll
…
peephole-csel.mir
[NewPM] Adds a port for AArch64MIPeepholeOpt (#187515)
2026-03-20 09:17:34 -07:00
peephole-insert-subreg.mir
[NewPM] Adds a port for AArch64MIPeepholeOpt (#187515)
2026-03-20 09:17:34 -07:00
peephole-insvigpr.mir
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
peephole-movd.mir
[NewPM] Adds a port for AArch64MIPeepholeOpt (#187515)
2026-03-20 09:17:34 -07:00
peephole-opt-analyzeCompare-subreg-use.mir
…
peephole-opt-check-cflags.mir
…
peephole-orr.mir
[NewPM] Adds a port for AArch64MIPeepholeOpt (#187515)
2026-03-20 09:17:34 -07:00
peephole-sxtw.mir
[NewPM] Adds a port for AArch64MIPeepholeOpt (#187515)
2026-03-20 09:17:34 -07:00
perm-tb-with-sme2.ll
…
phi-dbg.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
phi.ll
…
PHIElimination-crash.mir
…
PHIElimination-debugloc.mir
…
pic-eh-stubs.ll
…
pie.ll
…
pmull-ldr-merge.ll
…
popcount_vmask.ll
…
popcount.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
post-ra-machine-sink.mir
…
postra-mi-sched.ll
…
pow.75.ll
…
pow.ll
…
powi-arm64ec.ll
…
powi-windows.ll
…
powi.ll
…
pr27816.ll
…
pr33172.ll
…
pr40091.ll
…
pr48188.ll
…
pr49781.ll
…
pr51476.ll
…
pr51516.mir
…
pr53315-returned-i128.ll
…
pr55178.ll
…
pr55201.ll
…
pr55644.ll
…
pr58350.ll
…
pr58431.ll
…
pr58516.ll
…
pr59891-dagcombine-deleted-freeze.ll
…
pr59902.ll
…
pr61111.ll
…
pr61549.ll
[GISel] Keep non-negative info in SUB(CTLZ) (#189314)
2026-03-30 22:10:47 +02:00
pr66603.ll
…
pr72777.ll
…
pr79100.ll
…
pr86717.ll
[DAGCombiner] Fold sub nuw C, x -> xor x, C when C is a mask (#192692)
2026-04-17 22:05:34 +01:00
pr88966.ll
…
pr90936.ll
…
pr92062.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
pr96366.ll
…
pr135776.ll
…
pr135821.ll
…
pr142314.ll
…
pr148949.ll
…
pr157118.ll
…
pr157252.mir
…
pr161013.ll
[DAG] Add Srl combine for extracting last element of BUILD_VECTOR (#181412)
2026-04-21 12:28:48 +01:00
pr161289.ll
…
pr161420.ll
…
pr164181.ll
…
pr166870.ll
…
pr-cf624b2.ll
…
pre-indexed-addrmode-with-constant-offset.ll
…
predicated-add-sub.ll
…
preferred-alignment.ll
…
preferred-function-alignment.ll
[MC,CodeGen] Update .prefalign for symbol-based preferred alignment (#184032)
2026-04-11 06:16:43 +00:00
prefixdata.ll
…
preserve_mostcc.ll
…
preserve_nonecc_call.ll
…
preserve_nonecc_musttail.ll
…
preserve_nonecc_swift.ll
…
preserve_nonecc_varargs_aapcs.ll
…
preserve_nonecc_varargs_darwin.ll
…
preserve_nonecc_varargs_win64.ll
…
preserve_nonecc.ll
…
preserve.ll
…
print-pipeline-passes.ll
…
prologue-epilogue-remarks.mir
…
ptradd.ll
…
ptrauth-arm64-tls-dynamics.ll
…
ptrauth-basic-pic.ll
…
ptrauth-bti-call.ll
…
ptrauth-call-rv-marker.ll
…
ptrauth-call.ll
…
ptrauth-constant-in-code.ll
…
ptrauth-elf-globals-pic.ll
…
ptrauth-elf-got-function-symbols.ll
…
ptrauth-extern-weak.ll
…
ptrauth-fpac.ll
…
ptrauth-global-no-pic.ll
…
ptrauth-got-abuse.ll
…
ptrauth-indirectbr.ll
…
ptrauth-init-fini.ll
…
ptrauth-intrinsic-auth-resign-relative-load.ll
…
ptrauth-intrinsic-auth-resign-with-blend.ll
…
ptrauth-intrinsic-auth-resign.ll
…
ptrauth-intrinsic-blend.ll
…
ptrauth-intrinsic-sign-generic.ll
…
ptrauth-intrinsic-sign.ll
…
ptrauth-intrinsic-strip.ll
…
ptrauth-invoke.ll
…
ptrauth-irelative.ll
…
ptrauth-isel.ll
[AArch64][GlobalISel] FP Info implementation for AArch64. (#177158)
2026-04-20 09:38:16 +01:00
ptrauth-isel.mir
…
ptrauth-reloc.ll
[AArch64] Add error handling for unsupported bases in lowerConstantPtrAuth (#189474)
2026-04-08 11:31:43 -07:00
ptrauth-ret-trap.ll
…
ptrauth-ret.ll
…
ptrauth-sign-personality.ll
…
ptrauth-tagged-globals-pic.ll
…
ptrauth-tail-call-global.ll
…
ptrauth-tail-call-regalloc.ll
…
ptrauth-tiny-model-pic.ll
…
ptrauth-tiny-model-static.ll
…
ptrauth-tls-darwin.ll
…
ptrauth-type-info-vptr-discr.ll
…
pull-binop-through-shift.ll
…
pull-conditional-binop-through-shift.ll
…
pull-negations-after-concat-of-truncates.ll
…
qmovn.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
qshrn.ll
…
ragreedy-csr2.ll
…
ragreedy-csr.ll
…
ragreedy-local-interval-cost.ll
…
rand.ll
…
range-prefetch.ll
…
rax1.ll
…
rbit.ll
…
rcpc3-sve.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
rcpc3.ll
…
read-pc.ll
…
readcyclecounter.ll
…
reassocmls.ll
…
recp-fastmath.ll
…
reduce-and.ll
…
reduce-or-opt.ll
…
reduce-or.ll
…
reduce-shuffle.ll
…
reduce-xor.ll
…
redundant-copy-elim-empty-mbb.ll
…
redundant-mov-from-zero-extend.ll
…
redundant-orrwrs-from-zero-extend.mir
[NewPM] Adds a port for AArch64MIPeepholeOpt (#187515)
2026-03-20 09:17:34 -07:00
Redundantstore.ll
…
reg-scavenge-frame.mir
…
regalloc-hint-movprfx.mir
…
regalloc-last-chance-recolor-with-split.mir
…
regalloc-spill-weight-basic.ll
…
regcoal-physreg.mir
…
register-coalesce-update-subranges-remat.mir
…
regress-bitcast-formals.ll
…
regress-combine-extract-vectors.ll
…
regress-f128csel-flags.ll
…
regress-fp128-livein.ll
…
regress-tail-livereg.ll
…
regress-tblgen-chains.ll
…
regress-w29-reserved-with-fp.ll
…
relaxed-fp-atomics.ll
…
reloc-specifiers.mir
…
rem_crash.ll
…
rem-by-const.ll
[DAGCombine] Enable div by constant optimization for odd sized vectors before type legalization. (#188313)
2026-03-26 09:16:46 -07:00
rem.ll
…
remat-const-float-simd.ll
…
remat-float0.ll
…
remat-fmov-vector-imm.mir
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
remat.ll
…
replace-load-with-shrink-store-indexed-crash.ll
…
replace-with-veclib-armpl.ll
…
replace-with-veclib-libmvec-scalable.ll
…
replace-with-veclib-libmvec.ll
…
replace-with-veclib-sleef-scalable.ll
…
replace-with-veclib-sleef.ll
…
reserveXreg-for-regalloc.ll
…
reserveXreg.ll
…
returnaddr.ll
…
rm_redundant_cmp.ll
…
rmif-def-nzcv.mir
…
rmif-use-nzcv.mir
…
rotate-extract.ll
…
rotate.ll
…
round-conv.ll
…
round-fptosi-sat-scalar.ll
…
round-fptoui-sat-scalar.ll
…
rqshrn.ll
…
rvmarker-pseudo-expansion-and-outlining.mir
…
sadd_sat_plus.ll
…
sadd_sat_vec.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
sadd_sat.ll
…
safestack_scalar.ll
…
sat-add.ll
…
sat-trunc-knownbits.ll
…
saturating-vec-smull.ll
…
sbc-add-constant.ll
…
sbc.ll
…
scalable_masked_deinterleaved_loads.ll
…
scalable_masked_interleaved_stores.ll
…
scalable-expanding-load.ll
[AArch64] Lower masked.expandload intrinsic using SVE2p2/SME2p2 EXPAND (#190999)
2026-04-20 11:06:34 +01:00
scalable-vector-promotion.ll
…
scalar-mla-mls.ll
…
scalarize-vector-load.ll
…
scavenge-large-call.ll
…
sched-loop-align.ll
…
sched-movprfx.ll
…
sched-past-vector-ldst.ll
…
sched-postidxalias.mir
…
sched-print-cycle.mir
…
scheduledag-constreg.mir
…
scmp.ll
…
sdag-no-typesize-warnings-regandsizes.ll
…
sdag-store-merging-bug.ll
…
sdiv-by-const-promoted-ops.ll
…
sdivpow2.ll
…
seh_funclet_x1.ll
…
seh-extended-spills.ll
…
seh-finally.ll
…
seh-minimal-prologue-epilogue.ll
…
seh-unreachable-loop.mir
…
select_cc.ll
…
select_const.ll
[AArch64][GlobalISel] FP Info implementation for AArch64. (#177158)
2026-04-20 09:38:16 +01:00
select_fmf.ll
…
select-bitcast.ll
…
select-constant-xor.ll
…
select-to-and-zext.ll
…
select-with-and-or.ll
…
selectcc-to-shiftand.ll
…
selectiondag-order.ll
…
selectopt-cast.ll
…
selectopt-const.ll
…
selectopt-logical.ll
…
selectopt-not.ll
…
selectopt.ll
…
semantic-interposition-asm.ll
…
semantic-interposition-memtag.ll
…
seqpaircopy.mir
…
seqpairspill.mir
…
setcc_knownbits.ll
…
setcc-fsh.ll
…
setcc-redundant-cmlt.ll
…
setcc-takes-i32.ll
…
setcc-type-mismatch.ll
…
setf8-def-nzcv.mir
…
setf8-use-nzcv.mir
…
setf16-def-nzcv.mir
…
setf16-use-nzcv.mir
…
setjmp-bti-no-enforcement.ll
…
setjmp-bti-outliner.ll
…
setjmp-bti.ll
…
settag-merge-nonaligned-fp.ll
…
settag-merge-order.ll
…
settag-merge.ll
…
settag-merge.mir
…
settag.ll
…
sext.ll
…
shadow-call-stack.ll
…
shift_minsize.ll
…
shift-accumulate.ll
…
shift-amount-mod.ll
…
shift-by-signext.ll
…
shift-const-ne-0.ll
…
shift-i256.ll
…
shift-logic.ll
…
shift-mod.ll
…
shift.ll
…
shiftregister-from-and.ll
…
shl-to-add.ll
…
shr-exact-demanded-bits.ll
…
shrink-constant-multiple-users.ll
…
shrink-wrap-byval-inalloca-preallocated.ll
…
shrink-wrap-const-pool-access.mir
…
shrink-wrap-unreachable.ll
…
shrink-wrap.ll
…
shrink-wrapping-vla.ll
…
shrinkwrap-split-restore-point.mir
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
shuffle-extend.ll
…
shuffle-mask-legal.ll
…
shuffle-select.ll
…
shuffle-tbl34.ll
…
shuffles.ll
…
shufflevector.ll
…
sibling-call.ll
…
sign-return-address-cfi-negate-ra-state.ll
…
sign-return-address-pauth-lr.ll
…
sign-return-address-pauthlr-slh.ll
[AArch64] Mark X16 as clobbered in PAUTH_EPILOGUE for hint-based PAuthLR (#175991)
2026-04-13 13:13:25 +01:00
sign-return-address-tailcall.ll
…
sign-return-address.ll
…
signbit-shift.ll
…
signbit-test.ll
…
signed-truncation-check.ll
…
simple-macho.ll
…
sincos-expansion.ll
…
sincos-stack-slots.ll
…
sink-addsub-of-const.ll
…
sink-and-fold-clear-kill-flags.mir
…
sink-and-fold-drop-dbg.mir
…
sink-and-fold-illegal-shift.mir
…
sink-and-fold-preserve-debugloc.mir
…
sink-and-fold-unique-operand.mir
[MachineSink] Prevent attempts to sink-and-fold into the same instruction more than once (#188048)
2026-03-25 11:52:24 +00:00
sink-and-fold.ll
[SCEVExp] Use Builder.CreateBinOp in InsertBinOp. (#154148)
2026-04-25 17:08:20 +01:00
sink-copy-for-shrink-wrap.ll
…
sink-fneg.ll
…
sink-mul-exts.ll
…
sinksplat.ll
…
sitofp-to-tbl.ll
…
sls-crash.ll
…
sls-stackprotector-outliner.ll
…
sme2-fp8-intrinsics-cvt.ll
…
sme2-fp8-intrinsics-fmopa.ll
…
sme2-fp8-intrinsics-mla.ll
…
sme2-intrinsics-add-sub-za16.ll
…
sme2-intrinsics-add.ll
…
sme2-intrinsics-bfmul.ll
…
sme2-intrinsics-bfscale.ll
…
sme2-intrinsics-cvt.ll
…
sme2-intrinsics-cvtl.ll
…
sme2-intrinsics-cvtn.ll
…
sme2-intrinsics-extract-mova.ll
…
sme2-intrinsics-faminmax.ll
…
sme2-intrinsics-fclamp.ll
…
sme2-intrinsics-fmlas16.ll
…
sme2-intrinsics-fmlas.ll
…
sme2-intrinsics-fp8-fdot.ll
…
sme2-intrinsics-fp8-fvdot.ll
…
sme2-intrinsics-fp-dots.ll
…
sme2-intrinsics-frint.ll
…
sme2-intrinsics-fscale.ll
…
sme2-intrinsics-insert-mova.ll
…
sme2-intrinsics-int-dots.ll
…
sme2-intrinsics-ld1.ll
…
sme2-intrinsics-ldnt1.ll
…
sme2-intrinsics-luti2-lane-x2.ll
…
sme2-intrinsics-luti2-lane-x4.ll
…
sme2-intrinsics-luti2-lane.ll
…
sme2-intrinsics-luti4-lane-x2.ll
…
sme2-intrinsics-luti4-lane-x4.ll
…
sme2-intrinsics-luti4-lane.ll
…
sme2-intrinsics-luti4.ll
…
sme2-intrinsics-max.ll
…
sme2-intrinsics-min.ll
…
sme2-intrinsics-mlall.ll
…
sme2-intrinsics-mlals.ll
…
sme2-intrinsics-mop4-fp8.ll
…
sme2-intrinsics-mop4a_1x1.ll
…
sme2-intrinsics-mop4a_1x2.ll
…
sme2-intrinsics-mop4a_2x1.ll
…
sme2-intrinsics-mop4a_2x2.ll
…
sme2-intrinsics-mop.ll
…
sme2-intrinsics-mopa.ll
…
sme2-intrinsics-qcvt.ll
…
sme2-intrinsics-qcvtn.ll
…
sme2-intrinsics-qrshr.ll
…
sme2-intrinsics-rshl.ll
…
sme2-intrinsics-sclamp.ll
…
sme2-intrinsics-select-sme-tileslice.ll
…
sme2-intrinsics-sqdmulh.ll
…
sme2-intrinsics-sub.ll
…
sme2-intrinsics-tmop.ll
…
sme2-intrinsics-uclamp.ll
…
sme2-intrinsics-vdot.ll
…
sme2-intrinsics-write-zt.ll
…
sme2-intrinsics-zero-zt.ll
…
sme2-intrinsics-zt0.ll
…
sme2-multivec-regalloc.mir
…
sme2p1-intrinsics-movaz.ll
…
sme2p1-intrinsics-zero.ll
…
sme2p2-intrinsics-fmul.ll
…
sme-aarch64-svcount-O3.ll
…
sme-aarch64-svcount.ll
…
sme-abi-eh-liveins.mir
…
sme-abi-save-call-remarks.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-agnostic-za-without-sme.ll
[AArch64][SME] Preserve ZA in agnostic ZA functions without +sme (#190141)
2026-04-03 00:33:28 +01:00
sme-agnostic-za.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-avoid-coalescing-locally-streaming.ll
…
sme-call-streaming-compatible-to-normal-fn-wihout-sme-attr.ll
…
sme-callee-save-restore-pairs.ll
…
sme-darwin-no-sve-vg.ll
…
sme-darwin-sve-vg.ll
…
sme-disable-gisel-fisel.ll
[AArch64] Fix broken SME code with GlobalISel (#191140)
2026-04-09 13:27:06 +01:00
sme-disable-rematerialize-with-streaming-mode-changes.ll
…
sme-dynamic-tls.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-framelower-use-bp.ll
…
sme-intrinsics-add.ll
…
sme-intrinsics-loads.ll
…
sme-intrinsics-mopa.ll
…
sme-intrinsics-mops.ll
…
sme-intrinsics-mova-extract.ll
…
sme-intrinsics-mova-insert.ll
…
sme-intrinsics-rdsvl.ll
…
sme-intrinsics-state.ll
…
sme-intrinsics-stores.ll
…
sme-intrinsics-zero.ll
…
sme-lazy-save-call.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-lazy-save-windows.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-lazy-sve-nzcv-live.mir
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-machine-licm-vg.mir
…
sme-must-save-lr-for-vg.ll
…
sme-new-za-function.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-new-za-zt0-no-tail-call.ll
…
sme-peephole-opts.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-pstate-sm-changing-call-disable-coalescing.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
sme-read-write-tpidr2.ll
…
sme-shared-za-interface.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-streaming-body-streaming-compatible-interface.ll
…
sme-streaming-body.ll
…
sme-streaming-checkvl-mir.ll
…
sme-streaming-checkvl.ll
…
sme-streaming-compatible-interface.ll
…
sme-streaming-interface-remarks.ll
…
sme-streaming-interface.ll
…
sme-streaming-mode-changes-unwindinfo.ll
…
sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll
…
sme-streaming-mode-fpr-copy.ll
…
sme-streaming-mode-landingpads.ll
…
sme-support-routines-calling-convention.ll
…
sme-tileslice-addrmodes.ll
…
sme-toggle-pstateza.ll
…
sme-vg-to-stack.ll
…
sme-write-fpmr.ll
…
sme-write-vg.ll
…
sme-za-control-flow.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-za-exceptions.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-za-function-with-many-blocks.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-za-lazy-save-buffer.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sme-zt0-state.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sminp-smaxp.ll
…
sms-acceptable-loop1.mir
…
sms-acceptable-loop2.mir
…
sms-acceptable-loop3.mir
…
sms-acceptable-loop4.mir
…
sms-loop-carried-fp-exceptions1.mir
…
sms-loop-carried-fp-exceptions2.mir
…
sms-mve1.mir
…
sms-mve2.mir
…
sms-mve3.mir
…
sms-mve4.mir
…
sms-mve5.mir
…
sms-mve6.mir
…
sms-mve7.mir
…
sms-mve8.mir
…
sms-mve9.mir
…
sms-mve10.mir
…
sms-mve11.mir
…
sms-mve12.mir
…
sms-order-physreg-deps.mir
…
sms-regpress.mir
…
sms-unacceptable-loop1.mir
…
sms-unacceptable-loop2.mir
…
sms-unacceptable-loop3.mir
…
sms-unpipeline-insts1.mir
…
sms-unpipeline-insts2.mir
…
sms-unpipeline-insts3.mir
…
smul_fix_sat.ll
…
smul_fix.ll
…
soft-float-abi.ll
…
space.ll
…
special-reg.ll
…
speculation-hardening-dagisel.ll
…
speculation-hardening-loads.ll
…
speculation-hardening-sls-blr-bti.mir
…
speculation-hardening-sls-blr.mir
…
speculation-hardening-sls-blra.mir
…
speculation-hardening-sls.ll
…
speculation-hardening-sls.mir
…
speculation-hardening.ll
…
speculation-hardening.mir
…
spill-fold.ll
…
spill-fold.mir
…
spill-reload-remarks.ll
…
spill-stack-realignment.mir
…
spill-undef.mir
…
spillfill-sve.ll
…
spillfill-sve.mir
…
split-deadloop.mir
…
split-sve-stack-frame-layout.ll
…
split-vector-insert.ll
…
sponentry.ll
…
sqrt-fastmath.ll
…
srem-lkk.ll
…
srem-pow2.ll
…
srem-seteq-illegal-types.ll
…
srem-seteq-optsize.ll
…
srem-seteq-vec-nonsplat.ll
[TargetLowering] Remove INT_MIN special case from prepareSREMEqFold. (#188653)
2026-04-02 09:45:47 -07:00
srem-seteq-vec-splat.ll
…
srem-seteq.ll
…
srem-vec-crash.ll
…
srem-vector-lkk.ll
…
sshl_sat.ll
…
ssub_sat_plus.ll
…
ssub_sat_vec.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
ssub_sat.ll
…
ssve-stack-hazard-remarks.ll
…
st1-lane.ll
[AArch64] Add tablegen patterns for store of high-half. (#190320)
2026-04-13 17:24:14 +01:00
stack_guard_remat.ll
…
stack-guard-reassign-sve.mir
…
stack-guard-reassign.ll
…
stack-guard-reassign.mir
…
stack-guard-remat-bitcast.ll
…
stack-guard-sve.ll
…
stack-guard-sysreg.ll
[AARCH64] Support TPIDR_EL0 and TPIDRRO_EL0 as stack protector sysregs (#188054)
2026-03-25 08:57:12 -07:00
stack-guard-vaarg.ll
…
stack-hazard-defaults.ll
…
stack-hazard-windows.ll
…
stack-hazard.ll
…
stack-id-pei-alloc.mir
…
stack-id-stackslot-scavenging.mir
…
stack-probing-64k.ll
…
stack-probing-dynamic-no-frame-setup.ll
…
stack-probing-dynamic.ll
…
stack-probing-last-in-block.mir
…
stack-probing-no-scratch-reg.mir
…
stack-probing-shrink-wrap.mir
…
stack-probing-sve.ll
…
stack-probing.ll
…
stack-protector-darwin-got.ll
…
stack-protector-metadata.ll
…
stack-protector-musttail.ll
…
stack-protector-target.ll
…
stack-protector-trap-unreachable.ll
…
stack-size-section.ll
…
stack-tagging-cfi.ll
…
stack-tagging-dbg-assign-tag-offset.ll
…
stack-tagging-dbg-declare-tag-offset.ll
…
stack-tagging-dbg-value-tag-offset-nopad.ll
…
stack-tagging-dbg-value-tag-offset.ll
…
stack-tagging-dbg.ll
…
stack-tagging-epilogue-fold.mir
…
stack-tagging-ex-1.ll
…
stack-tagging-ex-2.ll
…
stack-tagging-initializer-merge.ll
…
stack-tagging-loop.ll
…
stack-tagging-merge-past-memcpy.mir
…
stack-tagging-musttail.ll
…
stack-tagging-prologue.ll
…
stack-tagging-setjmp.ll
…
stack-tagging-split-lifetime.ll
…
stack-tagging-stack-coloring.ll
…
stack-tagging-unchecked-ld-st.ll
…
stack-tagging-untag-placement.ll
…
stack-tagging.ll
…
stackaddress.ll
…
stackguard-internal.ll
…
stackmap-args.ll
…
stackmap-dynamic-alloca.ll
…
stackmap-frame-setup.ll
…
stackmap-liveness.ll
…
stackmap.ll
…
stacksmash-arm64ec.ll
…
statepoint-call-lowering-lr.ll
…
statepoint-call-lowering-sp.ll
…
statepoint-call-lowering.ll
…
statepoint-twoaddr.mir
…
stgp.ll
…
store_merge_pair_offset.ll
…
store-float-conversion.ll
…
store-swift-async-context-clobber-live-reg.ll
…
store.ll
[AArch64][GlobalISel] FP Info implementation for AArch64. (#177158)
2026-04-20 09:38:16 +01:00
storepairsuppress_minsize.ll
…
storepairsuppress.ll
…
stp-opt-with-renaming-debug.mir
…
stp-opt-with-renaming-ld3.mir
…
stp-opt-with-renaming-reserved-regs.mir
…
stp-opt-with-renaming-undef-assert.mir
…
stp-opt-with-renaming.mir
…
str-narrow-zero-merge.mir
…
streaming-compatible-memory-ops.ll
…
streaming-func-no-sme.ll
…
strict-fp-func.ll
…
strict-fp-int-promote.ll
…
strict-fp-opt.ll
…
strictfp_f16_abi_promote.ll
…
strictfp-inlineasm.ll
…
strpre-str-merge.mir
…
strqro.ll
…
strqu.ll
…
sub1.ll
…
sub-of-bias.ll
…
sub-of-not.ll
…
sub-splat-sub.ll
…
sub.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
subreg_to_reg_coalescing_issue.mir
…
subreg-liveness-fix-subreg-to-reg-implicit-def.mir
…
subs-to-sub-opt.ll
…
sve2-bcax.ll
…
sve2-bf16-converts.ll
…
sve2-bitsel-pseudos-expansion.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
sve2-bitwise-ternary.ll
…
sve2-bsl.ll
[AArch64][SVE] Use SUBR for unpredicated bitwise NOT. (#191155)
2026-04-09 14:13:59 +01:00
sve2-eor3.ll
…
sve2-fcopysign.ll
…
sve2-fixed-length-fcopysign.ll
…
sve2-fmmla-f16mf8.ll
…
sve2-fmmla-f32mf8.ll
…
sve2-histcnt.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
sve2-int-addsub-long.ll
…
sve2-int-mul.ll
…
sve2-int-mulh.ll
…
sve2-intrinsics-binary-narrowing-add-sub.ll
…
sve2-intrinsics-binary-narrowing-shr.ll
…
sve2-intrinsics-bit-permutation.ll
…
sve2-intrinsics-character-match.ll
…
sve2-intrinsics-combine-rshrnb.ll
…
sve2-intrinsics-complex-dot.ll
…
sve2-intrinsics-contiguous-conflict-detection.ll
…
sve2-intrinsics-crypto.ll
…
sve2-intrinsics-faminmax.ll
…
sve2-intrinsics-fp-converts.ll
…
sve2-intrinsics-fp-int-binary-logarithm-zeroing.ll
…
sve2-intrinsics-fp-int-binary-logarithm.ll
…
sve2-intrinsics-fp-widening-mul-acc.ll
…
sve2-intrinsics-int-arith-imm.ll
…
sve2-intrinsics-int-mul-lane.ll
…
sve2-intrinsics-luti.ll
…
sve2-intrinsics-non-widening-pairwise-arith.ll
…
sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll
…
sve2-intrinsics-nt-gather-loads-64bit-scaled-offset.ll
…
sve2-intrinsics-nt-gather-loads-64bit-unscaled-offset.ll
…
sve2-intrinsics-nt-gather-loads-vector-base-scalar-offset.ll
…
sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll
…
sve2-intrinsics-nt-scatter-stores-64bit-scaled-offset.ll
…
sve2-intrinsics-nt-scatter-stores-64bit-unscaled-offset.ll
…
sve2-intrinsics-nt-scatter-stores-vector-base-scalar-offset.ll
…
sve2-intrinsics-perm-tb.ll
…
sve2-intrinsics-polynomial-arithmetic-128.ll
…
sve2-intrinsics-polynomial-arithmetic.ll
…
sve2-intrinsics-psel.ll
…
sve2-intrinsics-rax1.ll
…
sve2-intrinsics-reinterpret.ll
…
sve2-intrinsics-revd.ll
…
sve2-intrinsics-sm4.ll
…
sve2-intrinsics-unary-narrowing.ll
…
sve2-intrinsics-uniform-complex-arith.ll
…
sve2-intrinsics-uniform-dsp-undef.ll
…
sve2-intrinsics-uniform-dsp-zeroing.ll
…
sve2-intrinsics-uniform-dsp.ll
…
sve2-intrinsics-vec-hist-count.ll
…
sve2-intrinsics-while-reversed.ll
…
sve2-intrinsics-while.ll
…
sve2-intrinsics-widening-complex-int-arith.ll
…
sve2-intrinsics-widening-dsp.ll
…
sve2-intrinsics-widening-pairwise-arith.ll
…
sve2-min-max-clamp.ll
…
sve2-mla-indexed.ll
…
sve2-mla-unpredicated.ll
…
sve2-rsh.ll
[AArch64][SVE] Define pseudos for arithmetic immediate instructions. (#188579)
2026-04-02 11:07:46 +01:00
sve2-rsra.ll
…
sve2-sli-sri.ll
…
sve2-sra.ll
…
sve2-unary-movprfx.ll
…
sve2-vscale-sinking.ll
…
sve2-xar.ll
[AArch64][SVE] Define pseudos for arithmetic immediate instructions. (#188579)
2026-04-02 11:07:46 +01:00
sve2p1_copy_pnr.mir
…
sve2p1-dots-partial-reduction.ll
…
sve2p1-fdot.ll
…
sve2p1-fixed-length-fdot.ll
…
sve2p1-intrinsics-bfadd.ll
…
sve2p1-intrinsics-bfclamp.ll
…
sve2p1-intrinsics-bfmax.ll
…
sve2p1-intrinsics-bfmaxnm.ll
…
sve2p1-intrinsics-bfmin.ll
…
sve2p1-intrinsics-bfminnm.ll
…
sve2p1-intrinsics-bfmla_lane.ll
…
sve2p1-intrinsics-bfmla.ll
…
sve2p1-intrinsics-bfmls_lane.ll
…
sve2p1-intrinsics-bfmls.ll
…
sve2p1-intrinsics-bfmlsl.ll
…
sve2p1-intrinsics-bfmul_lane.ll
…
sve2p1-intrinsics-bfmul.ll
…
sve2p1-intrinsics-bfsub.ll
…
sve2p1-intrinsics-cntp.ll
…
sve2p1-intrinsics-crypto.ll
…
sve2p1-intrinsics-dots.ll
…
sve2p1-intrinsics-dupq.ll
…
sve2p1-intrinsics-extq.ll
…
sve2p1-intrinsics-fclamp.ll
…
sve2p1-intrinsics-fp-reduce.ll
…
sve2p1-intrinsics-gather-loads-128bit-index.ll
…
sve2p1-intrinsics-gather-loads-128bit-unscaled-offset.ll
…
sve2p1-intrinsics-int-reduce.ll
…
sve2p1-intrinsics-ld1-single.ll
…
sve2p1-intrinsics-loads.ll
…
sve2p1-intrinsics-multivec-loads.ll
…
sve2p1-intrinsics-multivec-stores.ll
…
sve2p1-intrinsics-pmov-to-pred.ll
…
sve2p1-intrinsics-pmov-to-vector.ll
…
sve2p1-intrinsics-predicate-as-counter.ll
…
sve2p1-intrinsics-qcvtn.ll
…
sve2p1-intrinsics-qrshr.ll
…
sve2p1-intrinsics-scatter-stores-128bit-index.ll
…
sve2p1-intrinsics-scatter-stores-128bit-unscaled-offset.ll
…
sve2p1-intrinsics-sclamp.ll
…
sve2p1-intrinsics-selx2.ll
…
sve2p1-intrinsics-selx4.ll
…
sve2p1-intrinsics-st1-single.ll
…
sve2p1-intrinsics-stores.ll
…
sve2p1-intrinsics-tblq.ll
…
sve2p1-intrinsics-tbxq.ll
…
sve2p1-intrinsics-uclamp.ll
…
sve2p1-intrinsics-unpk.ll
…
sve2p1-intrinsics-uzpq1.ll
…
sve2p1-intrinsics-uzpq2.ll
…
sve2p1-intrinsics-uzpx2.ll
…
sve2p1-intrinsics-uzpx4.ll
…
sve2p1-intrinsics-while-pn.ll
…
sve2p1-intrinsics-while-pp.ll
…
sve2p1-intrinsics-zipq1.ll
…
sve2p1-intrinsics-zipq2.ll
…
sve2p1-intrinsics-zipx2.ll
…
sve2p1-intrinsics-zipx4.ll
…
sve2p1-vector-shuffles.ll
…
sve2p2-intrinsics-fp-arith.ll
…
sve2p2-intrinsics-fp-converts.ll
…
sve2p2-intrinsics.ll
…
sve2p3-dots-partial-reduction.ll
…
sve-aba.ll
…
sve-abd.ll
…
sve-adr.ll
…
sve-aliasing.ll
…
sve-aliasing.mir
…
sve-alloca-stackid.ll
…
sve-alloca.ll
…
sve-asrd.ll
…
sve-bad-intrinsics.ll
…
sve-bad-select.ll
…
sve-bf16-arith.ll
…
sve-bf16-combines.ll
…
sve-bf16-compares.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-bf16-converts.ll
…
sve-bf16-int-converts.ll
…
sve-bf16-reductions.ll
…
sve-bf16-rounding.ll
…
sve-bit-counting-pred.ll
…
sve-bit-counting.ll
…
sve-bitcast.ll
…
sve-breakdown-scalable-vectortype.ll
…
sve-callbyref-notailcall.ll
…
sve-callee-save-restore-pairs.ll
…
sve-calling-convention-byref.ll
…
sve-calling-convention-mixed.ll
…
sve-calling-convention.ll
…
sve-cmp-folds.ll
…
sve-cmp-select.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-cntp-combine-i32.ll
…
sve-cntp-combine-i64.ll
…
sve-coalesce-ptrue-intrinsics.ll
[LLVM][AArch64] Remove addrspace(0) restriction from all SVE/SME memory intrinsics. (#189992)
2026-04-09 17:13:25 +01:00
sve-copy-zprpair.mir
…
sve-dead-masked-store.ll
…
sve-distinct-predicate-dst.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-doublereduct.ll
…
sve-expand-div.ll
…
sve-extload-icmp.ll
…
sve-extract-element.ll
…
sve-extract-fixed-from-scalable-vector.ll
[LLVM][DAGCombiner] Limit extract_subvec(extract_subvec()) combine to vectors of the same type. (#187334)
2026-03-19 11:14:30 +00:00
sve-extract-fixed-vector.ll
…
sve-extract-scalable-vector.ll
…
sve-extract-vector-to-predicate-store.ll
…
sve-fadda-select.ll
…
sve-fcmp.ll
…
sve-fcopysign.ll
…
sve-fcvt.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fix-length-and-combine-512.ll
…
sve-fixed-ld2-alloca.ll
…
sve-fixed-length-addressing-modes.ll
…
sve-fixed-length-bit-counting.ll
…
sve-fixed-length-bitcast.ll
…
sve-fixed-length-bitselect.ll
[AArch64][SVE] Define pseudos for arithmetic immediate instructions. (#188579)
2026-04-02 11:07:46 +01:00
sve-fixed-length-build-vector.ll
…
sve-fixed-length-concat.ll
…
sve-fixed-length-ext-loads.ll
…
sve-fixed-length-extract-subvector.ll
[AArch64] Add tablegen patterns for store of high-half. (#190320)
2026-04-13 17:24:14 +01:00
sve-fixed-length-extract-vector-elt.ll
…
sve-fixed-length-fcopysign.ll
…
sve-fixed-length-fp128.ll
…
sve-fixed-length-fp-arith.ll
…
sve-fixed-length-fp-compares.ll
[AArch64][SVE] Use SUBR for unpredicated bitwise NOT. (#191155)
2026-04-09 14:13:59 +01:00
sve-fixed-length-fp-convert.ll
…
sve-fixed-length-fp-extend-trunc.ll
…
sve-fixed-length-fp-fma.ll
…
sve-fixed-length-fp-minmax.ll
…
sve-fixed-length-fp-reduce.ll
…
sve-fixed-length-fp-rounding.ll
…
sve-fixed-length-fp-select.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-fp-to-int.ll
[LLVM][CodeGen][AArch64] Improve generated code for SVE VLS truncates. (#190778)
2026-04-08 11:48:24 +01:00
sve-fixed-length-fp-vselect.ll
…
sve-fixed-length-fptrunc.ll
…
sve-fixed-length-frame-offests-crash.ll
…
sve-fixed-length-frame-offests.ll
…
sve-fixed-length-function-calls.ll
…
sve-fixed-length-functions.ll
…
sve-fixed-length-insert-vector-elt.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-int-abd.ll
…
sve-fixed-length-int-arith.ll
…
sve-fixed-length-int-compares.ll
…
sve-fixed-length-int-div.ll
[LLVM][CodeGen][AArch64] Improve generated code for SVE VLS truncates. (#190778)
2026-04-08 11:48:24 +01:00
sve-fixed-length-int-extends.ll
…
sve-fixed-length-int-immediates.ll
…
sve-fixed-length-int-log.ll
…
sve-fixed-length-int-minmax.ll
…
sve-fixed-length-int-mulh.ll
…
sve-fixed-length-int-reduce.ll
…
sve-fixed-length-int-rem.ll
[LLVM][CodeGen][AArch64] Improve generated code for SVE VLS truncates. (#190778)
2026-04-08 11:48:24 +01:00
sve-fixed-length-int-select.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-int-shifts.ll
…
sve-fixed-length-int-to-fp.ll
…
sve-fixed-length-int-vselect.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-limit-duplane.ll
…
sve-fixed-length-loads-stores.ll
…
sve-fixed-length-log-reduce.ll
…
sve-fixed-length-mask-opt.ll
…
sve-fixed-length-masked-128bit-loads.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-masked-128bit-stores.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-masked-div.ll
[LLVM][CodeGen][SVE] Add custom lowering for ISD::MASKED_SDIV/UDIV. (#191164)
2026-04-17 13:42:19 +01:00
sve-fixed-length-masked-expandloads.ll
[AArch64] Lower masked.expandload intrinsic using SVE2p2/SME2p2 EXPAND (#190999)
2026-04-20 11:06:34 +01:00
sve-fixed-length-masked-gather.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-masked-loads.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-masked-rem.ll
[LLVM][CodeGen][SVE] Add custom lowering for ISD::MASKED_SDIV/UDIV. (#191164)
2026-04-17 13:42:19 +01:00
sve-fixed-length-masked-scatter.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-masked-stores.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-no-vscale-range.ll
…
sve-fixed-length-offsets.ll
…
sve-fixed-length-optimize-ptrue.ll
…
sve-fixed-length-partial-reduce.ll
…
sve-fixed-length-permute-rev.ll
…
sve-fixed-length-permute-zip-uzp-trn.ll
…
sve-fixed-length-ptest.ll
…
sve-fixed-length-reshuffle.ll
…
sve-fixed-length-rev.ll
…
sve-fixed-length-sdiv-pow2.ll
…
sve-fixed-length-shuffles.ll
…
sve-fixed-length-splat-segment.ll
…
sve-fixed-length-splat-vector.ll
…
sve-fixed-length-subvector.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-fixed-length-trunc-stores.ll
…
sve-fixed-length-trunc.ll
…
sve-fixed-length-vector-shuffle-tbl.ll
…
sve-fixed-length-vector-shuffle.ll
…
sve-fixed-vector-extract-256-bits.ll
…
sve-fixed-vector-llrint.ll
…
sve-fixed-vector-lrint.ll
…
sve-fixed-vector-zext.ll
…
sve-fmmla-f32f16.ll
…
sve-fmsub.ll
…
sve-fold-loadext-and-splat-vector.ll
…
sve-fold-vscale.ll
…
sve-forward-st-to-ld.ll
…
sve-fp-combine.ll
…
sve-fp-immediates-merging.ll
…
sve-fp-int-min-max.ll
…
sve-fp-reciprocal.ll
…
sve-fp-reduce-fadda.ll
…
sve-fp-reduce.ll
…
sve-fp-rounding.ll
…
sve-fp-vselect.ll
…
sve-fp.ll
…
sve-fpext-load.ll
…
sve-fptosi-sat.ll
…
sve-fptoui-sat.ll
…
sve-fptrunc-store.ll
…
sve-gather-scatter-addr-opts.ll
…
sve-gather-scatter-dag-combine.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
sve-gep.ll
…
sve-hadd.ll
[AArch64][SVE] Use SUBR for unpredicated bitwise NOT. (#191155)
2026-04-09 14:13:59 +01:00
sve-i1-add-reduce.ll
…
sve-implicit-zero-filling.ll
[AArch64][SVE] Prefer FMOV for scalar insert into first element of zero. (#187236)
2026-03-19 08:48:14 +00:00
sve-index-const-step-vector.ll
…
sve-indexed-arithmetic.ll
…
sve-insert-element.ll
[LLVM][CodeGen][SVE] Implement custom lowering for insert_vector_elt_nxv1i1. (#192494)
2026-04-21 11:19:13 +01:00
sve-insert-scalable-vector.ll
…
sve-insert-vector-to-predicate-load.ll
…
sve-insert-vector.ll
…
sve-insr.ll
…
sve-int-arith-imm.ll
…
sve-int-arith-pred.ll
…
sve-int-arith.ll
…
sve-int-div-pred.ll
…
sve-int-imm.ll
…
sve-int-log-imm.ll
…
sve-int-log-pred.ll
…
sve-int-log.ll
[AArch64][SVE] Use SUBR for unpredicated bitwise NOT. (#191155)
2026-04-09 14:13:59 +01:00
sve-int-mad-pred.ll
…
sve-int-mul-neg.ll
…
sve-int-mul-pred.ll
…
sve-int-mulh-pred.ll
…
sve-int-pred-reduce.ll
…
sve-int-reduce-pred.ll
…
sve-int-reduce.ll
…
sve-intrinsics-adr.ll
…
sve-intrinsics-bfloat.ll
…
sve-intrinsics-bfscale.ll
…
sve-intrinsics-contiguous-prefetches.ll
…
sve-intrinsics-conversion.ll
…
sve-intrinsics-counting-bits.ll
…
sve-intrinsics-counting-elems-i32.ll
…
sve-intrinsics-counting-elems.ll
…
sve-intrinsics-dup-x.ll
…
sve-intrinsics-fexpa.ll
…
sve-intrinsics-ff-gather-loads-32bit-scaled-offsets.ll
…
sve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll
…
sve-intrinsics-ff-gather-loads-64bit-scaled-offset.ll
…
sve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll
…
sve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll
…
sve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll
…
sve-intrinsics-ffr-manipulation.ll
…
sve-intrinsics-fp-arith-imm.ll
…
sve-intrinsics-fp-arith-merging.ll
…
sve-intrinsics-fp-arith-undef.ll
…
sve-intrinsics-fp-arith.ll
…
sve-intrinsics-fp-compares.ll
…
sve-intrinsics-fp-converts.ll
…
sve-intrinsics-fp-reduce.ll
…
sve-intrinsics-gather-loads-32bit-scaled-offsets.ll
…
sve-intrinsics-gather-loads-32bit-unscaled-offsets.ll
…
sve-intrinsics-gather-loads-64bit-scaled-offset.ll
…
sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
…
sve-intrinsics-gather-loads-vector-base-imm-offset.ll
…
sve-intrinsics-gather-loads-vector-base-scalar-offset.ll
…
sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll
…
sve-intrinsics-gather-prefetches-vect-base-imm-offset.ll
…
sve-intrinsics-gather-prefetches-vect-base-invalid-imm-offset.ll
…
sve-intrinsics-index.ll
…
sve-intrinsics-int-arith-imm-zero.ll
…
sve-intrinsics-int-arith-imm.ll
…
sve-intrinsics-int-arith-merging.ll
…
sve-intrinsics-int-arith-merging.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
sve-intrinsics-int-arith-undef.ll
…
sve-intrinsics-int-arith.ll
…
sve-intrinsics-int-binaryComm-merging.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
sve-intrinsics-int-binaryCommWithRev-merging.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
sve-intrinsics-int-compares-with-imm.ll
…
sve-intrinsics-int-compares.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-intrinsics-ld1-addressing-mode-reg-imm.ll
…
sve-intrinsics-ld1-addressing-mode-reg-reg.ll
…
sve-intrinsics-ld1.ll
…
sve-intrinsics-ld1ro-addressing-mode-reg-imm.ll
…
sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll
…
sve-intrinsics-ld1ro.ll
…
sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll
…
sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll
…
sve-intrinsics-ldst-ext.ll
…
sve-intrinsics-loads-ff.ll
…
sve-intrinsics-loads-nf.ll
…
sve-intrinsics-loads.ll
…
sve-intrinsics-logical-imm.ll
…
sve-intrinsics-logical-undef.ll
…
sve-intrinsics-logical.ll
…
sve-intrinsics-mask-ldst-ext.ll
…
sve-intrinsics-matmul-fp32.ll
…
sve-intrinsics-matmul-fp64.ll
…
sve-intrinsics-matmul-int8.ll
…
sve-intrinsics-perm-select-matmul-fp64.ll
…
sve-intrinsics-perm-select.ll
[DAG] ComputeKnownBits - set low bit to zero for ADD(X,X) (#186461)
2026-03-23 16:10:36 +00:00
sve-intrinsics-pred-creation.ll
…
sve-intrinsics-pred-operations.ll
…
sve-intrinsics-pred-testing.ll
…
sve-intrinsics-reinterpret-no-streaming.ll
…
sve-intrinsics-reinterpret.ll
…
sve-intrinsics-reversal.ll
…
sve-intrinsics-scalar-to-vec.ll
…
sve-intrinsics-scatter-stores-32bit-scaled-offsets.ll
…
sve-intrinsics-scatter-stores-32bit-unscaled-offsets.ll
…
sve-intrinsics-scatter-stores-64bit-scaled-offset.ll
…
sve-intrinsics-scatter-stores-64bit-unscaled-offset.ll
…
sve-intrinsics-scatter-stores-vector-base-imm-offset.ll
…
sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll
…
sve-intrinsics-sel.ll
…
sve-intrinsics-shifts-merging.ll
…
sve-intrinsics-shifts-undef.ll
…
sve-intrinsics-shifts.ll
…
sve-intrinsics-sqdec.ll
…
sve-intrinsics-sqinc.ll
…
sve-intrinsics-st1-addressing-mode-reg-imm.ll
…
sve-intrinsics-st1-addressing-mode-reg-reg.ll
…
sve-intrinsics-st1.ll
…
sve-intrinsics-stN-reg-imm-addr-mode.ll
…
sve-intrinsics-stN-reg-reg-addr-mode.ll
…
sve-intrinsics-stores.ll
…
sve-intrinsics-unpred-form.ll
…
sve-intrinsics-uqdec.ll
…
sve-intrinsics-uqinc.ll
…
sve-intrinsics-while.ll
…
sve-knownbits.ll
…
sve-ld1-addressing-mode-reg-imm.ll
…
sve-ld1-addressing-mode-reg-reg.ll
…
sve-ld1r.ll
…
sve-ld1r.mir
…
sve-ld-post-inc.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ldN.mir
…
sve-ldnf1.mir
…
sve-ldst-sext.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
sve-ldst-zext.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
sve-ldstnt1.mir
…
sve-llrint.ll
…
sve-load-compare-store.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-load-store-legalisation.ll
…
sve-load-store-strict-align.ll
…
sve-localstackalloc.mir
…
sve-lrint.ll
…
sve-lsr-scaled-index-addressing-mode.ll
…
sve-lsrchain.ll
…
sve-mask-partition.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-masked-compressstore-sve2p2.ll
…
sve-masked-compressstore.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-masked-gather-32b-signed-scaled.ll
…
sve-masked-gather-32b-signed-unscaled.ll
…
sve-masked-gather-32b-unsigned-scaled.ll
…
sve-masked-gather-32b-unsigned-unscaled.ll
…
sve-masked-gather-64b-scaled.ll
…
sve-masked-gather-64b-unscaled.ll
…
sve-masked-gather-legalize.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
sve-masked-gather-vec-plus-imm.ll
…
sve-masked-gather-vec-plus-reg.ll
…
sve-masked-gather.ll
…
sve-masked-int-arith.ll
…
sve-masked-ldst-nonext.ll
…
sve-masked-ldst-sext.ll
…
sve-masked-ldst-trunc.ll
…
sve-masked-ldst-zext.ll
…
sve-masked-scatter-32b-scaled.ll
…
sve-masked-scatter-32b-unscaled.ll
…
sve-masked-scatter-64b-scaled.ll
…
sve-masked-scatter-64b-unscaled.ll
…
sve-masked-scatter-legalize.ll
…
sve-masked-scatter-vec-plus-imm.ll
…
sve-masked-scatter-vec-plus-reg.ll
…
sve-masked-scatter.ll
…
sve-merging-stores.ll
…
sve-merging-unary.ll
…
sve-min-max-pred.ll
…
sve-mov-imm-pred.ll
…
sve-no-typesize-warnings.ll
…
sve-nontemporal-ldst.ll
…
sve-nontemporal-masked-ldst.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-partial-reduce-dot-product.ll
…
sve-partial-reduce-wide-add.ll
…
sve-pfalse-machine-cse.mir
…
sve-pr62151.ll
…
sve-pr92779.ll
[AArch64][SVE] Prefer FMOV for scalar insert into first element of zero. (#187236)
2026-03-19 08:48:14 +00:00
sve-pred-arith.ll
…
sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
…
sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
…
sve-pred-log.ll
…
sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll
…
sve-pred-non-temporal-ldst-addressing-mode-reg-reg.ll
…
sve-pred-pair-spill-fill.ll
…
sve-pred-selectop2.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-pred-selectop3.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-pred-selectop.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-pseudos-expand-undef.mir
[NewPM] Adds a port for AArch64ExpandPseudo (#187332)
2026-03-18 15:22:10 -07:00
sve-ptest-removal-brk.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-cmpeq.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-cmpeq.mir
…
sve-ptest-removal-cmpge.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-cmpgt.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-cmphi.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-cmphs.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-cmple.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-cmplo.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-cmpls.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-cmplt.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-cmpne.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-log.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-match.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ptest-removal-pfirst-pnext.ll
…
sve-ptest-removal-ptrue.ll
…
sve-ptest-removal-rdffr.mir
…
sve-ptest-removal-sink.ll
…
sve-ptest-removal-whilege.mir
…
sve-ptest-removal-whilegt.mir
…
sve-ptest-removal-whilehi.mir
…
sve-ptest-removal-whilehs.mir
…
sve-ptest-removal-whilele.mir
…
sve-ptest-removal-whilelo.mir
…
sve-ptest-removal-whilels.mir
…
sve-ptest-removal-whilelt.mir
…
sve-ptest-removal-whilerw.mir
…
sve-ptest-removal-whilewr.mir
…
sve-ptest.ll
…
sve-punpklo-combine.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-reassocadd.ll
…
sve-redundant-store.ll
…
sve-regalloc-hint-unique-predicate-dst.mir
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-rev.ll
…
sve-saba.ll
…
sve-saddv_64.ll
…
sve-saturating-arith.ll
…
sve-scmp.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-sdiv-pow2.ll
…
sve-select.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-setcc.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-sext-zext.ll
[AArch64][SVE] Add more MOVPRFX pseudos for SVE immediate instructions. (#192491)
2026-04-20 14:55:54 +01:00
sve-smulo-sdnode.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-splat-one-and-ptrue.ll
…
sve-splat-sext.ll
…
sve-split-extract-elt.ll
…
sve-split-fcvt.ll
…
sve-split-fp-reduce.ll
…
sve-split-insert-elt.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-split-int-pred-reduce.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-split-int-reduce.ll
…
sve-split-load.ll
…
sve-split-store.ll
…
sve-split-trunc.ll
…
sve-srem-combine-loop.ll
…
sve-st1-addressing-mode-reg-imm.ll
…
sve-st1-addressing-mode-reg-reg.ll
…
sve-stack-frame-layout-win.ll
…
sve-stack-frame-layout.ll
[AArch64][SME] Remove SelectionDAG SME ABI lowering (#190950)
2026-04-13 09:52:18 +01:00
sve-stepvector.ll
[AArch64][SVE] Define pseudos for arithmetic immediate instructions. (#188579)
2026-04-02 11:07:46 +01:00
sve-stlf.ll
…
sve-stN.mir
…
sve-streaming-mode-cvt-fp-int-fp.ll
…
sve-streaming-mode-cvt-fp-to-int.ll
…
sve-streaming-mode-cvt-int-to-fp.ll
…
sve-streaming-mode-fixed-length-and-combine.ll
…
sve-streaming-mode-fixed-length-bit-counting.ll
…
sve-streaming-mode-fixed-length-bitcast.ll
…
sve-streaming-mode-fixed-length-bitselect.ll
[AArch64][SVE] Define pseudos for arithmetic immediate instructions. (#188579)
2026-04-02 11:07:46 +01:00
sve-streaming-mode-fixed-length-build-vector.ll
[AArch64][SVE] Define pseudos for arithmetic immediate instructions. (#188579)
2026-04-02 11:07:46 +01:00
sve-streaming-mode-fixed-length-concat.ll
…
sve-streaming-mode-fixed-length-ext-loads.ll
…
sve-streaming-mode-fixed-length-extract-subvector.ll
…
sve-streaming-mode-fixed-length-extract-vector-elt.ll
…
sve-streaming-mode-fixed-length-fcopysign.ll
…
sve-streaming-mode-fixed-length-fp-arith.ll
…
sve-streaming-mode-fixed-length-fp-compares.ll
[AArch64][SVE] Use SUBR for unpredicated bitwise NOT. (#191155)
2026-04-09 14:13:59 +01:00
sve-streaming-mode-fixed-length-fp-convert.ll
…
sve-streaming-mode-fixed-length-fp-extend-trunc.ll
…
sve-streaming-mode-fixed-length-fp-fma.ll
…
sve-streaming-mode-fixed-length-fp-minmax.ll
…
sve-streaming-mode-fixed-length-fp-reduce-fa64.ll
…
sve-streaming-mode-fixed-length-fp-reduce.ll
…
sve-streaming-mode-fixed-length-fp-rounding.ll
…
sve-streaming-mode-fixed-length-fp-select.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-streaming-mode-fixed-length-fp-to-int.ll
…
sve-streaming-mode-fixed-length-fp-vselect.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-streaming-mode-fixed-length-insert-vector-elt.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-streaming-mode-fixed-length-int-abd.ll
…
sve-streaming-mode-fixed-length-int-arith.ll
…
sve-streaming-mode-fixed-length-int-compares.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-streaming-mode-fixed-length-int-div.ll
…
sve-streaming-mode-fixed-length-int-extends.ll
…
sve-streaming-mode-fixed-length-int-immediates.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-streaming-mode-fixed-length-int-log.ll
…
sve-streaming-mode-fixed-length-int-minmax.ll
…
sve-streaming-mode-fixed-length-int-mla-neon-fa64.ll
…
sve-streaming-mode-fixed-length-int-mul.ll
…
sve-streaming-mode-fixed-length-int-mulh.ll
…
sve-streaming-mode-fixed-length-int-reduce.ll
…
sve-streaming-mode-fixed-length-int-rem.ll
…
sve-streaming-mode-fixed-length-int-select.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-streaming-mode-fixed-length-int-shifts.ll
…
sve-streaming-mode-fixed-length-int-to-fp.ll
…
sve-streaming-mode-fixed-length-int-vselect.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-streaming-mode-fixed-length-ld2-alloca.ll
…
sve-streaming-mode-fixed-length-limit-duplane.ll
…
sve-streaming-mode-fixed-length-loads.ll
…
sve-streaming-mode-fixed-length-log-reduce.ll
…
sve-streaming-mode-fixed-length-masked-expandload.ll
[AArch64] Lower masked.expandload intrinsic using SVE2p2/SME2p2 EXPAND (#190999)
2026-04-20 11:06:34 +01:00
sve-streaming-mode-fixed-length-masked-gather-scatter.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-streaming-mode-fixed-length-masked-load.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-streaming-mode-fixed-length-masked-store.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-streaming-mode-fixed-length-optimize-ptrue.ll
…
sve-streaming-mode-fixed-length-permute-rev.ll
…
sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
…
sve-streaming-mode-fixed-length-ptest.ll
…
sve-streaming-mode-fixed-length-reductions.ll
…
sve-streaming-mode-fixed-length-reshuffle.ll
…
sve-streaming-mode-fixed-length-rev.ll
…
sve-streaming-mode-fixed-length-sdiv-pow2.ll
…
sve-streaming-mode-fixed-length-shuffle.ll
…
sve-streaming-mode-fixed-length-splat-vector.ll
…
sve-streaming-mode-fixed-length-stores.ll
…
sve-streaming-mode-fixed-length-subvector.ll
…
sve-streaming-mode-fixed-length-trunc-stores.ll
…
sve-streaming-mode-fixed-length-trunc.ll
…
sve-streaming-mode-fixed-length-vector-shuffle.ll
…
sve-streaming-mode-test-register-mov.ll
…
sve-tailcall.ll
…
sve-trunc.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-ucmp.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-umulo-sdnode.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-unaligned-load-store-strict-align.ll
…
sve-unary-movprfx.ll
…
sve-uunpklo-load-uzp1-store-combine.ll
…
sve-varargs-callee-broken.ll
…
sve-varargs-caller-broken.ll
…
sve-varargs.ll
…
sve-vecreduce-dot.ll
…
sve-vecreduce-fold.ll
…
sve-vector-compress.ll
[AArch64] Hint regalloc to choose distinct predicate for MATCH/CMP (#190139)
2026-04-14 09:40:50 +01:00
sve-vector-deinterleave.ll
…
sve-vector-interleave.ll
…
sve-vector-splat.ll
…
sve-vl-arith.ll
…
sve-vls-ldst-opt.mir
…
sve-vscale-attr.ll
…
sve-vscale-combine.ll
…
sve-vscale.ll
…
sve-vselect-fold.ll
…
sve-vselect-imm.ll
…
sve-widen-scalable-vectortype.ll
…
sve-zeroinit.ll
…
sve-zext.ll
[AArch64][SelectionDAG] Improve codegen for and(sext(Op), splat(1)) (#192405)
2026-04-21 03:04:03 -07:00
svtcf-fmul-fdiv-combine.ll
…
swap-compare-operands.ll
…
swift-async-context-seh.ll
…
swift-async-context-slot-offset-win.ll
…
swift-async-pei.ll
…
swift-async-reg.ll
…
swift-async-unwind.ll
…
swift-async-win.ll
…
swift-async.ll
…
swift-csr-win.ll
…
swift-dynamic-async-frame.ll
…
swift-error-unreachable-use.ll
…
swift-error.ll
…
swift-return.ll
…
swiftcc.ll
…
swifterror.ll
…
swiftself-scavenger.ll
…
swiftself.ll
…
swifttail-arm64_32.ll
…
swifttail-async.ll
…
swifttail-call.ll
…
swifttail-funclet.ll
…
switch-cases-to-branch-and.ll
…
switch-unreachable-default.ll
…
tagged-globals-pic.ll
…
tagged-globals-static.ll
…
tagp.ll
…
tail-call-stack-args.ll
…
tail-call-unused-zext.ll
…
tail-call.ll
…
tail-dup-redundant-phi.mir
…
tail-duplicate-debug-variance.mir
…
tailcall_misched_graph.ll
…
tailcall-bitcast-memcpy.ll
…
tailcall-ccmismatch2.ll
…
tailcall-ccmismatch.ll
…
tailcall-explicit-sret.ll
…
tailcall-fastisel.ll
…
tailcall-implicit-sret.ll
…
tailcall-mem-intrinsics.ll
…
tailcall-ssp-split-debug.ll
…
tailcall-string-rvo.ll
…
tailcc-notail.ll
…
tailcc-tail-call.ll
…
taildup-addrtaken.mir
…
taildup-cfi.ll
…
taildup-inst-dup-loc.mir
…
taildup-ssa-update-pr62712.mir
…
taildup-subreg-compose.mir
…
tailmerging_in_mbp.ll
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tbi.ll
…
tbl-loops.ll
…
tbz-tbnz.ll
…
tiny_supported.ll
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tiny-model-pic.ll
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tiny-model-static.ll
…
trampoline.ll
…
trunc-avg-fold.ll
…
trunc-nsw-nuw.ll
…
trunc-to-tbl.ll
…
trunc-v1i64.ll
…
trunc.ll
[AArch64] Remove xtn.ll test. NFC (#193306)
2026-04-21 21:07:18 +01:00
tst-br.ll
…
typepromotion-cost.ll
…
typepromotion-gep.ll
…
typepromotion-overflow.ll
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typepromotion-phisret.ll
…
typepromotion-signed.ll
…
uadd_sat_plus.ll
…
uadd_sat_vec.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
uadd_sat.ll
…
uaddlp.ll
[AArch64] Use AArch64ISD::UADDLP for manual widening adjacent arithmetic (zext/shuffle combination) (#189255)
2026-04-25 19:06:38 +05:30
uaddlv-vaddlp-combine.ll
…
uaddo.ll
…
ubsantrap.ll
…
ucmp.ll
…
udiv-by-const-promoted-ops.ll
…
udiv-const-optimization.ll
…
udivmodei5.ll
…
umin-sub-to-usubo-select-combine.ll
…
uminp-umaxp.ll
…
umul_fix_sat.ll
…
umul_fix.ll
…
umulo-128-legalisation-lowering.ll
…
unfold-masked-merge-scalar-constmask-innerouter.ll
…
unfold-masked-merge-scalar-constmask-interleavedbits.ll
…
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
…
unfold-masked-merge-scalar-constmask-lowhigh.ll
…
unfold-masked-merge-scalar-variablemask.ll
…
unfold-masked-merge-vector-variablemask-const.ll
…
unfold-masked-merge-vector-variablemask.ll
…
unreachable-emergency-spill-slot.mir
…
unsupported-cc-call.ll
…
unsupported-cc-func.ll
…
unsupported-fpext-x86-fp80.ll
…
unsupported-object-format-err.ll
…
unwind-preserved-from-mir.mir
…
unwind-preserved.ll
…
urem-lkk.ll
…
urem-seteq-illegal-types.ll
…
urem-seteq-nonzero.ll
…
urem-seteq-optsize.ll
…
urem-seteq-vec-nonsplat.ll
…
urem-seteq-vec-nonzero.ll
…
urem-seteq-vec-splat.ll
…
urem-seteq-vec-tautological.ll
…
urem-seteq.ll
…
urem-vector-lkk.ll
…
use-cr-result-of-dom-icmp-st.ll
…
ushl_sat.ll
…
usub_sat_plus.ll
…
usub_sat_vec.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
usub_sat.ll
…
v2i64-min-max.ll
…
v3f-to-int.ll
…
v8.2a-neon-intrinsics-constrained.ll
…
v8.4-atomic-128.ll
…
v8.4-atomic.ll
…
v8.5a-neon-frint3264-intrinsic.ll
…
v8.5a-scalar-frint3264-intrinsic.ll
…
vacg.ll
…
vararg-tallcall.ll
…
vararg.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
varargs-fixed-i16.ll
…
variant-pcs.ll
…
vcvt-oversize.ll
…
vec3-loads-ext-trunc-stores.ll
…
vec_uaddo.ll
…
vec_umulo.ll
…
vec-combine-compare-to-bitmask.ll
[AArch64][GISel] Regbank G_BITCAST using src regbank. (#191522)
2026-04-18 14:40:15 +01:00
vec-combine-compare-truncate-store.ll
…
vec-combine-trunc-dup-ext.ll
…
vec-extract-branch.ll
…
vec-libcalls.ll
…
veclib-llvm.modf.ll
…
veclib-llvm.pow.ll
…
veclib-llvm.sincos.ll
…
veclib-llvm.sincospi.ll
…
vecreduce-add-legalization.ll
…
vecreduce-add.ll
…
vecreduce-and-legalization.ll
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vecreduce-bitext.ll
…
vecreduce-bool.ll
…
vecreduce-fadd-legalization-strict.ll
…
vecreduce-fadd-legalization.ll
…
vecreduce-fadd-strict.ll
…
vecreduce-fadd.ll
[LLVM][CodeGen][AArch64] Replace tablegen based lowering of vector half/bfloat operations. (#190164)
2026-04-08 11:28:25 +01:00
vecreduce-fmax-legalization-nan.ll
…
vecreduce-fmax-legalization.ll
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vecreduce-fmaximum.ll
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vecreduce-fmin-legalization.ll
…
vecreduce-fminimum.ll
…
vecreduce-fmul-legalization-strict.ll
…
vecreduce-fmul-strict.ll
…
vecreduce-fmul.ll
[LLVM][CodeGen][AArch64] Replace tablegen based lowering of vector half/bfloat operations. (#190164)
2026-04-08 11:28:25 +01:00
vecreduce-propagate-sd-flags.ll
…
vecreduce-umax-legalization.ll
…
vector_merge_dep_check.ll
…
vector_splat-const-shift-of-constmasked.ll
…
vector-absolute-difference.ll
[AArch64] Add a few tests showing vector absolute differences (NFC) (#191383)
2026-04-15 13:03:56 +01:00
vector-compress.ll
…
vector-div-by-promoted-const-no-assertion.ll
…
vector-extract-last-active.ll
[SDAG] Follow target boolean semantics in PromoteIntOp_VECTOR_FIND_LAST_ACTIVE
2026-03-25 16:53:29 +01:00
vector-fcopysign.ll
…
vector-fcvt.ll
…
vector-gep.ll
…
vector-global-i1.ll
…
vector-insert-dag-combines.ll
…
vector-insert-shuffle-cycle.ll
…
vector-ldst-offset.ll
…
vector-llrint.ll
…
vector-lrint.ll
…
vector-minmax.ll
…
vector-op-scalarize-strict.ll
…
vector-popcnt-128-ult-ugt.ll
…
vector-to-scalar-bitmask.ll
…
verify-imm.mir
…
verify-memop.mir
…
vldn_shuffle.ll
…
volatile-combine.ll
…
vscale-and-sve-cnt-demandedbits.ll
…
vscale-constant-range.ll
[DAG] Define computeConstantRange for VSCALE folding (#176027)
2026-03-25 20:32:09 +00:00
vscale-power-of-two.ll
…
vselect-constants.ll
…
vselect-ext.ll
…
wide-scalar-shift-by-byte-multiple-legalization.ll
…
wide-scalar-shift-legalization.ll
…
win64_vararg2.ll
…
win64_vararg_float_cc.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
win64_vararg_float.ll
Revert "[AArch64][GlobalISel] Do not run the Localizer at -O0 (#177359)" (#193781)
2026-04-23 16:38:44 +01:00
win64_vararg.ll
…
win64-fpowi.ll
…
win64-jumptable.ll
…
win64-no-uwtable.ll
…
win64-nocfi.ll
…
win64cc-backup-x18.ll
…
win64cc-darwin-backup-x18.ll
…
win64cc-x18.ll
…
win_cst_pool.ll
…
win-align-chkstk.ll
…
win-alloca-no-stack-probe.ll
…
win-alloca.ll
…
win-catchpad-nested-cxx.ll
…
win-import-call-optimization-nocalls.ll
…
win-import-call-optimization.ll
…
win-loader-replaceable-function.ll
…
win-realign.ll
…
win-sve.ll
…
win-tls.ll
…
wincfi-minimal-seh-prologue.ll
…
wincfi-missing-seh-directives.ll
…
windows-extern-weak.ll
…
windows-SEH-support.ll
…
windows-trap.ll
…
wineh1.mir
…
wineh2.mir
…
wineh3.mir
…
wineh4.mir
…
wineh5.mir
…
wineh6.mir
…
wineh7.mir
…
wineh8.mir
…
wineh9.mir
[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
2026-04-17 12:23:56 +01:00
wineh_shrinkwrap.mir
…
wineh-align-stack.ll
…
wineh-aligned-stack-obj.ll
…
wineh-bti-funclet.ll
…
wineh-bti.ll
…
wineh-catchret-label-generation.ll
…
wineh-dangling-eh-pad-reference.ll
…
wineh-frame0.mir
…
wineh-frame1.mir
…
wineh-frame2.mir
…
wineh-frame3.mir
…
wineh-frame4.mir
…
wineh-frame5.mir
…
wineh-frame6.mir
…
wineh-frame7.mir
…
wineh-frame8.mir
…
wineh-frame-predecrement.mir
…
wineh-frame-scavenge.mir
…
wineh-mingw.ll
…
wineh-pac.ll
…
wineh-save-lrpair1.mir
…
wineh-save-lrpair2.mir
…
wineh-save-lrpair3.mir
…
wineh-try-catch-cbz.ll
…
wineh-try-catch-nobase.ll
…
wineh-try-catch-realign.ll
…
wineh-try-catch-vla.ll
…
wineh-try-catch.ll
…
wineh-unwindhelp-via-fp.ll
…
wrong_debug_loc_after_regalloc.ll
…
wrong-callee-save-size-after-livedebugvariables.mir
…
xar.ll
…
xbfiz.ll
…
xor-min-max.ll
…
xor.ll
…
xray-attribute-instrumentation.ll
…
xray-custom-log.ll
…
xray-omit-function-index.ll
…
xray-partial-instrumentation-skip-entry.ll
…
xray-partial-instrumentation-skip-exit.ll
…
xray-tail-call-sled.ll
…
zero-call-used-regs.ll
…
zero-reg.ll
…
zeroing-forms-abs-neg.ll
…
zeroing-forms-counts-not.ll
…
zeroing-forms-ext.ll
…
zeroing-forms-fcvt-bfcvt.ll
…
zeroing-forms-fcvtlt-fcvtx.ll
…
zeroing-forms-fcvtzsu.ll
…
zeroing-forms-flogb.ll
…
zeroing-forms-frint-frecpx-fsqrt.ll
…
zeroing-forms-rev.ll
…
zeroing-forms-urecpe-ursqrte-sqabs-sqneg.ll
…
zeroing-forms-uscvtf.ll
…
zext-logic-shift-load.ll
…
zext-reg-coalesce.mir
…
zext-shuffle.ll
…
zext-to-tbl.ll
…
zext.ll
…