44b94a4f75
This patch adds the target hooks required by Instruction Referencing for the AArch64 target, as mentioned in https://llvm.org/docs/InstrRefDebugInfo.html#target-hooks Which allows the Instruction Referenced LiveDebugValues Pass to track spills and restore instructions. With this patch we can use the `llvm/utils/llvm-locstats/llvm-locstats.py` to see the coverage statistics on a clang.dSYM built with in RelWithDebInfo we can see: coverage with dbg_value: ``` ================================================= Debug Location Statistics ================================================= cov% samples percentage(~) ------------------------------------------------- 0% 5828021 38% (0%,10%) 127739 0% [10%,20%) 143344 0% [20%,30%) 172100 1% [30%,40%) 193173 1% [40%,50%) 127366 0% [50%,60%) 308350 2% [60%,70%) 257055 1% [70%,80%) 212410 1% [80%,90%) 295316 1% [90%,100%) 349280 2% 100% 7313157 47% ================================================= -the number of debug variables processed: 15327311 -PC ranges covered: 67% ------------------------------------------------- -total availability: 62% ================================================= ``` coverage with InstrRef without target hooks fix: ``` ================================================= Debug Location Statistics ================================================= cov% samples percentage(~) ------------------------------------------------- 0% 6052807 39% (0%,10%) 127710 0% [10%,20%) 129999 0% [20%,30%) 155011 1% [30%,40%) 171206 1% [40%,50%) 102861 0% [50%,60%) 264734 1% [60%,70%) 212386 1% [70%,80%) 176872 1% [80%,90%) 242120 1% [90%,100%) 254465 1% 100% 7437215 48% ================================================= -the number of debug variables processed: 15327386 -PC ranges covered: 67% ------------------------------------------------- -total availability: 60% ================================================= ``` coverage with InstrRef with target hooks fix: ``` ================================================= Debug Location Statistics ================================================= cov% samples percentage(~) ------------------------------------------------- 0% 5972267 39% (0%,10%) 118873 0% [10%,20%) 127138 0% [20%,30%) 153181 1% [30%,40%) 170102 1% [40%,50%) 102180 0% [50%,60%) 263672 1% [60%,70%) 212865 1% [70%,80%) 176633 1% [80%,90%) 242403 1% [90%,100%) 264441 1% 100% 7494527 48% ================================================= -the number of debug variables processed: 15298282 -PC ranges covered: 71% ------------------------------------------------- -total availability: 61% ================================================= ``` I believe this should be a good indication that Instruction Referencing should be turned on for AArch64?
84 lines
3.9 KiB
LLVM
84 lines
3.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s | FileCheck %s
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target triple = "aarch64-unknown-linux-gnu"
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; Ensure we don't crash by trying to fold fixed length frame indexes into
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; loads/stores that don't support an appropriate addressing mode, hence creating
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; too many extra vregs during frame lowering, when we don't have an emergency
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; spill slot.
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define dso_local void @func1(ptr %v1, ptr %v2, ptr %v3, ptr %v4, ptr %v5, ptr %v6, ptr %v7, ptr %v8,
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; CHECK-LABEL: func1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sub sp, sp, #368
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; CHECK-NEXT: stp x29, x30, [sp, #336] // 16-byte Folded Spill
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; CHECK-NEXT: str x28, [sp, #352] // 8-byte Spill
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; CHECK-NEXT: add x29, sp, #336
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; CHECK-NEXT: .cfi_def_cfa w29, 32
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; CHECK-NEXT: .cfi_offset w28, -16
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; CHECK-NEXT: .cfi_offset w30, -24
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; CHECK-NEXT: .cfi_offset w29, -32
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; CHECK-NEXT: add x8, x29, #32
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; CHECK-NEXT: add x9, x29, #72
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: ldr z0, [x8]
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; CHECK-NEXT: add x8, x29, #256
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; CHECK-NEXT: ldr z3, [x9]
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; CHECK-NEXT: ldr z1, [x8]
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; CHECK-NEXT: add x8, x29, #288
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; CHECK-NEXT: add x9, x29, #168
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; CHECK-NEXT: ldr z2, [x8]
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; CHECK-NEXT: add x8, x29, #104
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; CHECK-NEXT: ldr z6, [x9]
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; CHECK-NEXT: ldr z4, [x8]
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; CHECK-NEXT: add x8, x29, #136
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; CHECK-NEXT: mov x12, #17 // =0x11
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; CHECK-NEXT: ldr z5, [x8]
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; CHECK-NEXT: ldp x10, x11, [x29, #336]
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; CHECK-NEXT: st1d { z6.d }, p0, [sp, x12, lsl #3]
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; CHECK-NEXT: mov x12, #13 // =0xd
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; CHECK-NEXT: ldr x8, [x29, #200]
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; CHECK-NEXT: ldr x9, [x29, #320]
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; CHECK-NEXT: st1d { z5.d }, p0, [sp, x12, lsl #3]
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; CHECK-NEXT: mov x12, #9 // =0x9
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; CHECK-NEXT: st1d { z4.d }, p0, [sp, x12, lsl #3]
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; CHECK-NEXT: mov x12, #5 // =0x5
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; CHECK-NEXT: st1d { z3.d }, p0, [sp, x12, lsl #3]
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; CHECK-NEXT: stp x10, x11, [sp, #304]
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; CHECK-NEXT: str x9, [sp, #288]
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; CHECK-NEXT: str z2, [sp, #8, mul vl]
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; CHECK-NEXT: str z1, [sp, #7, mul vl]
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; CHECK-NEXT: str x8, [sp, #168]
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; CHECK-NEXT: str z0, [sp]
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; CHECK-NEXT: bl func2
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; CHECK-NEXT: ldp x29, x30, [sp, #336] // 16-byte Folded Reload
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; CHECK-NEXT: ldr x28, [sp, #352] // 8-byte Reload
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; CHECK-NEXT: add sp, sp, #368
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; CHECK-NEXT: ret
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ptr %v9, ptr %v10, ptr %v11, ptr %v12, ptr %v13, ptr %v14, ptr %v15, ptr %v16,
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ptr %v17, ptr %v18, ptr %v19, ptr %v20, ptr %v21, ptr %v22, ptr %v23, ptr %v24,
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ptr %v25, ptr %v26, ptr %v27, ptr %v28, ptr %v29, ptr %v30, ptr %v31, ptr %v32,
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ptr %v33, ptr %v34, ptr %v35, ptr %v36, ptr %v37, ptr %v38, ptr %v39, ptr %v40,
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ptr %v41, ptr %v42, ptr %v43, ptr %v44, ptr %v45, ptr %v46, ptr %v47, ptr %v48,
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i64 %v49) #0 {
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call void @func2(ptr %v1, ptr %v2, ptr %v3, ptr %v4, ptr %v5, ptr %v6, ptr %v7, ptr %v8,
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ptr %v9, ptr %v10, ptr %v11, ptr %v12, ptr undef, ptr %v14, ptr %v15, ptr %v16,
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ptr %v17, ptr %v18, ptr %v19, ptr %v20, ptr %v21, ptr %v22, ptr %v23, ptr %v24,
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ptr %v25, ptr %v26, ptr %v27, ptr %v28, ptr %v29, ptr %v30, ptr undef, ptr undef,
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ptr undef, ptr undef, ptr undef, ptr undef, ptr %v37, ptr %v38, ptr %v39, ptr %v40,
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ptr %v41, ptr %v42, ptr %v43, ptr %v44, ptr %v45, ptr undef, ptr %v47, ptr %v48,
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i64 undef)
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ret void
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}
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declare dso_local void @func2(ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr,
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ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr,
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ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr,
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ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr,
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ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr,
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ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr,
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i64)
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attributes #0 = { "target-features"="+sve" vscale_range(2,2) }
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