80 lines
2.7 KiB
LLVM
80 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s | FileCheck %s
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target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-p:64:64-i32:32-i64:64-i128:128-n32:64-S128-Fn32"
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target triple = "aarch64-pc-windows-msvc"
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define <16 x i16> @udiv_v16i16_from_zext(<16 x i8> %x) {
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; CHECK-LABEL: udiv_v16i16_from_zext:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #21846 // =0x5556
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; CHECK-NEXT: ushll2 v1.8h, v0.16b, #0
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; CHECK-NEXT: ushll v0.8h, v0.8b, #0
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; CHECK-NEXT: dup v2.8h, w8
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; CHECK-NEXT: umull2 v3.4s, v1.8h, v2.8h
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; CHECK-NEXT: umull v1.4s, v1.4h, v2.4h
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; CHECK-NEXT: umull2 v4.4s, v0.8h, v2.8h
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; CHECK-NEXT: umull v0.4s, v0.4h, v2.4h
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; CHECK-NEXT: uzp2 v1.8h, v1.8h, v3.8h
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; CHECK-NEXT: uzp2 v0.8h, v0.8h, v4.8h
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; CHECK-NEXT: ret
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entry:
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%zext = zext <16 x i8> %x to <16 x i16>
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%div = udiv <16 x i16> %zext, splat (i16 3)
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ret <16 x i16> %div
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}
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define <16 x i16> @sdiv_v16i16_from_sext(<16 x i8> %x) {
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; CHECK-LABEL: sdiv_v16i16_from_sext:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #21846 // =0x5556
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; CHECK-NEXT: sshll2 v1.8h, v0.16b, #0
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; CHECK-NEXT: sshll v0.8h, v0.8b, #0
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; CHECK-NEXT: dup v2.8h, w8
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; CHECK-NEXT: smull2 v3.4s, v1.8h, v2.8h
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; CHECK-NEXT: smull v1.4s, v1.4h, v2.4h
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; CHECK-NEXT: smull2 v4.4s, v0.8h, v2.8h
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; CHECK-NEXT: smull v0.4s, v0.4h, v2.4h
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; CHECK-NEXT: uzp2 v1.8h, v1.8h, v3.8h
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; CHECK-NEXT: uzp2 v0.8h, v0.8h, v4.8h
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; CHECK-NEXT: usra v1.8h, v1.8h, #15
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; CHECK-NEXT: usra v0.8h, v0.8h, #15
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; CHECK-NEXT: ret
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entry:
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%sext = sext <16 x i8> %x to <16 x i16>
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%div = sdiv <16 x i16> %sext, splat (i16 3)
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ret <16 x i16> %div
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}
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define <16 x i16> @udiv_exact_v16i16_from_zext(<16 x i8> %x) {
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; CHECK-LABEL: udiv_exact_v16i16_from_zext:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #43691 // =0xaaab
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; CHECK-NEXT: ushll v2.8h, v0.8b, #0
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; CHECK-NEXT: ushll2 v0.8h, v0.16b, #0
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; CHECK-NEXT: dup v3.8h, w8
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; CHECK-NEXT: mul v1.8h, v0.8h, v3.8h
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; CHECK-NEXT: mul v0.8h, v2.8h, v3.8h
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; CHECK-NEXT: ret
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entry:
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%zext = zext <16 x i8> %x to <16 x i16>
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%div = udiv exact <16 x i16> %zext, splat (i16 3)
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ret <16 x i16> %div
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}
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define <16 x i16> @sdiv_exact_v16i16_from_sext(<16 x i8> %x) {
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; CHECK-LABEL: sdiv_exact_v16i16_from_sext:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: mov w8, #43691 // =0xaaab
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; CHECK-NEXT: sshll v2.8h, v0.8b, #0
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; CHECK-NEXT: sshll2 v0.8h, v0.16b, #0
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; CHECK-NEXT: dup v3.8h, w8
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; CHECK-NEXT: mul v1.8h, v0.8h, v3.8h
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; CHECK-NEXT: mul v0.8h, v2.8h, v3.8h
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; CHECK-NEXT: ret
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entry:
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%sext = sext <16 x i8> %x to <16 x i16>
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%div = sdiv exact <16 x i16> %sext, splat (i16 3)
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ret <16 x i16> %div
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}
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