[AMDGPU][NFC] Update MIR tests to use symbolic INLINEASM operands (#186839)
This commit is contained in:
Ivan Kosarev
@@ -77,7 +77,7 @@ static cl::opt<bool> PrintLocations("mir-debug-loc", cl::Hidden, cl::init(true),
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// TODO: Remove once the transition to the symbolic form is over.
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static cl::opt<bool>
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PrintSymbolicInlineAsmOps("print-symbolic-inline-asm-ops", cl::Hidden,
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cl::init(false),
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cl::init(true),
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cl::desc("Print inline asm operands as names"));
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namespace {
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@@ -1550,8 +1550,8 @@ define double @test_fneg_f64_fmf(double %x) {
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define void @test_trivial_inlineasm() {
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; CHECK-LABEL: name: test_trivial_inlineasm
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; CHECK: INLINEASM &wibble, 1
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; CHECK: INLINEASM &wibble, 0
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; CHECK: INLINEASM &wibble, sideeffect attdialect
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; CHECK: INLINEASM &wibble, attdialect
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call void asm sideeffect "wibble", ""()
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call void asm "wibble", ""()
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ret void
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@@ -4,8 +4,8 @@
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define void @asm_simple_memory_clobber() {
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; CHECK-LABEL: name: asm_simple_memory_clobber
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, !0
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; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, !0
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; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, !0
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; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, !0
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; CHECK-NEXT: RET_ReallyLR
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call void asm sideeffect "", "~{memory}"(), !srcloc !0
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call void asm sideeffect "", ""(), !srcloc !0
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@@ -17,7 +17,7 @@ define void @asm_simple_memory_clobber() {
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define void @asm_simple_register_clobber() {
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; CHECK-LABEL: name: asm_simple_register_clobber
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: INLINEASM &"mov x0, 7", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $x0, !0
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; CHECK-NEXT: INLINEASM &"mov x0, 7", sideeffect attdialect, clobber, implicit-def early-clobber $x0, !0
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; CHECK-NEXT: RET_ReallyLR
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call void asm sideeffect "mov x0, 7", "~{x0}"(), !srcloc !0
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ret void
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@@ -26,7 +26,7 @@ define void @asm_simple_register_clobber() {
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define i64 @asm_register_early_clobber() {
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; CHECK-LABEL: name: asm_register_early_clobber
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: INLINEASM &"mov $0, 7; mov $1, 7", 1 /* sideeffect attdialect */, {{[0-9]+}} /* regdef-ec:GPR64common */, def early-clobber %0, {{[0-9]+}} /* regdef-ec:GPR64common */, def early-clobber %1, !0
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; CHECK-NEXT: INLINEASM &"mov $0, 7; mov $1, 7", sideeffect attdialect, regdef-ec:GPR64common, def early-clobber %0, regdef-ec:GPR64common, def early-clobber %1, !0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY %0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY %1
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; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s64) = G_ADD [[COPY]], [[COPY1]]
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@@ -42,7 +42,7 @@ define i64 @asm_register_early_clobber() {
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define i32 @test_specific_register_output() nounwind ssp {
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; CHECK-LABEL: name: test_specific_register_output
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; CHECK: bb.1.entry:
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; CHECK-NEXT: INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 10 /* regdef */, implicit-def $w0
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; CHECK-NEXT: INLINEASM &"mov ${0:w}, 7", attdialect, regdef, implicit-def $w0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
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; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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@@ -54,7 +54,7 @@ entry:
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define i32 @test_single_register_output() nounwind ssp {
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; CHECK-LABEL: name: test_single_register_output
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; CHECK: bb.1.entry:
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; CHECK-NEXT: INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %0
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; CHECK-NEXT: INLINEASM &"mov ${0:w}, 7", attdialect, regdef:GPR32common, def %0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY %0
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; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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@@ -66,7 +66,7 @@ entry:
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define i64 @test_single_register_output_s64() nounwind ssp {
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; CHECK-LABEL: name: test_single_register_output_s64
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; CHECK: bb.1.entry:
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; CHECK-NEXT: INLINEASM &"mov $0, 7", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR64common */, def %0
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; CHECK-NEXT: INLINEASM &"mov $0, 7", attdialect, regdef:GPR64common, def %0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY %0
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; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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@@ -79,7 +79,7 @@ entry:
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define float @test_multiple_register_outputs_same() #0 {
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; CHECK-LABEL: name: test_multiple_register_outputs_same
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: INLINEASM &"mov $0, #0; mov $1, #0", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %0, {{[0-9]+}} /* regdef:GPR32common */, def %1
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; CHECK-NEXT: INLINEASM &"mov $0, #0; mov $1, #0", attdialect, regdef:GPR32common, def %0, regdef:GPR32common, def %1
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY %0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY %1
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; CHECK-NEXT: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[COPY]], [[COPY1]]
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@@ -96,7 +96,7 @@ define float @test_multiple_register_outputs_same() #0 {
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define double @test_multiple_register_outputs_mixed() #0 {
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; CHECK-LABEL: name: test_multiple_register_outputs_mixed
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: INLINEASM &"mov $0, #0; mov $1, #0", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %0, {{[0-9]+}} /* regdef:FPR64 */, def %1
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; CHECK-NEXT: INLINEASM &"mov $0, #0; mov $1, #0", attdialect, regdef:GPR32common, def %0, regdef:FPR64, def %1
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY %0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY %1
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; CHECK-NEXT: $d0 = COPY [[COPY1]](s64)
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@@ -109,7 +109,7 @@ define double @test_multiple_register_outputs_mixed() #0 {
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define i32 @test_specific_register_output_trunc() nounwind ssp {
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; CHECK-LABEL: name: test_specific_register_output_trunc
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; CHECK: bb.1.entry:
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; CHECK-NEXT: INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 10 /* regdef */, implicit-def $x0
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; CHECK-NEXT: INLINEASM &"mov ${0:w}, 7", attdialect, regdef, implicit-def $x0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[COPY]](s64)
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; CHECK-NEXT: $w0 = COPY [[TRUNC]](s32)
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@@ -125,7 +125,7 @@ define zeroext i8 @test_register_output_trunc(ptr %src) nounwind {
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK-NEXT: INLINEASM &"mov ${0:w}, 32", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %1
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; CHECK-NEXT: INLINEASM &"mov ${0:w}, 32", attdialect, regdef:GPR32common, def %1
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY %1
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
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; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC]](s8)
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@@ -140,7 +140,7 @@ define float @test_vector_output() nounwind {
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; CHECK-LABEL: name: test_vector_output
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; CHECK-NEXT: INLINEASM &"fmov ${0}.2s, #1.0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $d14
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; CHECK-NEXT: INLINEASM &"fmov ${0}.2s, #1.0", sideeffect attdialect, regdef, implicit-def $d14
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $d14
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; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s32>), [[C]](s64)
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; CHECK-NEXT: $s0 = COPY [[EVEC]](s32)
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@@ -155,7 +155,7 @@ define void @test_input_register_imm() {
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 42
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY [[C]](s64)
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; CHECK-NEXT: INLINEASM &"mov x0, $0", 1 /* sideeffect attdialect */, {{[0-9]+}} /* reguse:GPR64common */, [[COPY]]
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; CHECK-NEXT: INLINEASM &"mov x0, $0", sideeffect attdialect, reguse:GPR64common, [[COPY]]
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; CHECK-NEXT: RET_ReallyLR
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call void asm sideeffect "mov x0, $0", "r"(i64 42)
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ret void
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@@ -166,7 +166,7 @@ define i32 @test_boolean_imm_ext() {
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; CHECK-LABEL: name: test_boolean_imm_ext
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; CHECK: bb.1.entry:
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
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; CHECK-NEXT: INLINEASM &"#TEST 42 + ${0:c} - .\0A\09", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 1
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; CHECK-NEXT: INLINEASM &"#TEST 42 + ${0:c} - .\0A\09", sideeffect mayload attdialect, imm, 1
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; CHECK-NEXT: $w0 = COPY [[C]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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entry:
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@@ -177,7 +177,7 @@ entry:
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define void @test_input_imm() {
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; CHECK-LABEL: name: test_input_imm
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: INLINEASM &"mov x0, $0", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 42
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; CHECK-NEXT: INLINEASM &"mov x0, $0", sideeffect mayload attdialect, imm, 42
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; CHECK-NEXT: RET_ReallyLR
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call void asm sideeffect "mov x0, $0", "i"(i64 42)
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ret void
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@@ -187,7 +187,7 @@ define void @test_input_imm() {
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define void @test_immediate_constraint_sym() {
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; CHECK-LABEL: name: test_immediate_constraint_sym
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: INLINEASM &"#TEST $0", 9 /* sideeffect mayload attdialect */, 13 /* imm */, @var
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; CHECK-NEXT: INLINEASM &"#TEST $0", sideeffect mayload attdialect, imm, @var
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; CHECK-NEXT: RET_ReallyLR
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call void asm sideeffect "#TEST $0", "i"(ptr @var)
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ret void
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@@ -196,7 +196,7 @@ define void @test_immediate_constraint_sym() {
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define void @test_s_constraint() {
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; CHECK-LABEL: name: test_s_constraint
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: INLINEASM &"#TEST $0", 9 /* sideeffect mayload attdialect */, 13 /* imm */, @var
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; CHECK-NEXT: INLINEASM &"#TEST $0", sideeffect mayload attdialect, imm, @var
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; CHECK-NEXT: RET_ReallyLR
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call void asm sideeffect "#TEST $0", "s"(ptr @var)
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ret void
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@@ -209,7 +209,7 @@ define zeroext i8 @test_input_register(ptr %src) nounwind {
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY [[COPY]](p0)
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; CHECK-NEXT: INLINEASM &"ldtrb ${0:w}, [$1]", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %1, {{[0-9]+}} /* reguse:GPR64common */, [[COPY1]]
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; CHECK-NEXT: INLINEASM &"ldtrb ${0:w}, [$1]", attdialect, regdef:GPR32common, def %1, reguse:GPR64common, [[COPY1]]
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY %1
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
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; CHECK-NEXT: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[TRUNC]](s8)
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@@ -226,7 +226,7 @@ define i32 @test_memory_constraint(ptr %a) nounwind {
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; CHECK-NEXT: liveins: $x0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
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; CHECK-NEXT: INLINEASM &"ldr $0, $1", 8 /* mayload attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %1, 262158 /* mem:m */, [[COPY]](p0)
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; CHECK-NEXT: INLINEASM &"ldr $0, $1", mayload attdialect, regdef:GPR32common, def %1, mem:m, [[COPY]](p0)
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY %1
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; CHECK-NEXT: $w0 = COPY [[COPY1]](s32)
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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@@ -240,7 +240,7 @@ define i16 @test_anyext_input() {
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
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; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s16)
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY [[ANYEXT]](s32)
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; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %0, {{[0-9]+}} /* reguse:GPR32common */, [[COPY]]
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; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:GPR32common, def %0, reguse:GPR32common, [[COPY]]
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY %0
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
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; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)
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@@ -256,7 +256,7 @@ define i16 @test_anyext_input_with_matching_constraint() {
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 1
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; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[C]](s16)
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32common = COPY [[ANYEXT]](s32)
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; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %0, 2147483657 /* reguse tiedto:$0 */, [[COPY]](tied-def 3)
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; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:GPR32common, def %0, reguse tiedto:$0, [[COPY]](tied-def 3)
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY %0
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
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; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(s32) = G_ANYEXT [[TRUNC]](s16)
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@@ -269,11 +269,11 @@ define i16 @test_anyext_input_with_matching_constraint() {
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define i64 @test_input_with_matching_constraint_to_physical_register() {
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; CHECK-LABEL: name: test_input_with_matching_constraint_to_physical_register
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; CHECK: bb.1 (%ir-block.0):
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; CHECK-NEXT: %0:_(s64) = G_CONSTANT i64 0
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; CHECK-NEXT: %1:gpr64arg = COPY %0(s64)
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; CHECK-NEXT: INLINEASM &"", 0 /* attdialect */, 10 /* regdef */, implicit-def $x2, 2147483657 /* reguse tiedto:$0 */, %1(tied-def 3)
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; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x2
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; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64arg = COPY [[C]](s64)
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; CHECK-NEXT: INLINEASM &"", attdialect, regdef, implicit-def $x2, reguse tiedto:$0, [[COPY]](tied-def 3)
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x2
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; CHECK-NEXT: $x0 = COPY [[COPY1]](s64)
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%1 = tail call i64 asm "", "={x2},0"(i64 0)
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ret i64 %1
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@@ -290,7 +290,7 @@ define void @test_indirectify_i32_value(i32 %x, i32 %y) {
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; CHECK-NEXT: G_STORE [[COPY]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %stack.0)
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; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
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; CHECK-NEXT: G_STORE [[COPY1]](s32), [[FRAME_INDEX1]](p0) :: (store (s32) into %stack.1)
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; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, {{[0-9]+}} /* mem:m */, [[FRAME_INDEX]](p0), 262158 /* mem:m */, [[FRAME_INDEX1]](p0)
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; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p0), mem:m, [[FRAME_INDEX1]](p0)
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; CHECK-NEXT: RET_ReallyLR
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entry:
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tail call void asm sideeffect "", "imr,imr,~{memory}"(i32 %x, i32 %y)
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@@ -306,7 +306,7 @@ define void @test_indirectify_i32_constant() {
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; CHECK-NEXT: G_STORE [[C]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %stack.0)
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; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.1
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; CHECK-NEXT: G_STORE [[C1]](s32), [[FRAME_INDEX1]](p0) :: (store (s32) into %stack.1)
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; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, {{[0-9]+}} /* mem:m */, [[FRAME_INDEX]](p0), 262158 /* mem:m */, [[FRAME_INDEX1]](p0)
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; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p0), mem:m, [[FRAME_INDEX1]](p0)
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; CHECK-NEXT: RET_ReallyLR
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entry:
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tail call void asm sideeffect "", "imr,imr,~{memory}"(i32 42, i32 0)
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@@ -322,7 +322,7 @@ define void @test_indirectify_i16_value(i16 %val) {
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; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
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; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
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; CHECK-NEXT: G_STORE [[TRUNC]](s16), [[FRAME_INDEX]](p0) :: (store (s16) into %stack.0)
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; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, {{[0-9]+}} /* mem:m */, [[FRAME_INDEX]](p0)
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; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p0)
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; CHECK-NEXT: RET_ReallyLR
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entry:
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tail call void asm sideeffect "", "imr,~{memory}"(i16 %val)
|
||||
@@ -335,7 +335,7 @@ define void @test_indirectify_i16_constant() {
|
||||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 42
|
||||
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
|
||||
; CHECK-NEXT: G_STORE [[C]](s16), [[FRAME_INDEX]](p0) :: (store (s16) into %stack.0)
|
||||
; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, {{[0-9]+}} /* mem:m */, [[FRAME_INDEX]](p0)
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p0)
|
||||
; CHECK-NEXT: RET_ReallyLR
|
||||
entry:
|
||||
tail call void asm sideeffect "", "imr,~{memory}"(i16 42)
|
||||
@@ -350,7 +350,7 @@ define void @test_indirectify_i64_value(i64 %val) {
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
|
||||
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
|
||||
; CHECK-NEXT: G_STORE [[COPY]](s64), [[FRAME_INDEX]](p0) :: (store (s64) into %stack.0)
|
||||
; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, {{[0-9]+}} /* mem:m */, [[FRAME_INDEX]](p0)
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p0)
|
||||
; CHECK-NEXT: RET_ReallyLR
|
||||
entry:
|
||||
tail call void asm sideeffect "", "imr,~{memory}"(i64 %val)
|
||||
@@ -363,7 +363,7 @@ define void @test_indirectify_i64_constant() {
|
||||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 42
|
||||
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0
|
||||
; CHECK-NEXT: G_STORE [[C]](s64), [[FRAME_INDEX]](p0) :: (store (s64) into %stack.0)
|
||||
; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, {{[0-9]+}} /* mem:m */, [[FRAME_INDEX]](p0)
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p0)
|
||||
; CHECK-NEXT: RET_ReallyLR
|
||||
entry:
|
||||
tail call void asm sideeffect "", "imr,~{memory}"(i64 42)
|
||||
|
||||
@@ -21,7 +21,7 @@ define dso_local void @test() personality ptr @__gxx_personality_v0 {
|
||||
; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @.str.2
|
||||
; CHECK-NEXT: G_INVOKE_REGION_START
|
||||
; CHECK-NEXT: EH_LABEL <mcsymbol >
|
||||
; CHECK-NEXT: INLINEASM &"bl trap", 65 /* sideeffect unwind attdialect */
|
||||
; CHECK-NEXT: INLINEASM &"bl trap", sideeffect unwind attdialect
|
||||
; CHECK-NEXT: EH_LABEL <mcsymbol >
|
||||
; CHECK-NEXT: G_BR %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -71,7 +71,7 @@ define void @test2() #0 personality ptr @__gcc_personality_v0 {
|
||||
; CHECK-NEXT: G_INVOKE_REGION_START
|
||||
; CHECK-NEXT: EH_LABEL <mcsymbol >
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY [[DEF]](p0)
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, {{[0-9]+}} /* reguse:GPR64common */, [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, reguse:GPR64common, [[COPY]]
|
||||
; CHECK-NEXT: EH_LABEL <mcsymbol >
|
||||
; CHECK-NEXT: G_BR %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
|
||||
@@ -29,7 +29,7 @@ body: |
|
||||
; CHECK-NEXT: $x15 = COPY [[DEF]](s64)
|
||||
; CHECK-NEXT: $x16 = COPY [[DEF]](s64)
|
||||
; CHECK-NEXT: $x17 = COPY [[DEF]](s64)
|
||||
; CHECK-NEXT: INLINEASM &"svc 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x0, 10 /* regdef */, implicit-def $x1, 10 /* regdef */, implicit-def $x2, 10 /* regdef */, implicit-def $x3, 10 /* regdef */, implicit-def $x4, 10 /* regdef */, implicit-def $x5, 10 /* regdef */, implicit-def $x6, 10 /* regdef */, implicit-def $x7, 10 /* regdef */, implicit-def $x8, 10 /* regdef */, implicit-def $x9, 10 /* regdef */, implicit-def $x10, 10 /* regdef */, implicit-def $x11, 10 /* regdef */, implicit-def $x12, 10 /* regdef */, implicit-def $x13, 10 /* regdef */, implicit-def $x14, 10 /* regdef */, implicit-def $x15, 10 /* regdef */, implicit-def $x16, 10 /* regdef */, implicit-def $x17, 9 /* reguse */, $x0, 9 /* reguse */, $x1, 9 /* reguse */, $x2, 9 /* reguse */, $x3, 9 /* reguse */, $x4, 9 /* reguse */, $x5, 9 /* reguse */, $x6, 9 /* reguse */, $x7, 9 /* reguse */, $x8, 9 /* reguse */, $x9, 9 /* reguse */, $x10, 9 /* reguse */, $x11, 9 /* reguse */, $x12, 9 /* reguse */, $x13, 9 /* reguse */, $x14, 9 /* reguse */, $x15, 9 /* reguse */, $x16, 9 /* reguse */, $x17
|
||||
; CHECK-NEXT: INLINEASM &"svc 0", sideeffect attdialect, regdef, implicit-def $x0, regdef, implicit-def $x1, regdef, implicit-def $x2, regdef, implicit-def $x3, regdef, implicit-def $x4, regdef, implicit-def $x5, regdef, implicit-def $x6, regdef, implicit-def $x7, regdef, implicit-def $x8, regdef, implicit-def $x9, regdef, implicit-def $x10, regdef, implicit-def $x11, regdef, implicit-def $x12, regdef, implicit-def $x13, regdef, implicit-def $x14, regdef, implicit-def $x15, regdef, implicit-def $x16, regdef, implicit-def $x17, reguse, $x0, reguse, $x1, reguse, $x2, reguse, $x3, reguse, $x4, reguse, $x5, reguse, $x6, reguse, $x7, reguse, $x8, reguse, $x9, reguse, $x10, reguse, $x11, reguse, $x12, reguse, $x13, reguse, $x14, reguse, $x15, reguse, $x16, reguse, $x17
|
||||
; CHECK-NEXT: RET_ReallyLR
|
||||
%0:_(s64) = G_IMPLICIT_DEF
|
||||
$x0 = COPY %0(s64)
|
||||
@@ -50,7 +50,7 @@ body: |
|
||||
$x15 = COPY %0(s64)
|
||||
$x16 = COPY %0(s64)
|
||||
$x17 = COPY %0(s64)
|
||||
INLINEASM &"svc 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x0, 10 /* regdef */, implicit-def $x1, 10 /* regdef */, implicit-def $x2, 10 /* regdef */, implicit-def $x3, 10 /* regdef */, implicit-def $x4, 10 /* regdef */, implicit-def $x5, 10 /* regdef */, implicit-def $x6, 10 /* regdef */, implicit-def $x7, 10 /* regdef */, implicit-def $x8, 10 /* regdef */, implicit-def $x9, 10 /* regdef */, implicit-def $x10, 10 /* regdef */, implicit-def $x11, 10 /* regdef */, implicit-def $x12, 10 /* regdef */, implicit-def $x13, 10 /* regdef */, implicit-def $x14, 10 /* regdef */, implicit-def $x15, 10 /* regdef */, implicit-def $x16, 10 /* regdef */, implicit-def $x17, 9 /* reguse */, $x0, 9 /* reguse */, $x1, 9 /* reguse */, $x2, 9 /* reguse */, $x3, 9 /* reguse */, $x4, 9 /* reguse */, $x5, 9 /* reguse */, $x6, 9 /* reguse */, $x7, 9 /* reguse */, $x8, 9 /* reguse */, $x9, 9 /* reguse */, $x10, 9 /* reguse */, $x11, 9 /* reguse */, $x12, 9 /* reguse */, $x13, 9 /* reguse */, $x14, 9 /* reguse */, $x15, 9 /* reguse */, $x16, 9 /* reguse */, $x17
|
||||
INLINEASM &"svc 0", sideeffect attdialect, regdef, implicit-def $x0, regdef, implicit-def $x1, regdef, implicit-def $x2, regdef, implicit-def $x3, regdef, implicit-def $x4, regdef, implicit-def $x5, regdef, implicit-def $x6, regdef, implicit-def $x7, regdef, implicit-def $x8, regdef, implicit-def $x9, regdef, implicit-def $x10, regdef, implicit-def $x11, regdef, implicit-def $x12, regdef, implicit-def $x13, regdef, implicit-def $x14, regdef, implicit-def $x15, regdef, implicit-def $x16, regdef, implicit-def $x17, reguse, $x0, reguse, $x1, reguse, $x2, reguse, $x3, reguse, $x4, reguse, $x5, reguse, $x6, reguse, $x7, reguse, $x8, reguse, $x9, reguse, $x10, reguse, $x11, reguse, $x12, reguse, $x13, reguse, $x14, reguse, $x15, reguse, $x16, reguse, $x17
|
||||
RET_ReallyLR
|
||||
|
||||
...
|
||||
|
||||
@@ -9,11 +9,11 @@ tracksRegLiveness: true
|
||||
body: |
|
||||
bb.1:
|
||||
; CHECK-LABEL: name: inlineasm_memory_clobber
|
||||
; CHECK: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; CHECK: INLINEASM &"", sideeffect mayload maystore attdialect
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; CHECK-NEXT: RET_ReallyLR
|
||||
INLINEASM &"", 25
|
||||
INLINEASM &"", 1
|
||||
INLINEASM &"", sideeffect attdialect
|
||||
RET_ReallyLR
|
||||
...
|
||||
|
||||
@@ -25,7 +25,7 @@ tracksRegLiveness: true
|
||||
body: |
|
||||
bb.1:
|
||||
; CHECK-LABEL: name: inlineasm_register_clobber
|
||||
; CHECK: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 12 /* clobber */, implicit-def early-clobber $d0
|
||||
; CHECK: INLINEASM &"", sideeffect mayload maystore attdialect, clobber, implicit-def early-clobber $d0
|
||||
; CHECK-NEXT: RET_ReallyLR
|
||||
INLINEASM &"", 25, 12, implicit-def early-clobber $d0
|
||||
RET_ReallyLR
|
||||
@@ -39,11 +39,11 @@ tracksRegLiveness: true
|
||||
body: |
|
||||
bb.1:
|
||||
; CHECK-LABEL: name: inlineasm_phys_reg_output
|
||||
; CHECK: INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 10 /* regdef */, implicit-def $w0
|
||||
; CHECK: INLINEASM &"mov ${0:w}, 7", attdialect, regdef, implicit-def $w0
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY $w0
|
||||
; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $w0
|
||||
INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 10 /* regdef */, implicit-def $w0
|
||||
INLINEASM &"mov ${0:w}, 7", attdialect, regdef, implicit-def $w0
|
||||
%0:_(s32) = COPY $w0
|
||||
$w0 = COPY %0(s32)
|
||||
RET_ReallyLR implicit $w0
|
||||
@@ -57,11 +57,11 @@ tracksRegLiveness: true
|
||||
body: |
|
||||
bb.1:
|
||||
; CHECK-LABEL: name: inlineasm_virt_reg_output
|
||||
; CHECK: INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 2818058 /* regdef:GPR32common */, def %0
|
||||
; CHECK: INLINEASM &"mov ${0:w}, 7", attdialect, regdef:GPR32common, def %0
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %0
|
||||
; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $w0
|
||||
INLINEASM &"mov ${0:w}, 7", 0 /* attdialect */, 2818058 /* regdef:GPR32common */, def %0:gpr32common
|
||||
INLINEASM &"mov ${0:w}, 7", attdialect, regdef:GPR32common, def %0:gpr32common
|
||||
%1:_(s32) = COPY %0
|
||||
$w0 = COPY %1(s32)
|
||||
RET_ReallyLR implicit $w0
|
||||
@@ -75,12 +75,12 @@ tracksRegLiveness: true
|
||||
body: |
|
||||
bb.1:
|
||||
; CHECK-LABEL: name: inlineasm_virt_mixed_types
|
||||
; CHECK: INLINEASM &"mov $0, #0; mov $1, #0", 0 /* attdialect */, 2818058 /* regdef:GPR32common */, def %0, 3670026 /* regdef:FPR64 */, def %1
|
||||
; CHECK: INLINEASM &"mov $0, #0; mov $1, #0", attdialect, regdef:GPR32common, def %0, regdef:FPR64, def %1
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr(s32) = COPY %0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:fpr(s64) = COPY %1
|
||||
; CHECK-NEXT: $d0 = COPY [[COPY1]](s64)
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $d0
|
||||
INLINEASM &"mov $0, #0; mov $1, #0", 0 /* attdialect */, 2818058 /* regdef:GPR32common */, def %0:gpr32common, 3670026 /* regdef:FPR64 */, def %1:fpr64
|
||||
INLINEASM &"mov $0, #0; mov $1, #0", attdialect, regdef:GPR32common, def %0:gpr32common, regdef:FPR64, def %1:fpr64
|
||||
%3:_(s32) = COPY %0
|
||||
%4:_(s64) = COPY %1
|
||||
$d0 = COPY %4(s64)
|
||||
|
||||
@@ -5,7 +5,7 @@ entry:
|
||||
; CHECK: %0:ppr = COPY $p0
|
||||
; CHECK: STR_PXI %0, %stack.0.predcnt.addr, 0 :: (store (<vscale x 1 x s16>) into %ir.predcnt.addr)
|
||||
; CHECK: %1:pnr_p8to15 = COPY %0
|
||||
; CHECK: INLINEASM &"ld1w {z0.s,z1.s,z2.s,z3.s}, $0/z, [x10]", 1 /* sideeffect attdialect */, {{[0-9]+}} /* reguse:PNR_p8to15 */, %1
|
||||
; CHECK: INLINEASM &"ld1w {z0.s,z1.s,z2.s,z3.s}, $0/z, [x10]", sideeffect attdialect, reguse:PNR_p8to15, %1
|
||||
; CHECK: RET_ReallyLR
|
||||
%predcnt.addr = alloca target("aarch64.svcount"), align 2
|
||||
store target("aarch64.svcount") %predcnt, ptr %predcnt.addr, align 2
|
||||
@@ -19,7 +19,7 @@ entry:
|
||||
; CHECK: %0:ppr = COPY $p0
|
||||
; CHECK: STR_PXI %0, %stack.0.predcnt.addr, 0 :: (store (<vscale x 1 x s16>) into %ir.predcnt.addr)
|
||||
; CHECK: %1:pnr = COPY %0
|
||||
; CHECK: INLINEASM &"ld1w {z0.s,z1.s,z2.s,z3.s}, $0/z, [x10]", 1 /* sideeffect attdialect */, {{[0-9]+}} /* reguse:PNR */, %1
|
||||
; CHECK: INLINEASM &"ld1w {z0.s,z1.s,z2.s,z3.s}, $0/z, [x10]", sideeffect attdialect, reguse:PNR, %1
|
||||
; CHECK: RET_ReallyLR
|
||||
%predcnt.addr = alloca target("aarch64.svcount"), align 2
|
||||
store target("aarch64.svcount") %predcnt, ptr %predcnt.addr, align 2
|
||||
@@ -33,7 +33,7 @@ entry:
|
||||
; CHECK: %0:ppr = COPY $p0
|
||||
; CHECK: STR_PXI %0, %stack.0.predcnt.addr, 0 :: (store (<vscale x 1 x s16>) into %ir.predcnt.addr)
|
||||
; CHECK: %1:pnr_3b = COPY %0
|
||||
; CHECK: INLINEASM &"fadd z0.h, $0/m, z0.h, #0.5", 1 /* sideeffect attdialect */, {{[0-9]+}} /* reguse:PNR_3b */, %1
|
||||
; CHECK: INLINEASM &"fadd z0.h, $0/m, z0.h, #0.5", sideeffect attdialect, reguse:PNR_3b, %1
|
||||
; CHECK: RET_ReallyLR
|
||||
%predcnt.addr = alloca target("aarch64.svcount"), align 2
|
||||
store target("aarch64.svcount") %predcnt, ptr %predcnt.addr, align 2
|
||||
|
||||
@@ -13,7 +13,7 @@ define <vscale x 16 x i8> @test_svadd_i8(<vscale x 16 x i8> %Zn, <vscale x 16 x
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z0
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:zpr = COPY [[COPY1]]
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:zpr_3b = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"add $0.b, $1.b, $2.b", 0 /* attdialect */, {{[0-9]+}} /* regdef:ZPR */, def %2, {{[0-9]+}} /* reguse:ZPR */, [[COPY2]], {{[0-9]+}} /* reguse:ZPR_3b */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"add $0.b, $1.b, $2.b", attdialect, regdef:ZPR, def %2, reguse:ZPR, [[COPY2]], reguse:ZPR_3b, [[COPY3]]
|
||||
; CHECK-NEXT: $z0 = COPY %2
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $z0
|
||||
%1 = tail call <vscale x 16 x i8> asm "add $0.b, $1.b, $2.b", "=w,w,y"(<vscale x 16 x i8> %Zn, <vscale x 16 x i8> %Zm)
|
||||
@@ -29,7 +29,7 @@ define <vscale x 2 x i64> @test_svsub_i64(<vscale x 2 x i64> %Zn, <vscale x 2 x
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z0
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:zpr = COPY [[COPY1]]
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:zpr_4b = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"sub $0.d, $1.d, $2.d", 0 /* attdialect */, {{[0-9]+}} /* regdef:ZPR */, def %2, {{[0-9]+}} /* reguse:ZPR */, [[COPY2]], {{[0-9]+}} /* reguse:ZPR_4b */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"sub $0.d, $1.d, $2.d", attdialect, regdef:ZPR, def %2, reguse:ZPR, [[COPY2]], reguse:ZPR_4b, [[COPY3]]
|
||||
; CHECK-NEXT: $z0 = COPY %2
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $z0
|
||||
%1 = tail call <vscale x 2 x i64> asm "sub $0.d, $1.d, $2.d", "=w,w,x"(<vscale x 2 x i64> %Zn, <vscale x 2 x i64> %Zm)
|
||||
@@ -45,7 +45,7 @@ define <vscale x 8 x half> @test_svfmul_f16(<vscale x 8 x half> %Zn, <vscale x 8
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z0
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:zpr = COPY [[COPY1]]
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:zpr_3b = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"fmul $0.h, $1.h, $2.h", 0 /* attdialect */, {{[0-9]+}} /* regdef:ZPR */, def %2, {{[0-9]+}} /* reguse:ZPR */, [[COPY2]], {{[0-9]+}} /* reguse:ZPR_3b */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"fmul $0.h, $1.h, $2.h", attdialect, regdef:ZPR, def %2, reguse:ZPR, [[COPY2]], reguse:ZPR_3b, [[COPY3]]
|
||||
; CHECK-NEXT: $z0 = COPY %2
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $z0
|
||||
%1 = tail call <vscale x 8 x half> asm "fmul $0.h, $1.h, $2.h", "=w,w,y"(<vscale x 8 x half> %Zn, <vscale x 8 x half> %Zm)
|
||||
@@ -61,7 +61,7 @@ define <vscale x 4 x float> @test_svfmul_f(<vscale x 4 x float> %Zn, <vscale x 4
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:zpr = COPY $z0
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:zpr = COPY [[COPY1]]
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:zpr_4b = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"fmul $0.s, $1.s, $2.s", 0 /* attdialect */, {{[0-9]+}} /* regdef:ZPR */, def %2, {{[0-9]+}} /* reguse:ZPR */, [[COPY2]], {{[0-9]+}} /* reguse:ZPR_4b */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"fmul $0.s, $1.s, $2.s", attdialect, regdef:ZPR, def %2, reguse:ZPR, [[COPY2]], reguse:ZPR_4b, [[COPY3]]
|
||||
; CHECK-NEXT: $z0 = COPY %2
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $z0
|
||||
%1 = tail call <vscale x 4 x float> asm "fmul $0.s, $1.s, $2.s", "=w,w,x"(<vscale x 4 x float> %Zn, <vscale x 4 x float> %Zm)
|
||||
@@ -79,7 +79,7 @@ define <vscale x 8 x half> @test_svfadd_f16(<vscale x 16 x i1> %Pg, <vscale x 8
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:ppr_3b = COPY [[COPY2]]
|
||||
; CHECK-NEXT: [[COPY4:%[0-9]+]]:zpr = COPY [[COPY1]]
|
||||
; CHECK-NEXT: [[COPY5:%[0-9]+]]:zpr = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"fadd $0.h, $1/m, $2.h, $3.h", 0 /* attdialect */, {{[0-9]+}} /* regdef:ZPR */, def %3, {{[0-9]+}} /* reguse:PPR_3b */, [[COPY3]], {{[0-9]+}} /* reguse:ZPR */, [[COPY4]], {{[0-9]+}} /* reguse:ZPR */, [[COPY5]]
|
||||
; CHECK-NEXT: INLINEASM &"fadd $0.h, $1/m, $2.h, $3.h", attdialect, regdef:ZPR, def %3, reguse:PPR_3b, [[COPY3]], reguse:ZPR, [[COPY4]], reguse:ZPR, [[COPY5]]
|
||||
; CHECK-NEXT: $z0 = COPY %3
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $z0
|
||||
%1 = tail call <vscale x 8 x half> asm "fadd $0.h, $1/m, $2.h, $3.h", "=w,@3Upl,w,w"(<vscale x 16 x i1> %Pg, <vscale x 8 x half> %Zn, <vscale x 8 x half> %Zm)
|
||||
@@ -95,7 +95,7 @@ define <vscale x 4 x i32> @test_incp(<vscale x 16 x i1> %Pg, <vscale x 4 x i32>
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:ppr = COPY $p0
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:ppr = COPY [[COPY1]]
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:zpr = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"incp $0.s, $1", 0 /* attdialect */, {{[0-9]+}} /* regdef:ZPR */, def %2, {{[0-9]+}} /* reguse:PPR */, [[COPY2]], {{[0-9]+}} /* reguse tiedto:$0 */, [[COPY3]](tied-def 3)
|
||||
; CHECK-NEXT: INLINEASM &"incp $0.s, $1", attdialect, regdef:ZPR, def %2, reguse:PPR, [[COPY2]], reguse tiedto:$0, [[COPY3]](tied-def 3)
|
||||
; CHECK-NEXT: $z0 = COPY %2
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $z0
|
||||
%1 = tail call <vscale x 4 x i32> asm "incp $0.s, $1", "=w,@3Upa,0"(<vscale x 16 x i1> %Pg, <vscale x 4 x i32> %Zn)
|
||||
@@ -113,7 +113,7 @@ define <vscale x 8 x half> @test_svfadd_f16_Uph_constraint(<vscale x 16 x i1> %P
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:ppr_p8to15 = COPY [[COPY2]]
|
||||
; CHECK-NEXT: [[COPY4:%[0-9]+]]:zpr = COPY [[COPY1]]
|
||||
; CHECK-NEXT: [[COPY5:%[0-9]+]]:zpr = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"fadd $0.h, $1/m, $2.h, $3.h", 0 /* attdialect */, {{[0-9]+}} /* regdef:ZPR */, def %3, {{[0-9]+}} /* reguse:PPR_p8to15 */, [[COPY3]], {{[0-9]+}} /* reguse:ZPR */, [[COPY4]], {{[0-9]+}} /* reguse:ZPR */, [[COPY5]]
|
||||
; CHECK-NEXT: INLINEASM &"fadd $0.h, $1/m, $2.h, $3.h", attdialect, regdef:ZPR, def %3, reguse:PPR_p8to15, [[COPY3]], reguse:ZPR, [[COPY4]], reguse:ZPR, [[COPY5]]
|
||||
; CHECK-NEXT: $z0 = COPY %3
|
||||
; CHECK-NEXT: RET_ReallyLR implicit $z0
|
||||
%1 = tail call <vscale x 8 x half> asm "fadd $0.h, $1/m, $2.h, $3.h", "=w,@3Uph,w,w"(<vscale x 16 x i1> %Pg, <vscale x 8 x half> %Zn, <vscale x 8 x half> %Zm)
|
||||
@@ -129,7 +129,7 @@ define void @explicit_p0(ptr %p) {
|
||||
; CHECK-NEXT: [[PTRUE_B:%[0-9]+]]:ppr = PTRUE_B 31, implicit $vg
|
||||
; CHECK-NEXT: $p0 = COPY [[PTRUE_B]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"ld4w { z0.s, z1.s, z2.s, z3.s }, $1/z, [$0]", 1 /* sideeffect attdialect */, {{[0-9]+}} /* regdef:GPR64common */, def %1, 9 /* reguse */, $p0, 2147483657 /* reguse tiedto:$0 */, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: INLINEASM &"ld4w { z0.s, z1.s, z2.s, z3.s }, $1/z, [$0]", sideeffect attdialect, regdef:GPR64common, def %1, reguse, $p0, reguse tiedto:$0, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: RET_ReallyLR
|
||||
%1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.b8(i32 31)
|
||||
%2 = tail call i64 asm sideeffect "ld4w { z0.s, z1.s, z2.s, z3.s }, $1/z, [$0]", "=r,{p0},0"(<vscale x 16 x i1> %1, ptr %p)
|
||||
@@ -145,7 +145,7 @@ define void @explicit_p8_invalid(ptr %p) {
|
||||
; CHECK-NEXT: [[PTRUE_B:%[0-9]+]]:ppr = PTRUE_B 31, implicit $vg
|
||||
; CHECK-NEXT: $p8 = COPY [[PTRUE_B]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"ld4w { z0.s, z1.s, z2.s, z3.s }, $1/z, [$0]", 1 /* sideeffect attdialect */, {{[0-9]+}} /* regdef:GPR64common */, def %1, 9 /* reguse */, $p8, 2147483657 /* reguse tiedto:$0 */, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: INLINEASM &"ld4w { z0.s, z1.s, z2.s, z3.s }, $1/z, [$0]", sideeffect attdialect, regdef:GPR64common, def %1, reguse, $p8, reguse tiedto:$0, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: RET_ReallyLR
|
||||
%1 = tail call <vscale x 16 x i1> @llvm.aarch64.sve.ptrue.b8(i32 31)
|
||||
%2 = tail call i64 asm sideeffect "ld4w { z0.s, z1.s, z2.s, z3.s }, $1/z, [$0]", "=r,{p8},0"(<vscale x 16 x i1> %1, ptr %p)
|
||||
@@ -161,7 +161,7 @@ define void @explicit_pn8(ptr %p) {
|
||||
; CHECK-NEXT: [[PTRUE_C_B:%[0-9]+]]:pnr_p8to15 = PTRUE_C_B implicit $vg
|
||||
; CHECK-NEXT: $pn8 = COPY [[PTRUE_C_B]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"ld1w { z0.s, z4.s, z8.s, z12.s }, $1/z, [$0]", 1 /* sideeffect attdialect */, {{[0-9]+}} /* regdef:GPR64common */, def %1, 9 /* reguse */, $pn8, 2147483657 /* reguse tiedto:$0 */, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: INLINEASM &"ld1w { z0.s, z4.s, z8.s, z12.s }, $1/z, [$0]", sideeffect attdialect, regdef:GPR64common, def %1, reguse, $pn8, reguse tiedto:$0, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: RET_ReallyLR
|
||||
%1 = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8()
|
||||
%2 = tail call i64 asm sideeffect "ld1w { z0.s, z4.s, z8.s, z12.s }, $1/z, [$0]", "=r,{pn8},0"(target("aarch64.svcount") %1, ptr %p)
|
||||
@@ -177,7 +177,7 @@ define void @explicit_pn0_invalid(ptr %p) {
|
||||
; CHECK-NEXT: [[PTRUE_C_B:%[0-9]+]]:pnr_p8to15 = PTRUE_C_B implicit $vg
|
||||
; CHECK-NEXT: $pn0 = COPY [[PTRUE_C_B]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64common = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"ld1w { z0.s, z4.s, z8.s, z12.s }, $1/z, [$0]", 1 /* sideeffect attdialect */, {{[0-9]+}} /* regdef:GPR64common */, def %1, 9 /* reguse */, $pn0, 2147483657 /* reguse tiedto:$0 */, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: INLINEASM &"ld1w { z0.s, z4.s, z8.s, z12.s }, $1/z, [$0]", sideeffect attdialect, regdef:GPR64common, def %1, reguse, $pn0, reguse tiedto:$0, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: RET_ReallyLR
|
||||
%1 = tail call target("aarch64.svcount") @llvm.aarch64.sve.ptrue.c8()
|
||||
%2 = tail call i64 asm sideeffect "ld1w { z0.s, z4.s, z8.s, z12.s }, $1/z, [$0]", "=r,{pn0},0"(target("aarch64.svcount") %1, ptr %p)
|
||||
|
||||
@@ -3,14 +3,14 @@
|
||||
|
||||
define void @alpha(<vscale x 4 x i32> %x) local_unnamed_addr {
|
||||
entry:
|
||||
; CHECK: INLINEASM &"movt zt0[3, mul vl], z0", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $za
|
||||
; CHECK: INLINEASM &"movt zt0[3, mul vl], z0", sideeffect attdialect, clobber, implicit-def early-clobber $za
|
||||
tail call void asm sideeffect "movt zt0[3, mul vl], z0", "~{za}"()
|
||||
ret void
|
||||
}
|
||||
|
||||
define void @beta(<vscale x 4 x i32> %x) local_unnamed_addr {
|
||||
entry:
|
||||
; CHECK: INLINEASM &"movt zt0[3, mul vl], z0", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $zt0
|
||||
; CHECK: INLINEASM &"movt zt0[3, mul vl], z0", sideeffect attdialect, clobber, implicit-def early-clobber $zt0
|
||||
tail call void asm sideeffect "movt zt0[3, mul vl], z0", "~{zt0}"()
|
||||
ret void
|
||||
}
|
||||
|
||||
@@ -304,7 +304,7 @@ body: |
|
||||
|
||||
bb.1.hot:
|
||||
BL @baz, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def dead $w0
|
||||
INLINEASM &".space 1024", 1 /* sideeffect attdialect */
|
||||
INLINEASM &".space 1024", sideeffect attdialect
|
||||
early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
|
||||
TCRETURNdi @qux, 0, csr_aarch64_aapcs, implicit $sp
|
||||
|
||||
@@ -407,7 +407,7 @@ body: |
|
||||
liveins: $w0, $w1, $lr
|
||||
|
||||
early-clobber $sp = frame-setup STRXpre killed $lr, $sp, -16 :: (store (s64) into %stack.0)
|
||||
INLINEASM &"mov x16, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x16
|
||||
INLINEASM &"mov x16, 1", sideeffect attdialect, regdef, implicit-def $x16
|
||||
TBZW killed renamable $w0, 0, %bb.3
|
||||
|
||||
bb.1.unrelaxable:
|
||||
@@ -421,15 +421,15 @@ body: |
|
||||
bb.2.end:
|
||||
liveins: $x16
|
||||
|
||||
INLINEASM &".space 996", 1 /* sideeffect attdialect */
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x16
|
||||
INLINEASM &".space 996", sideeffect attdialect
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x16
|
||||
early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
|
||||
TCRETURNdi @qux, 0, csr_aarch64_aapcs, implicit $sp
|
||||
|
||||
bb.3.cold (bbsections Cold):
|
||||
liveins: $x16
|
||||
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x16
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x16
|
||||
early-clobber $sp, $lr = frame-destroy LDRXpost $sp, 16 :: (load (s64) from %stack.0)
|
||||
TCRETURNdi @qux, 0, csr_aarch64_aapcs, implicit $sp
|
||||
|
||||
@@ -469,7 +469,7 @@ body: |
|
||||
; INDIRECT-NEXT: successors: %bb.5
|
||||
; INDIRECT-NEXT: liveins: $x16
|
||||
; INDIRECT-NEXT: {{ $}}
|
||||
; INDIRECT-NEXT: INLINEASM &".space 4", 1 /* sideeffect attdialect */
|
||||
; INDIRECT-NEXT: INLINEASM &".space 4", sideeffect attdialect
|
||||
; INDIRECT-NEXT: {{ $}}
|
||||
; INDIRECT-NEXT: bb.5.cold (bbsections Cold):
|
||||
; INDIRECT-NEXT: successors: %bb.1
|
||||
@@ -483,7 +483,7 @@ body: |
|
||||
successors: %bb.1, %bb.2
|
||||
|
||||
$sp = frame-setup SUBXri $sp, 16, 0
|
||||
INLINEASM &"mov x16, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x16
|
||||
INLINEASM &"mov x16, 1", sideeffect attdialect, regdef, implicit-def $x16
|
||||
dead renamable $x8 = SUBSXri $x16, 0, 0, implicit-def $nzcv
|
||||
renamable $w8 = CSINCWr $wzr, $wzr, 1, implicit killed $nzcv
|
||||
TBZW killed renamable $w8, 0, %bb.1
|
||||
@@ -493,7 +493,7 @@ body: |
|
||||
bb.1.hot:
|
||||
liveins: $x16
|
||||
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x16
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x16
|
||||
$sp = frame-destroy ADDXri $sp, 16, 0
|
||||
RET undef $lr
|
||||
|
||||
@@ -501,7 +501,7 @@ body: |
|
||||
successors: %bb.1
|
||||
liveins: $x16
|
||||
|
||||
INLINEASM &".space 4", 1 /* sideeffect attdialect */
|
||||
INLINEASM &".space 4", sideeffect attdialect
|
||||
B %bb.1
|
||||
...
|
||||
---
|
||||
@@ -567,7 +567,7 @@ body: |
|
||||
; INDIRECT-SAME: $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19,
|
||||
; INDIRECT-SAME: $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
|
||||
; INDIRECT-NEXT: {{ $}}
|
||||
; INDIRECT-COUNT-30: INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed
|
||||
; INDIRECT-COUNT-30: INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed
|
||||
; INDIRECT: RET undef $lr
|
||||
; INDIRECT-NEXT: {{ $}}
|
||||
; INDIRECT-NEXT: bb.6.exit:
|
||||
@@ -586,7 +586,7 @@ body: |
|
||||
; INDIRECT-SAME: $x10, $x11, $x12, $x13, $x14, $x15, $x17, $x18, $x19, $x20,
|
||||
; INDIRECT-SAME: $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
|
||||
; INDIRECT-NEXT: {{ $}}
|
||||
; INDIRECT-NEXT: INLINEASM &"mov x16, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x16
|
||||
; INDIRECT-NEXT: INLINEASM &"mov x16, 1", sideeffect attdialect, regdef, implicit-def $x16
|
||||
; INDIRECT-NEXT: {{ $}}
|
||||
; INDIRECT-NEXT: bb.5.cold (bbsections Cold):
|
||||
; INDIRECT-NEXT: successors: %bb.6
|
||||
@@ -608,71 +608,71 @@ body: |
|
||||
frame-setup STPXi killed $x24, killed $x23, $sp, 8 :: (store (s64) into %stack.5), (store (s64) into %stack.4)
|
||||
frame-setup STPXi killed $x22, killed $x21, $sp, 10 :: (store (s64) into %stack.3), (store (s64) into %stack.2)
|
||||
frame-setup STPXi killed $x20, killed $x19, $sp, 12 :: (store (s64) into %stack.1), (store (s64) into %stack.0)
|
||||
INLINEASM &"mov x0, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x0
|
||||
INLINEASM &"mov x1, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x1
|
||||
INLINEASM &"mov x2, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x2
|
||||
INLINEASM &"mov x3, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x3
|
||||
INLINEASM &"mov x4, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x4
|
||||
INLINEASM &"mov x5, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x5
|
||||
INLINEASM &"mov x6, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x6
|
||||
INLINEASM &"mov x7, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x7
|
||||
INLINEASM &"mov x8, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x8
|
||||
INLINEASM &"mov x9, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x9
|
||||
INLINEASM &"mov x10, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x10
|
||||
INLINEASM &"mov x11, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x11
|
||||
INLINEASM &"mov x12, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x12
|
||||
INLINEASM &"mov x13, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x13
|
||||
INLINEASM &"mov x14, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x14
|
||||
INLINEASM &"mov x15, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x15
|
||||
INLINEASM &"mov x17, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x17
|
||||
INLINEASM &"mov x18, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x18
|
||||
INLINEASM &"mov x19, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x19
|
||||
INLINEASM &"mov x20, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x20
|
||||
INLINEASM &"mov x21, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x21
|
||||
INLINEASM &"mov x22, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x22
|
||||
INLINEASM &"mov x23, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x23
|
||||
INLINEASM &"mov x24, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x24
|
||||
INLINEASM &"mov x25, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x25
|
||||
INLINEASM &"mov x26, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x26
|
||||
INLINEASM &"mov x27, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x27
|
||||
INLINEASM &"mov x28, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x28
|
||||
INLINEASM &"mov fp, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $fp
|
||||
INLINEASM &"mov x0, 1", sideeffect attdialect, regdef, implicit-def $x0
|
||||
INLINEASM &"mov x1, 1", sideeffect attdialect, regdef, implicit-def $x1
|
||||
INLINEASM &"mov x2, 1", sideeffect attdialect, regdef, implicit-def $x2
|
||||
INLINEASM &"mov x3, 1", sideeffect attdialect, regdef, implicit-def $x3
|
||||
INLINEASM &"mov x4, 1", sideeffect attdialect, regdef, implicit-def $x4
|
||||
INLINEASM &"mov x5, 1", sideeffect attdialect, regdef, implicit-def $x5
|
||||
INLINEASM &"mov x6, 1", sideeffect attdialect, regdef, implicit-def $x6
|
||||
INLINEASM &"mov x7, 1", sideeffect attdialect, regdef, implicit-def $x7
|
||||
INLINEASM &"mov x8, 1", sideeffect attdialect, regdef, implicit-def $x8
|
||||
INLINEASM &"mov x9, 1", sideeffect attdialect, regdef, implicit-def $x9
|
||||
INLINEASM &"mov x10, 1", sideeffect attdialect, regdef, implicit-def $x10
|
||||
INLINEASM &"mov x11, 1", sideeffect attdialect, regdef, implicit-def $x11
|
||||
INLINEASM &"mov x12, 1", sideeffect attdialect, regdef, implicit-def $x12
|
||||
INLINEASM &"mov x13, 1", sideeffect attdialect, regdef, implicit-def $x13
|
||||
INLINEASM &"mov x14, 1", sideeffect attdialect, regdef, implicit-def $x14
|
||||
INLINEASM &"mov x15, 1", sideeffect attdialect, regdef, implicit-def $x15
|
||||
INLINEASM &"mov x17, 1", sideeffect attdialect, regdef, implicit-def $x17
|
||||
INLINEASM &"mov x18, 1", sideeffect attdialect, regdef, implicit-def $x18
|
||||
INLINEASM &"mov x19, 1", sideeffect attdialect, regdef, implicit-def $x19
|
||||
INLINEASM &"mov x20, 1", sideeffect attdialect, regdef, implicit-def $x20
|
||||
INLINEASM &"mov x21, 1", sideeffect attdialect, regdef, implicit-def $x21
|
||||
INLINEASM &"mov x22, 1", sideeffect attdialect, regdef, implicit-def $x22
|
||||
INLINEASM &"mov x23, 1", sideeffect attdialect, regdef, implicit-def $x23
|
||||
INLINEASM &"mov x24, 1", sideeffect attdialect, regdef, implicit-def $x24
|
||||
INLINEASM &"mov x25, 1", sideeffect attdialect, regdef, implicit-def $x25
|
||||
INLINEASM &"mov x26, 1", sideeffect attdialect, regdef, implicit-def $x26
|
||||
INLINEASM &"mov x27, 1", sideeffect attdialect, regdef, implicit-def $x27
|
||||
INLINEASM &"mov x28, 1", sideeffect attdialect, regdef, implicit-def $x28
|
||||
INLINEASM &"mov fp, 1", sideeffect attdialect, regdef, implicit-def $fp
|
||||
B %bb.2
|
||||
|
||||
|
||||
bb.1.exit:
|
||||
liveins: $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
|
||||
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x0
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x1
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x2
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x3
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x4
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x5
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x6
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x7
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x8
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x9
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x10
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x11
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x12
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x13
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x14
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x15
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x16
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x17
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x18
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x19
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x20
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x21
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x22
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x23
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x24
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x25
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x26
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x27
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $x28
|
||||
INLINEASM &"# reg use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $fp
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x0
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x1
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x2
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x3
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x4
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x5
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x6
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x7
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x8
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x9
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x10
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x11
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x12
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x13
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x14
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x15
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x16
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x17
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x18
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x19
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x20
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x21
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x22
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x23
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x24
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x25
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x26
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x27
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $x28
|
||||
INLINEASM &"# reg use $0", sideeffect attdialect, reguse, killed $fp
|
||||
$x20, $x19 = frame-destroy LDPXi $sp, 12 :: (load (s64) from %stack.1), (load (s64) from %stack.0)
|
||||
$x22, $x21 = frame-destroy LDPXi $sp, 10 :: (load (s64) from %stack.3), (load (s64) from %stack.2)
|
||||
$x24, $x23 = frame-destroy LDPXi $sp, 8 :: (load (s64) from %stack.5), (load (s64) from %stack.4)
|
||||
@@ -686,7 +686,7 @@ body: |
|
||||
successors: %bb.1
|
||||
liveins: $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
|
||||
|
||||
INLINEASM &"mov x16, 1", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $x16
|
||||
INLINEASM &"mov x16, 1", sideeffect attdialect, regdef, implicit-def $x16
|
||||
B %bb.1
|
||||
|
||||
...
|
||||
|
||||
@@ -18,7 +18,7 @@ define i32 @test0() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.2(0x80000000), %bb.1(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"# $0", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %5, 13 /* imm */, %bb.1
|
||||
; CHECK-NEXT: INLINEASM_BR &"# $0", attdialect, regdef:GPR32common, def %5, imm, %bb.1
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %5
|
||||
; CHECK-NEXT: B %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -31,7 +31,7 @@ define i32 @test0() {
|
||||
; CHECK-NEXT: bb.2.direct:
|
||||
; CHECK-NEXT: successors: %bb.4(0x80000000), %bb.3(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"# $0", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %7, 13 /* imm */, %bb.3
|
||||
; CHECK-NEXT: INLINEASM_BR &"# $0", attdialect, regdef:GPR32common, def %7, imm, %bb.3
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY %7
|
||||
; CHECK-NEXT: B %bb.4
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -79,7 +79,7 @@ define i32 @dont_split0() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.1(0x80000000), %bb.2(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, 13 /* imm */, %bb.2
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, imm, %bb.2
|
||||
; CHECK-NEXT: B %bb.1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1.x:
|
||||
@@ -107,7 +107,7 @@ define i32 @dont_split1() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.1(0x80000000), %bb.2(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %1, 13 /* imm */, %bb.2
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %1, imm, %bb.2
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %1
|
||||
; CHECK-NEXT: B %bb.1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -138,7 +138,7 @@ define i32 @dont_split2() {
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 42
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY [[MOVi32imm]]
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, 13 /* imm */, %bb.2
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, imm, %bb.2
|
||||
; CHECK-NEXT: B %bb.1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1.x:
|
||||
@@ -168,7 +168,7 @@ define i32 @dont_split3() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.1(0x80000000), %bb.2(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %0, 13 /* imm */, %bb.2
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %0, imm, %bb.2
|
||||
; CHECK-NEXT: B %bb.1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1.x:
|
||||
@@ -194,7 +194,7 @@ define i32 @split_me0() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.2(0x80000000), %bb.1(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %3, 13 /* imm */, %bb.1
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %3, imm, %bb.1
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
|
||||
; CHECK-NEXT: B %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -244,7 +244,7 @@ define i32 @split_me1(i1 %z) {
|
||||
; CHECK-NEXT: bb.1.w:
|
||||
; CHECK-NEXT: successors: %bb.3(0x80000000), %bb.2(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %5, 13 /* imm */, %bb.2, 13 /* imm */, %bb.2
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %5, imm, %bb.2, imm, %bb.2
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32all = COPY %5
|
||||
; CHECK-NEXT: B %bb.3
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -297,7 +297,7 @@ define i32 @split_me2(i1 %z) {
|
||||
; CHECK-NEXT: bb.1.w:
|
||||
; CHECK-NEXT: successors: %bb.3(0x80000000), %bb.2(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %6, 13 /* imm */, %bb.2, 13 /* imm */, %bb.2
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %6, imm, %bb.2, imm, %bb.2
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY %6
|
||||
; CHECK-NEXT: B %bb.3
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -340,7 +340,7 @@ define i32 @dont_split4() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.1(0x80000000), %bb.2(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %3, 13 /* imm */, %bb.2
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %3, imm, %bb.2
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
|
||||
; CHECK-NEXT: B %bb.1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -379,7 +379,7 @@ define i32 @dont_split5() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.2(0x80000000), %bb.1(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %3, 13 /* imm */, %bb.1
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %3, imm, %bb.1
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
|
||||
; CHECK-NEXT: B %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -410,7 +410,7 @@ define i32 @split_me3() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.2(0x80000000), %bb.1(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %3, 13 /* imm */, %bb.1
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %3, imm, %bb.1
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
|
||||
; CHECK-NEXT: B %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -456,7 +456,7 @@ define i32 @dont_split6(i32 %0) {
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32all = PHI [[COPY]], %bb.0, %2, %bb.2
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32common = COPY [[PHI]]
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %4, 2147483657 /* reguse tiedto:$0 */, [[COPY1]](tied-def 3), 13 /* imm */, %bb.2
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %4, reguse tiedto:$0, [[COPY1]](tied-def 3), imm, %bb.2
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:gpr32all = COPY %4
|
||||
; CHECK-NEXT: B %bb.3
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -491,7 +491,7 @@ define i32 @split_me4() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.2(0x80000000), %bb.1(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %3, 13 /* imm */, %bb.1
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %3, imm, %bb.1
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
|
||||
; CHECK-NEXT: B %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -522,7 +522,7 @@ define i32 @split_me5() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.2(0x80000000), %bb.1(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, {{[0-9]+}} /* regdef:GPR32common */, def %3, 13 /* imm */, %bb.1
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPR32common, def %3, imm, %bb.1
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32all = COPY %3
|
||||
; CHECK-NEXT: B %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
|
||||
@@ -91,10 +91,10 @@ body: |
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[LOADgot:%[0-9]+]]:gpr64common = LOADgot target-flags(aarch64-got) @c
|
||||
; CHECK-NEXT: [[LDRDui:%[0-9]+]]:fpr64 = LDRDui [[LOADgot]], 0 :: (dereferenceable load (s64) from @c)
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 3670026 /* regdef:FPR64 */, def %2, 2147483657 /* reguse tiedto:$0 */, [[LDRDui]](tied-def 3)
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:FPR64, def %2, reguse tiedto:$0, [[LDRDui]](tied-def 3)
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY %2
|
||||
; CHECK-NEXT: [[LDRDui1:%[0-9]+]]:fpr64 = LDRDui [[LOADgot]], 0 :: (dereferenceable load (s64) from @c)
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 3670026 /* regdef:FPR64 */, def %4, 2147483657 /* reguse tiedto:$0 */, [[LDRDui1]](tied-def 3)
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:FPR64, def %4, reguse tiedto:$0, [[LDRDui1]](tied-def 3)
|
||||
; CHECK-NEXT: [[FNEGDr:%[0-9]+]]:fpr64 = FNEGDr %2
|
||||
; CHECK-NEXT: nofpexcept FCMPDrr %4, killed [[FNEGDr]], implicit-def $nzcv, implicit $fpcr
|
||||
; CHECK-NEXT: Bcc 1, %bb.2, implicit $nzcv
|
||||
@@ -111,10 +111,10 @@ body: |
|
||||
|
||||
%6:gpr64common = LOADgot target-flags(aarch64-got) @c
|
||||
%3:fpr64 = LDRDui %6, 0 :: (dereferenceable load (s64) from @c)
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 3670026 /* regdef:FPR64 */, def %2, 2147483657 /* reguse tiedto:$0 */, %3(tied-def 3)
|
||||
INLINEASM &"", sideeffect attdialect, regdef:FPR64, def %2, reguse tiedto:$0, %3(tied-def 3)
|
||||
%0:fpr64 = COPY %2
|
||||
%5:fpr64 = LDRDui %6, 0 :: (dereferenceable load (s64) from @c)
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 3670026 /* regdef:FPR64 */, def %4, 2147483657 /* reguse tiedto:$0 */, %5(tied-def 3)
|
||||
INLINEASM &"", sideeffect attdialect, regdef:FPR64, def %4, reguse tiedto:$0, %5(tied-def 3)
|
||||
%7:fpr64 = FNEGDr %2
|
||||
nofpexcept FCMPDrr %4, killed %7, implicit-def $nzcv, implicit $fpcr
|
||||
Bcc 1, %bb.2, implicit $nzcv
|
||||
|
||||
@@ -158,8 +158,8 @@ body: |
|
||||
bb.2:
|
||||
liveins: $w1, $w2
|
||||
|
||||
INLINEASM &".byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09", 1 /* sideeffect attdialect */
|
||||
INLINEASM &".byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09", 1 /* sideeffect attdialect */
|
||||
INLINEASM &".byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09", sideeffect attdialect
|
||||
INLINEASM &".byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09.byte 0x1f,0x20,0x03,0xd5,0x1f,0x20,0x03,0xd5\0A\09", sideeffect attdialect
|
||||
$w0 = ADDWrs killed renamable $w2, killed renamable $w1, 0
|
||||
RET undef $lr, implicit $w0
|
||||
|
||||
|
||||
@@ -154,7 +154,7 @@ body: |
|
||||
; CHECK-NEXT: renamable $x22 = COPY $x2
|
||||
; CHECK-NEXT: renamable $x23 = COPY $x1
|
||||
; CHECK-NEXT: renamable $x24 = COPY $x0
|
||||
; CHECK-NEXT: INLINEASM_BR &"b $0", 1 /* sideeffect attdialect */, 13 /* imm */, %bb.1
|
||||
; CHECK-NEXT: INLINEASM_BR &"b $0", sideeffect attdialect, imm, %bb.1
|
||||
; CHECK-NEXT: renamable $x8 = MOVi64imm 29273397577910035
|
||||
; CHECK-NEXT: B %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -184,7 +184,7 @@ body: |
|
||||
; CHECK-NEXT: renamable $x8 = MOVi64imm 29273397577910035
|
||||
; CHECK-NEXT: STRXui killed renamable $x8, renamable $x19, 0 :: (store (s64) into %ir.arg5)
|
||||
; CHECK-NEXT: BLR renamable $x24, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def dead $x0
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 1 /* sideeffect attdialect */, 13 /* imm */, %bb.4
|
||||
; CHECK-NEXT: INLINEASM_BR &"", sideeffect attdialect, imm, %bb.4
|
||||
; CHECK-NEXT: B %bb.4
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.4.bb22 (machine-block-address-taken, inlineasm-br-indirect-target):
|
||||
@@ -214,7 +214,7 @@ body: |
|
||||
renamable $x22 = COPY $x2
|
||||
renamable $x23 = COPY $x1
|
||||
renamable $x24 = COPY $x0
|
||||
INLINEASM_BR &"b $0", 1 /* sideeffect attdialect */, 13 /* imm */, %bb.1
|
||||
INLINEASM_BR &"b $0", sideeffect attdialect, imm, %bb.1
|
||||
renamable $x8 = MOVi64imm 29273397577910035
|
||||
B %bb.2
|
||||
|
||||
@@ -244,7 +244,7 @@ body: |
|
||||
renamable $x8 = MOVi64imm 29273397577910035
|
||||
STRXui killed renamable $x8, renamable $x19, 0 :: (store (s64) into %ir.arg5)
|
||||
BLR renamable $x24, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit-def $sp, implicit-def dead $x0
|
||||
INLINEASM_BR &"", 1 /* sideeffect attdialect */, 13 /* imm */, %bb.4
|
||||
INLINEASM_BR &"", sideeffect attdialect, imm, %bb.4
|
||||
B %bb.4
|
||||
|
||||
bb.4.bb22 (machine-block-address-taken, inlineasm-br-indirect-target):
|
||||
|
||||
@@ -13,7 +13,7 @@ body: |
|
||||
%1:gpr64common = COPY $x1
|
||||
%0:gpr32common = COPY $w0
|
||||
%3:gpr64sp = COPY $xzr
|
||||
INLINEASM &"", 9 /* sideeffect mayload attdialect */, 196622 /* mem:m */, %3
|
||||
INLINEASM &"", sideeffect mayload attdialect, mem:m, %3
|
||||
%4:gpr32 = ADDSWri %0, 1, 0, implicit-def $nzcv
|
||||
STRWui %4, %1, 0 :: (store (s32))
|
||||
Bcc 3, %bb.2, implicit killed $nzcv
|
||||
|
||||
@@ -267,7 +267,7 @@ body: |
|
||||
; CHECK-NEXT: liveins: $w20
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: renamable $w1 = COPY killed renamable $w20
|
||||
; CHECK-NEXT: INLINEASM &"nop;nop", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $x0, 12 /* clobber */, implicit-def dead early-clobber $x2, 12 /* clobber */, implicit-def dead early-clobber $x3, 12 /* clobber */, implicit-def dead early-clobber $x4, 12 /* clobber */, implicit-def dead early-clobber $x5, 12 /* clobber */, implicit-def dead early-clobber $x6, 12 /* clobber */, implicit-def dead early-clobber $x7, 12 /* clobber */, implicit-def dead early-clobber $x8, 12 /* clobber */, implicit-def dead early-clobber $x9, 12 /* clobber */, implicit-def dead early-clobber $x10, 12 /* clobber */, implicit-def dead early-clobber $x11, 12 /* clobber */, implicit-def dead early-clobber $x12, 12 /* clobber */, implicit-def dead early-clobber $x13, 12 /* clobber */, implicit-def dead early-clobber $x14, 12 /* clobber */, implicit-def dead early-clobber $x15, 12 /* clobber */, implicit-def dead early-clobber $x16, 12 /* clobber */, implicit-def dead early-clobber $x17, 12 /* clobber */, implicit-def dead early-clobber $x18, 12 /* clobber */, implicit-def dead early-clobber $x19, 12 /* clobber */, implicit-def dead early-clobber $x20, 12 /* clobber */, implicit-def dead early-clobber $x21, 12 /* clobber */, implicit-def dead early-clobber $x22, 12 /* clobber */, implicit-def dead early-clobber $x23, 12 /* clobber */, implicit-def dead early-clobber $x24, 12 /* clobber */, implicit-def dead early-clobber $x25, 12 /* clobber */, implicit-def dead early-clobber $x26, 12 /* clobber */, implicit-def dead early-clobber $x27, 12 /* clobber */, implicit-def dead early-clobber $x28, 12 /* clobber */, implicit-def dead early-clobber $fp, 12 /* clobber */, implicit-def dead early-clobber $lr
|
||||
; CHECK-NEXT: INLINEASM &"nop;nop", sideeffect attdialect, clobber, implicit-def dead early-clobber $x0, clobber, implicit-def dead early-clobber $x2, clobber, implicit-def dead early-clobber $x3, clobber, implicit-def dead early-clobber $x4, clobber, implicit-def dead early-clobber $x5, clobber, implicit-def dead early-clobber $x6, clobber, implicit-def dead early-clobber $x7, clobber, implicit-def dead early-clobber $x8, clobber, implicit-def dead early-clobber $x9, clobber, implicit-def dead early-clobber $x10, clobber, implicit-def dead early-clobber $x11, clobber, implicit-def dead early-clobber $x12, clobber, implicit-def dead early-clobber $x13, clobber, implicit-def dead early-clobber $x14, clobber, implicit-def dead early-clobber $x15, clobber, implicit-def dead early-clobber $x16, clobber, implicit-def dead early-clobber $x17, clobber, implicit-def dead early-clobber $x18, clobber, implicit-def dead early-clobber $x19, clobber, implicit-def dead early-clobber $x20, clobber, implicit-def dead early-clobber $x21, clobber, implicit-def dead early-clobber $x22, clobber, implicit-def dead early-clobber $x23, clobber, implicit-def dead early-clobber $x24, clobber, implicit-def dead early-clobber $x25, clobber, implicit-def dead early-clobber $x26, clobber, implicit-def dead early-clobber $x27, clobber, implicit-def dead early-clobber $x28, clobber, implicit-def dead early-clobber $fp, clobber, implicit-def dead early-clobber $lr
|
||||
; CHECK-NEXT: renamable $x2 = LDRXui %stack.0, 0 :: (load (s64) from %stack.0)
|
||||
; CHECK-NEXT: renamable $x12 = LDRXui %stack.4, 0 :: (load (s64) from %stack.4)
|
||||
; CHECK-NEXT: STRWroX killed renamable $w1, renamable $x2, renamable $x12, 0, 1 :: (volatile store (s32) into %ir.sunkaddr1)
|
||||
@@ -368,7 +368,7 @@ body: |
|
||||
bb.5.for.cond.cleanup:
|
||||
successors: %bb.7(0x80000000)
|
||||
|
||||
INLINEASM &"nop;nop", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $x0, 12 /* clobber */, implicit-def dead early-clobber $x2, 12 /* clobber */, implicit-def dead early-clobber $x3, 12 /* clobber */, implicit-def dead early-clobber $x4, 12 /* clobber */, implicit-def dead early-clobber $x5, 12 /* clobber */, implicit-def dead early-clobber $x6, 12 /* clobber */, implicit-def dead early-clobber $x7, 12 /* clobber */, implicit-def dead early-clobber $x8, 12 /* clobber */, implicit-def dead early-clobber $x9, 12 /* clobber */, implicit-def dead early-clobber $x10, 12 /* clobber */, implicit-def dead early-clobber $x11, 12 /* clobber */, implicit-def dead early-clobber $x12, 12 /* clobber */, implicit-def dead early-clobber $x13, 12 /* clobber */, implicit-def dead early-clobber $x14, 12 /* clobber */, implicit-def dead early-clobber $x15, 12 /* clobber */, implicit-def dead early-clobber $x16, 12 /* clobber */, implicit-def dead early-clobber $x17, 12 /* clobber */, implicit-def dead early-clobber $x18, 12 /* clobber */, implicit-def dead early-clobber $x19, 12 /* clobber */, implicit-def dead early-clobber $x20, 12 /* clobber */, implicit-def dead early-clobber $x21, 12 /* clobber */, implicit-def dead early-clobber $x22, 12 /* clobber */, implicit-def dead early-clobber $x23, 12 /* clobber */, implicit-def dead early-clobber $x24, 12 /* clobber */, implicit-def dead early-clobber $x25, 12 /* clobber */, implicit-def dead early-clobber $x26, 12 /* clobber */, implicit-def dead early-clobber $x27, 12 /* clobber */, implicit-def dead early-clobber $x28, 12 /* clobber */, implicit-def dead early-clobber $fp, 12 /* clobber */, implicit-def dead early-clobber $lr
|
||||
INLINEASM &"nop;nop", sideeffect attdialect, clobber, implicit-def dead early-clobber $x0, clobber, implicit-def dead early-clobber $x2, clobber, implicit-def dead early-clobber $x3, clobber, implicit-def dead early-clobber $x4, clobber, implicit-def dead early-clobber $x5, clobber, implicit-def dead early-clobber $x6, clobber, implicit-def dead early-clobber $x7, clobber, implicit-def dead early-clobber $x8, clobber, implicit-def dead early-clobber $x9, clobber, implicit-def dead early-clobber $x10, clobber, implicit-def dead early-clobber $x11, clobber, implicit-def dead early-clobber $x12, clobber, implicit-def dead early-clobber $x13, clobber, implicit-def dead early-clobber $x14, clobber, implicit-def dead early-clobber $x15, clobber, implicit-def dead early-clobber $x16, clobber, implicit-def dead early-clobber $x17, clobber, implicit-def dead early-clobber $x18, clobber, implicit-def dead early-clobber $x19, clobber, implicit-def dead early-clobber $x20, clobber, implicit-def dead early-clobber $x21, clobber, implicit-def dead early-clobber $x22, clobber, implicit-def dead early-clobber $x23, clobber, implicit-def dead early-clobber $x24, clobber, implicit-def dead early-clobber $x25, clobber, implicit-def dead early-clobber $x26, clobber, implicit-def dead early-clobber $x27, clobber, implicit-def dead early-clobber $x28, clobber, implicit-def dead early-clobber $fp, clobber, implicit-def dead early-clobber $lr
|
||||
STRWroX %60, %19, %57, 0, 1 :: (volatile store (s32) into %ir.sunkaddr1)
|
||||
B %bb.7
|
||||
|
||||
|
||||
@@ -493,7 +493,7 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64common = COPY $x0
|
||||
; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr64all = IMPLICIT_DEF
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64sp = COPY [[DEF]]
|
||||
; CHECK-NEXT: INLINEASM &"ldr ${0:s}, $1", 8 /* mayload attdialect */, 3670026 /* regdef:FPR64 */, def %1, 262158 /* mem:m */, killed [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"ldr ${0:s}, $1", mayload attdialect, regdef:FPR64, def %1, mem:m, killed [[COPY1]]
|
||||
; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 0
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub
|
||||
; CHECK-NEXT: [[DEF1:%[0-9]+]]:fpr128 = IMPLICIT_DEF
|
||||
@@ -511,7 +511,7 @@ body: |
|
||||
%0:gpr64common = COPY $x0
|
||||
%2:gpr64all = IMPLICIT_DEF
|
||||
%3:gpr64sp = COPY %2
|
||||
INLINEASM &"ldr ${0:s}, $1", 8 /* mayload attdialect */, 3670026 /* regdef:FPR64 */, def %1, 262158 /* mem:m */, killed %3
|
||||
INLINEASM &"ldr ${0:s}, $1", mayload attdialect, regdef:FPR64, def %1, mem:m, killed %3
|
||||
%4:fpr128 = MOVIv2d_ns 0
|
||||
%5:fpr64 = COPY %4.dsub
|
||||
%7:fpr128 = IMPLICIT_DEF
|
||||
|
||||
@@ -221,7 +221,7 @@ define i64 @blend_and_sign_different_bbs(i64 %addr, i64 %cond) {
|
||||
; DAGISEL-NEXT: successors: %bb.2(0x80000000)
|
||||
; DAGISEL-NEXT: {{ $}}
|
||||
; DAGISEL-NEXT: [[COPY3:%[0-9]+]]:gpr64common = COPY [[COPY2]]
|
||||
; DAGISEL-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 3866633 /* reguse:GPR64common */, [[COPY3]]
|
||||
; DAGISEL-NEXT: INLINEASM &nop, sideeffect attdialect, reguse:GPR64common, [[COPY3]]
|
||||
; DAGISEL-NEXT: {{ $}}
|
||||
; DAGISEL-NEXT: bb.2.exit:
|
||||
; DAGISEL-NEXT: [[COPY4:%[0-9]+]]:gpr64noip = COPY [[LDRXui]]
|
||||
@@ -246,7 +246,7 @@ define i64 @blend_and_sign_different_bbs(i64 %addr, i64 %cond) {
|
||||
; GISEL-NEXT: successors: %bb.3(0x80000000)
|
||||
; GISEL-NEXT: {{ $}}
|
||||
; GISEL-NEXT: [[COPY2:%[0-9]+]]:gpr64common = COPY [[MOVKXi]]
|
||||
; GISEL-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 3866633 /* reguse:GPR64common */, [[COPY2]]
|
||||
; GISEL-NEXT: INLINEASM &nop, sideeffect attdialect, reguse:GPR64common, [[COPY2]]
|
||||
; GISEL-NEXT: {{ $}}
|
||||
; GISEL-NEXT: bb.3.exit:
|
||||
; GISEL-NEXT: [[COPY3:%[0-9]+]]:gpr64noip = COPY [[LDRXui]]
|
||||
|
||||
@@ -45,7 +45,7 @@ body: |
|
||||
; CHECK-NEXT: $q0 = COPY [[FMOVv2f64_ns]]
|
||||
; CHECK-NEXT: BL @bar_v2f64, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $q0, implicit-def $sp
|
||||
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $q0, 12 /* clobber */, implicit-def dead early-clobber $q1, 12 /* clobber */, implicit-def dead early-clobber $q2, 12 /* clobber */, implicit-def dead early-clobber $q3, 12 /* clobber */, implicit-def dead early-clobber $q4, 12 /* clobber */, implicit-def dead early-clobber $q5, 12 /* clobber */, implicit-def dead early-clobber $q6, 12 /* clobber */, implicit-def dead early-clobber $q7, 12 /* clobber */, implicit-def dead early-clobber $q8, 12 /* clobber */, implicit-def dead early-clobber $q9, 12 /* clobber */, implicit-def dead early-clobber $q10, 12 /* clobber */, implicit-def dead early-clobber $q11, 12 /* clobber */, implicit-def dead early-clobber $q12, 12 /* clobber */, implicit-def dead early-clobber $q13, 12 /* clobber */, implicit-def dead early-clobber $q14, 12 /* clobber */, implicit-def dead early-clobber $q15, 12 /* clobber */, implicit-def dead early-clobber $q16, 12 /* clobber */, implicit-def dead early-clobber $q17, 12 /* clobber */, implicit-def dead early-clobber $q18, 12 /* clobber */, implicit-def dead early-clobber $q19, 12 /* clobber */, implicit-def dead early-clobber $q20, 12 /* clobber */, implicit-def dead early-clobber $q21, 12 /* clobber */, implicit-def dead early-clobber $q22, 12 /* clobber */, implicit-def dead early-clobber $q23, 12 /* clobber */, implicit-def dead early-clobber $q24, 12 /* clobber */, implicit-def dead early-clobber $q25, 12 /* clobber */, implicit-def dead early-clobber $q26, 12 /* clobber */, implicit-def dead early-clobber $q27, 12 /* clobber */, implicit-def dead early-clobber $q28, 12 /* clobber */, implicit-def dead early-clobber $q29, 12 /* clobber */, implicit-def dead early-clobber $q30, 12 /* clobber */, implicit-def dead early-clobber $q31
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $q0, clobber, implicit-def dead early-clobber $q1, clobber, implicit-def dead early-clobber $q2, clobber, implicit-def dead early-clobber $q3, clobber, implicit-def dead early-clobber $q4, clobber, implicit-def dead early-clobber $q5, clobber, implicit-def dead early-clobber $q6, clobber, implicit-def dead early-clobber $q7, clobber, implicit-def dead early-clobber $q8, clobber, implicit-def dead early-clobber $q9, clobber, implicit-def dead early-clobber $q10, clobber, implicit-def dead early-clobber $q11, clobber, implicit-def dead early-clobber $q12, clobber, implicit-def dead early-clobber $q13, clobber, implicit-def dead early-clobber $q14, clobber, implicit-def dead early-clobber $q15, clobber, implicit-def dead early-clobber $q16, clobber, implicit-def dead early-clobber $q17, clobber, implicit-def dead early-clobber $q18, clobber, implicit-def dead early-clobber $q19, clobber, implicit-def dead early-clobber $q20, clobber, implicit-def dead early-clobber $q21, clobber, implicit-def dead early-clobber $q22, clobber, implicit-def dead early-clobber $q23, clobber, implicit-def dead early-clobber $q24, clobber, implicit-def dead early-clobber $q25, clobber, implicit-def dead early-clobber $q26, clobber, implicit-def dead early-clobber $q27, clobber, implicit-def dead early-clobber $q28, clobber, implicit-def dead early-clobber $q29, clobber, implicit-def dead early-clobber $q30, clobber, implicit-def dead early-clobber $q31
|
||||
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
||||
; CHECK-NEXT: [[FMOVv2f64_ns1:%[0-9]+]]:fpr128 = FMOVv2f64_ns 127
|
||||
; CHECK-NEXT: $q0 = COPY [[FMOVv2f64_ns1]]
|
||||
@@ -57,7 +57,7 @@ body: |
|
||||
$q0 = COPY %0
|
||||
BL @bar_v2f64, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $q0, implicit-def $sp
|
||||
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $q0, 12 /* clobber */, implicit-def dead early-clobber $q1, 12 /* clobber */, implicit-def dead early-clobber $q2, 12 /* clobber */, implicit-def dead early-clobber $q3, 12 /* clobber */, implicit-def dead early-clobber $q4, 12 /* clobber */, implicit-def dead early-clobber $q5, 12 /* clobber */, implicit-def dead early-clobber $q6, 12 /* clobber */, implicit-def dead early-clobber $q7, 12 /* clobber */, implicit-def dead early-clobber $q8, 12 /* clobber */, implicit-def dead early-clobber $q9, 12 /* clobber */, implicit-def dead early-clobber $q10, 12 /* clobber */, implicit-def dead early-clobber $q11, 12 /* clobber */, implicit-def dead early-clobber $q12, 12 /* clobber */, implicit-def dead early-clobber $q13, 12 /* clobber */, implicit-def dead early-clobber $q14, 12 /* clobber */, implicit-def dead early-clobber $q15, 12 /* clobber */, implicit-def dead early-clobber $q16, 12 /* clobber */, implicit-def dead early-clobber $q17, 12 /* clobber */, implicit-def dead early-clobber $q18, 12 /* clobber */, implicit-def dead early-clobber $q19, 12 /* clobber */, implicit-def dead early-clobber $q20, 12 /* clobber */, implicit-def dead early-clobber $q21, 12 /* clobber */, implicit-def dead early-clobber $q22, 12 /* clobber */, implicit-def dead early-clobber $q23, 12 /* clobber */, implicit-def dead early-clobber $q24, 12 /* clobber */, implicit-def dead early-clobber $q25, 12 /* clobber */, implicit-def dead early-clobber $q26, 12 /* clobber */, implicit-def dead early-clobber $q27, 12 /* clobber */, implicit-def dead early-clobber $q28, 12 /* clobber */, implicit-def dead early-clobber $q29, 12 /* clobber */, implicit-def dead early-clobber $q30, 12 /* clobber */, implicit-def dead early-clobber $q31
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $q0, clobber, implicit-def dead early-clobber $q1, clobber, implicit-def dead early-clobber $q2, clobber, implicit-def dead early-clobber $q3, clobber, implicit-def dead early-clobber $q4, clobber, implicit-def dead early-clobber $q5, clobber, implicit-def dead early-clobber $q6, clobber, implicit-def dead early-clobber $q7, clobber, implicit-def dead early-clobber $q8, clobber, implicit-def dead early-clobber $q9, clobber, implicit-def dead early-clobber $q10, clobber, implicit-def dead early-clobber $q11, clobber, implicit-def dead early-clobber $q12, clobber, implicit-def dead early-clobber $q13, clobber, implicit-def dead early-clobber $q14, clobber, implicit-def dead early-clobber $q15, clobber, implicit-def dead early-clobber $q16, clobber, implicit-def dead early-clobber $q17, clobber, implicit-def dead early-clobber $q18, clobber, implicit-def dead early-clobber $q19, clobber, implicit-def dead early-clobber $q20, clobber, implicit-def dead early-clobber $q21, clobber, implicit-def dead early-clobber $q22, clobber, implicit-def dead early-clobber $q23, clobber, implicit-def dead early-clobber $q24, clobber, implicit-def dead early-clobber $q25, clobber, implicit-def dead early-clobber $q26, clobber, implicit-def dead early-clobber $q27, clobber, implicit-def dead early-clobber $q28, clobber, implicit-def dead early-clobber $q29, clobber, implicit-def dead early-clobber $q30, clobber, implicit-def dead early-clobber $q31
|
||||
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
||||
$q0 = COPY %0
|
||||
BL @bar_v2f64, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $q0, implicit-def $sp
|
||||
@@ -77,7 +77,7 @@ body: |
|
||||
; CHECK-NEXT: $q0 = COPY [[FMOVv4f32_ns]]
|
||||
; CHECK-NEXT: BL @bar_v4f32, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $q0, implicit-def $sp
|
||||
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $q0, 12 /* clobber */, implicit-def dead early-clobber $q1, 12 /* clobber */, implicit-def dead early-clobber $q2, 12 /* clobber */, implicit-def dead early-clobber $q3, 12 /* clobber */, implicit-def dead early-clobber $q4, 12 /* clobber */, implicit-def dead early-clobber $q5, 12 /* clobber */, implicit-def dead early-clobber $q6, 12 /* clobber */, implicit-def dead early-clobber $q7, 12 /* clobber */, implicit-def dead early-clobber $q8, 12 /* clobber */, implicit-def dead early-clobber $q9, 12 /* clobber */, implicit-def dead early-clobber $q10, 12 /* clobber */, implicit-def dead early-clobber $q11, 12 /* clobber */, implicit-def dead early-clobber $q12, 12 /* clobber */, implicit-def dead early-clobber $q13, 12 /* clobber */, implicit-def dead early-clobber $q14, 12 /* clobber */, implicit-def dead early-clobber $q15, 12 /* clobber */, implicit-def dead early-clobber $q16, 12 /* clobber */, implicit-def dead early-clobber $q17, 12 /* clobber */, implicit-def dead early-clobber $q18, 12 /* clobber */, implicit-def dead early-clobber $q19, 12 /* clobber */, implicit-def dead early-clobber $q20, 12 /* clobber */, implicit-def dead early-clobber $q21, 12 /* clobber */, implicit-def dead early-clobber $q22, 12 /* clobber */, implicit-def dead early-clobber $q23, 12 /* clobber */, implicit-def dead early-clobber $q24, 12 /* clobber */, implicit-def dead early-clobber $q25, 12 /* clobber */, implicit-def dead early-clobber $q26, 12 /* clobber */, implicit-def dead early-clobber $q27, 12 /* clobber */, implicit-def dead early-clobber $q28, 12 /* clobber */, implicit-def dead early-clobber $q29, 12 /* clobber */, implicit-def dead early-clobber $q30, 12 /* clobber */, implicit-def dead early-clobber $q31
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $q0, clobber, implicit-def dead early-clobber $q1, clobber, implicit-def dead early-clobber $q2, clobber, implicit-def dead early-clobber $q3, clobber, implicit-def dead early-clobber $q4, clobber, implicit-def dead early-clobber $q5, clobber, implicit-def dead early-clobber $q6, clobber, implicit-def dead early-clobber $q7, clobber, implicit-def dead early-clobber $q8, clobber, implicit-def dead early-clobber $q9, clobber, implicit-def dead early-clobber $q10, clobber, implicit-def dead early-clobber $q11, clobber, implicit-def dead early-clobber $q12, clobber, implicit-def dead early-clobber $q13, clobber, implicit-def dead early-clobber $q14, clobber, implicit-def dead early-clobber $q15, clobber, implicit-def dead early-clobber $q16, clobber, implicit-def dead early-clobber $q17, clobber, implicit-def dead early-clobber $q18, clobber, implicit-def dead early-clobber $q19, clobber, implicit-def dead early-clobber $q20, clobber, implicit-def dead early-clobber $q21, clobber, implicit-def dead early-clobber $q22, clobber, implicit-def dead early-clobber $q23, clobber, implicit-def dead early-clobber $q24, clobber, implicit-def dead early-clobber $q25, clobber, implicit-def dead early-clobber $q26, clobber, implicit-def dead early-clobber $q27, clobber, implicit-def dead early-clobber $q28, clobber, implicit-def dead early-clobber $q29, clobber, implicit-def dead early-clobber $q30, clobber, implicit-def dead early-clobber $q31
|
||||
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
||||
; CHECK-NEXT: [[FMOVv4f32_ns1:%[0-9]+]]:fpr128 = FMOVv4f32_ns 112
|
||||
; CHECK-NEXT: $q0 = COPY [[FMOVv4f32_ns1]]
|
||||
@@ -89,7 +89,7 @@ body: |
|
||||
$q0 = COPY %0
|
||||
BL @bar_v4f32, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $q0, implicit-def $sp
|
||||
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $q0, 12 /* clobber */, implicit-def dead early-clobber $q1, 12 /* clobber */, implicit-def dead early-clobber $q2, 12 /* clobber */, implicit-def dead early-clobber $q3, 12 /* clobber */, implicit-def dead early-clobber $q4, 12 /* clobber */, implicit-def dead early-clobber $q5, 12 /* clobber */, implicit-def dead early-clobber $q6, 12 /* clobber */, implicit-def dead early-clobber $q7, 12 /* clobber */, implicit-def dead early-clobber $q8, 12 /* clobber */, implicit-def dead early-clobber $q9, 12 /* clobber */, implicit-def dead early-clobber $q10, 12 /* clobber */, implicit-def dead early-clobber $q11, 12 /* clobber */, implicit-def dead early-clobber $q12, 12 /* clobber */, implicit-def dead early-clobber $q13, 12 /* clobber */, implicit-def dead early-clobber $q14, 12 /* clobber */, implicit-def dead early-clobber $q15, 12 /* clobber */, implicit-def dead early-clobber $q16, 12 /* clobber */, implicit-def dead early-clobber $q17, 12 /* clobber */, implicit-def dead early-clobber $q18, 12 /* clobber */, implicit-def dead early-clobber $q19, 12 /* clobber */, implicit-def dead early-clobber $q20, 12 /* clobber */, implicit-def dead early-clobber $q21, 12 /* clobber */, implicit-def dead early-clobber $q22, 12 /* clobber */, implicit-def dead early-clobber $q23, 12 /* clobber */, implicit-def dead early-clobber $q24, 12 /* clobber */, implicit-def dead early-clobber $q25, 12 /* clobber */, implicit-def dead early-clobber $q26, 12 /* clobber */, implicit-def dead early-clobber $q27, 12 /* clobber */, implicit-def dead early-clobber $q28, 12 /* clobber */, implicit-def dead early-clobber $q29, 12 /* clobber */, implicit-def dead early-clobber $q30, 12 /* clobber */, implicit-def dead early-clobber $q31
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $q0, clobber, implicit-def dead early-clobber $q1, clobber, implicit-def dead early-clobber $q2, clobber, implicit-def dead early-clobber $q3, clobber, implicit-def dead early-clobber $q4, clobber, implicit-def dead early-clobber $q5, clobber, implicit-def dead early-clobber $q6, clobber, implicit-def dead early-clobber $q7, clobber, implicit-def dead early-clobber $q8, clobber, implicit-def dead early-clobber $q9, clobber, implicit-def dead early-clobber $q10, clobber, implicit-def dead early-clobber $q11, clobber, implicit-def dead early-clobber $q12, clobber, implicit-def dead early-clobber $q13, clobber, implicit-def dead early-clobber $q14, clobber, implicit-def dead early-clobber $q15, clobber, implicit-def dead early-clobber $q16, clobber, implicit-def dead early-clobber $q17, clobber, implicit-def dead early-clobber $q18, clobber, implicit-def dead early-clobber $q19, clobber, implicit-def dead early-clobber $q20, clobber, implicit-def dead early-clobber $q21, clobber, implicit-def dead early-clobber $q22, clobber, implicit-def dead early-clobber $q23, clobber, implicit-def dead early-clobber $q24, clobber, implicit-def dead early-clobber $q25, clobber, implicit-def dead early-clobber $q26, clobber, implicit-def dead early-clobber $q27, clobber, implicit-def dead early-clobber $q28, clobber, implicit-def dead early-clobber $q29, clobber, implicit-def dead early-clobber $q30, clobber, implicit-def dead early-clobber $q31
|
||||
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
||||
$q0 = COPY %0
|
||||
BL @bar_v4f32, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $q0, implicit-def $sp
|
||||
@@ -109,7 +109,7 @@ body: |
|
||||
; CHECK-NEXT: $d0 = COPY [[FMOVv2f32_ns]]
|
||||
; CHECK-NEXT: BL @bar_v2f32, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $d0, implicit-def $sp
|
||||
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $q0, 12 /* clobber */, implicit-def dead early-clobber $q1, 12 /* clobber */, implicit-def dead early-clobber $q2, 12 /* clobber */, implicit-def dead early-clobber $q3, 12 /* clobber */, implicit-def dead early-clobber $q4, 12 /* clobber */, implicit-def dead early-clobber $q5, 12 /* clobber */, implicit-def dead early-clobber $q6, 12 /* clobber */, implicit-def dead early-clobber $q7, 12 /* clobber */, implicit-def dead early-clobber $q8, 12 /* clobber */, implicit-def dead early-clobber $q9, 12 /* clobber */, implicit-def dead early-clobber $q10, 12 /* clobber */, implicit-def dead early-clobber $q11, 12 /* clobber */, implicit-def dead early-clobber $q12, 12 /* clobber */, implicit-def dead early-clobber $q13, 12 /* clobber */, implicit-def dead early-clobber $q14, 12 /* clobber */, implicit-def dead early-clobber $q15, 12 /* clobber */, implicit-def dead early-clobber $q16, 12 /* clobber */, implicit-def dead early-clobber $q17, 12 /* clobber */, implicit-def dead early-clobber $q18, 12 /* clobber */, implicit-def dead early-clobber $q19, 12 /* clobber */, implicit-def dead early-clobber $q20, 12 /* clobber */, implicit-def dead early-clobber $q21, 12 /* clobber */, implicit-def dead early-clobber $q22, 12 /* clobber */, implicit-def dead early-clobber $q23, 12 /* clobber */, implicit-def dead early-clobber $q24, 12 /* clobber */, implicit-def dead early-clobber $q25, 12 /* clobber */, implicit-def dead early-clobber $q26, 12 /* clobber */, implicit-def dead early-clobber $q27, 12 /* clobber */, implicit-def dead early-clobber $q28, 12 /* clobber */, implicit-def dead early-clobber $q29, 12 /* clobber */, implicit-def dead early-clobber $q30, 12 /* clobber */, implicit-def dead early-clobber $q31
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $q0, clobber, implicit-def dead early-clobber $q1, clobber, implicit-def dead early-clobber $q2, clobber, implicit-def dead early-clobber $q3, clobber, implicit-def dead early-clobber $q4, clobber, implicit-def dead early-clobber $q5, clobber, implicit-def dead early-clobber $q6, clobber, implicit-def dead early-clobber $q7, clobber, implicit-def dead early-clobber $q8, clobber, implicit-def dead early-clobber $q9, clobber, implicit-def dead early-clobber $q10, clobber, implicit-def dead early-clobber $q11, clobber, implicit-def dead early-clobber $q12, clobber, implicit-def dead early-clobber $q13, clobber, implicit-def dead early-clobber $q14, clobber, implicit-def dead early-clobber $q15, clobber, implicit-def dead early-clobber $q16, clobber, implicit-def dead early-clobber $q17, clobber, implicit-def dead early-clobber $q18, clobber, implicit-def dead early-clobber $q19, clobber, implicit-def dead early-clobber $q20, clobber, implicit-def dead early-clobber $q21, clobber, implicit-def dead early-clobber $q22, clobber, implicit-def dead early-clobber $q23, clobber, implicit-def dead early-clobber $q24, clobber, implicit-def dead early-clobber $q25, clobber, implicit-def dead early-clobber $q26, clobber, implicit-def dead early-clobber $q27, clobber, implicit-def dead early-clobber $q28, clobber, implicit-def dead early-clobber $q29, clobber, implicit-def dead early-clobber $q30, clobber, implicit-def dead early-clobber $q31
|
||||
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
||||
; CHECK-NEXT: [[FMOVv2f32_ns1:%[0-9]+]]:fpr64 = FMOVv2f32_ns 115
|
||||
; CHECK-NEXT: $d0 = COPY [[FMOVv2f32_ns1]]
|
||||
@@ -121,7 +121,7 @@ body: |
|
||||
$d0 = COPY %0
|
||||
BL @bar_v2f32, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $d0, implicit-def $sp
|
||||
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $q0, 12 /* clobber */, implicit-def dead early-clobber $q1, 12 /* clobber */, implicit-def dead early-clobber $q2, 12 /* clobber */, implicit-def dead early-clobber $q3, 12 /* clobber */, implicit-def dead early-clobber $q4, 12 /* clobber */, implicit-def dead early-clobber $q5, 12 /* clobber */, implicit-def dead early-clobber $q6, 12 /* clobber */, implicit-def dead early-clobber $q7, 12 /* clobber */, implicit-def dead early-clobber $q8, 12 /* clobber */, implicit-def dead early-clobber $q9, 12 /* clobber */, implicit-def dead early-clobber $q10, 12 /* clobber */, implicit-def dead early-clobber $q11, 12 /* clobber */, implicit-def dead early-clobber $q12, 12 /* clobber */, implicit-def dead early-clobber $q13, 12 /* clobber */, implicit-def dead early-clobber $q14, 12 /* clobber */, implicit-def dead early-clobber $q15, 12 /* clobber */, implicit-def dead early-clobber $q16, 12 /* clobber */, implicit-def dead early-clobber $q17, 12 /* clobber */, implicit-def dead early-clobber $q18, 12 /* clobber */, implicit-def dead early-clobber $q19, 12 /* clobber */, implicit-def dead early-clobber $q20, 12 /* clobber */, implicit-def dead early-clobber $q21, 12 /* clobber */, implicit-def dead early-clobber $q22, 12 /* clobber */, implicit-def dead early-clobber $q23, 12 /* clobber */, implicit-def dead early-clobber $q24, 12 /* clobber */, implicit-def dead early-clobber $q25, 12 /* clobber */, implicit-def dead early-clobber $q26, 12 /* clobber */, implicit-def dead early-clobber $q27, 12 /* clobber */, implicit-def dead early-clobber $q28, 12 /* clobber */, implicit-def dead early-clobber $q29, 12 /* clobber */, implicit-def dead early-clobber $q30, 12 /* clobber */, implicit-def dead early-clobber $q31
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $q0, clobber, implicit-def dead early-clobber $q1, clobber, implicit-def dead early-clobber $q2, clobber, implicit-def dead early-clobber $q3, clobber, implicit-def dead early-clobber $q4, clobber, implicit-def dead early-clobber $q5, clobber, implicit-def dead early-clobber $q6, clobber, implicit-def dead early-clobber $q7, clobber, implicit-def dead early-clobber $q8, clobber, implicit-def dead early-clobber $q9, clobber, implicit-def dead early-clobber $q10, clobber, implicit-def dead early-clobber $q11, clobber, implicit-def dead early-clobber $q12, clobber, implicit-def dead early-clobber $q13, clobber, implicit-def dead early-clobber $q14, clobber, implicit-def dead early-clobber $q15, clobber, implicit-def dead early-clobber $q16, clobber, implicit-def dead early-clobber $q17, clobber, implicit-def dead early-clobber $q18, clobber, implicit-def dead early-clobber $q19, clobber, implicit-def dead early-clobber $q20, clobber, implicit-def dead early-clobber $q21, clobber, implicit-def dead early-clobber $q22, clobber, implicit-def dead early-clobber $q23, clobber, implicit-def dead early-clobber $q24, clobber, implicit-def dead early-clobber $q25, clobber, implicit-def dead early-clobber $q26, clobber, implicit-def dead early-clobber $q27, clobber, implicit-def dead early-clobber $q28, clobber, implicit-def dead early-clobber $q29, clobber, implicit-def dead early-clobber $q30, clobber, implicit-def dead early-clobber $q31
|
||||
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
||||
$d0 = COPY %0
|
||||
BL @bar_v2f32, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $d0, implicit-def $sp
|
||||
@@ -141,7 +141,7 @@ body: |
|
||||
; CHECK-NEXT: $d0 = COPY [[FMOVv4f16_ns]]
|
||||
; CHECK-NEXT: BL @bar_v4f16, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $d0, implicit-def $sp
|
||||
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $q0, 12 /* clobber */, implicit-def dead early-clobber $q1, 12 /* clobber */, implicit-def dead early-clobber $q2, 12 /* clobber */, implicit-def dead early-clobber $q3, 12 /* clobber */, implicit-def dead early-clobber $q4, 12 /* clobber */, implicit-def dead early-clobber $q5, 12 /* clobber */, implicit-def dead early-clobber $q6, 12 /* clobber */, implicit-def dead early-clobber $q7, 12 /* clobber */, implicit-def dead early-clobber $q8, 12 /* clobber */, implicit-def dead early-clobber $q9, 12 /* clobber */, implicit-def dead early-clobber $q10, 12 /* clobber */, implicit-def dead early-clobber $q11, 12 /* clobber */, implicit-def dead early-clobber $q12, 12 /* clobber */, implicit-def dead early-clobber $q13, 12 /* clobber */, implicit-def dead early-clobber $q14, 12 /* clobber */, implicit-def dead early-clobber $q15, 12 /* clobber */, implicit-def dead early-clobber $q16, 12 /* clobber */, implicit-def dead early-clobber $q17, 12 /* clobber */, implicit-def dead early-clobber $q18, 12 /* clobber */, implicit-def dead early-clobber $q19, 12 /* clobber */, implicit-def dead early-clobber $q20, 12 /* clobber */, implicit-def dead early-clobber $q21, 12 /* clobber */, implicit-def dead early-clobber $q22, 12 /* clobber */, implicit-def dead early-clobber $q23, 12 /* clobber */, implicit-def dead early-clobber $q24, 12 /* clobber */, implicit-def dead early-clobber $q25, 12 /* clobber */, implicit-def dead early-clobber $q26, 12 /* clobber */, implicit-def dead early-clobber $q27, 12 /* clobber */, implicit-def dead early-clobber $q28, 12 /* clobber */, implicit-def dead early-clobber $q29, 12 /* clobber */, implicit-def dead early-clobber $q30, 12 /* clobber */, implicit-def dead early-clobber $q31
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $q0, clobber, implicit-def dead early-clobber $q1, clobber, implicit-def dead early-clobber $q2, clobber, implicit-def dead early-clobber $q3, clobber, implicit-def dead early-clobber $q4, clobber, implicit-def dead early-clobber $q5, clobber, implicit-def dead early-clobber $q6, clobber, implicit-def dead early-clobber $q7, clobber, implicit-def dead early-clobber $q8, clobber, implicit-def dead early-clobber $q9, clobber, implicit-def dead early-clobber $q10, clobber, implicit-def dead early-clobber $q11, clobber, implicit-def dead early-clobber $q12, clobber, implicit-def dead early-clobber $q13, clobber, implicit-def dead early-clobber $q14, clobber, implicit-def dead early-clobber $q15, clobber, implicit-def dead early-clobber $q16, clobber, implicit-def dead early-clobber $q17, clobber, implicit-def dead early-clobber $q18, clobber, implicit-def dead early-clobber $q19, clobber, implicit-def dead early-clobber $q20, clobber, implicit-def dead early-clobber $q21, clobber, implicit-def dead early-clobber $q22, clobber, implicit-def dead early-clobber $q23, clobber, implicit-def dead early-clobber $q24, clobber, implicit-def dead early-clobber $q25, clobber, implicit-def dead early-clobber $q26, clobber, implicit-def dead early-clobber $q27, clobber, implicit-def dead early-clobber $q28, clobber, implicit-def dead early-clobber $q29, clobber, implicit-def dead early-clobber $q30, clobber, implicit-def dead early-clobber $q31
|
||||
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
||||
; CHECK-NEXT: [[FMOVv4f16_ns1:%[0-9]+]]:fpr64 = FMOVv4f16_ns 124
|
||||
; CHECK-NEXT: $d0 = COPY [[FMOVv4f16_ns1]]
|
||||
@@ -153,7 +153,7 @@ body: |
|
||||
$d0 = COPY %0
|
||||
BL @bar_v4f16, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $d0, implicit-def $sp
|
||||
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $q0, 12 /* clobber */, implicit-def dead early-clobber $q1, 12 /* clobber */, implicit-def dead early-clobber $q2, 12 /* clobber */, implicit-def dead early-clobber $q3, 12 /* clobber */, implicit-def dead early-clobber $q4, 12 /* clobber */, implicit-def dead early-clobber $q5, 12 /* clobber */, implicit-def dead early-clobber $q6, 12 /* clobber */, implicit-def dead early-clobber $q7, 12 /* clobber */, implicit-def dead early-clobber $q8, 12 /* clobber */, implicit-def dead early-clobber $q9, 12 /* clobber */, implicit-def dead early-clobber $q10, 12 /* clobber */, implicit-def dead early-clobber $q11, 12 /* clobber */, implicit-def dead early-clobber $q12, 12 /* clobber */, implicit-def dead early-clobber $q13, 12 /* clobber */, implicit-def dead early-clobber $q14, 12 /* clobber */, implicit-def dead early-clobber $q15, 12 /* clobber */, implicit-def dead early-clobber $q16, 12 /* clobber */, implicit-def dead early-clobber $q17, 12 /* clobber */, implicit-def dead early-clobber $q18, 12 /* clobber */, implicit-def dead early-clobber $q19, 12 /* clobber */, implicit-def dead early-clobber $q20, 12 /* clobber */, implicit-def dead early-clobber $q21, 12 /* clobber */, implicit-def dead early-clobber $q22, 12 /* clobber */, implicit-def dead early-clobber $q23, 12 /* clobber */, implicit-def dead early-clobber $q24, 12 /* clobber */, implicit-def dead early-clobber $q25, 12 /* clobber */, implicit-def dead early-clobber $q26, 12 /* clobber */, implicit-def dead early-clobber $q27, 12 /* clobber */, implicit-def dead early-clobber $q28, 12 /* clobber */, implicit-def dead early-clobber $q29, 12 /* clobber */, implicit-def dead early-clobber $q30, 12 /* clobber */, implicit-def dead early-clobber $q31
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $q0, clobber, implicit-def dead early-clobber $q1, clobber, implicit-def dead early-clobber $q2, clobber, implicit-def dead early-clobber $q3, clobber, implicit-def dead early-clobber $q4, clobber, implicit-def dead early-clobber $q5, clobber, implicit-def dead early-clobber $q6, clobber, implicit-def dead early-clobber $q7, clobber, implicit-def dead early-clobber $q8, clobber, implicit-def dead early-clobber $q9, clobber, implicit-def dead early-clobber $q10, clobber, implicit-def dead early-clobber $q11, clobber, implicit-def dead early-clobber $q12, clobber, implicit-def dead early-clobber $q13, clobber, implicit-def dead early-clobber $q14, clobber, implicit-def dead early-clobber $q15, clobber, implicit-def dead early-clobber $q16, clobber, implicit-def dead early-clobber $q17, clobber, implicit-def dead early-clobber $q18, clobber, implicit-def dead early-clobber $q19, clobber, implicit-def dead early-clobber $q20, clobber, implicit-def dead early-clobber $q21, clobber, implicit-def dead early-clobber $q22, clobber, implicit-def dead early-clobber $q23, clobber, implicit-def dead early-clobber $q24, clobber, implicit-def dead early-clobber $q25, clobber, implicit-def dead early-clobber $q26, clobber, implicit-def dead early-clobber $q27, clobber, implicit-def dead early-clobber $q28, clobber, implicit-def dead early-clobber $q29, clobber, implicit-def dead early-clobber $q30, clobber, implicit-def dead early-clobber $q31
|
||||
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
||||
$d0 = COPY %0
|
||||
BL @bar_v4f16, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $d0, implicit-def $sp
|
||||
@@ -173,7 +173,7 @@ body: |
|
||||
; CHECK-NEXT: $q0 = COPY [[FMOVv8f16_ns]]
|
||||
; CHECK-NEXT: BL @bar_v8f16, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $q0, implicit-def $sp
|
||||
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $q0, 12 /* clobber */, implicit-def dead early-clobber $q1, 12 /* clobber */, implicit-def dead early-clobber $q2, 12 /* clobber */, implicit-def dead early-clobber $q3, 12 /* clobber */, implicit-def dead early-clobber $q4, 12 /* clobber */, implicit-def dead early-clobber $q5, 12 /* clobber */, implicit-def dead early-clobber $q6, 12 /* clobber */, implicit-def dead early-clobber $q7, 12 /* clobber */, implicit-def dead early-clobber $q8, 12 /* clobber */, implicit-def dead early-clobber $q9, 12 /* clobber */, implicit-def dead early-clobber $q10, 12 /* clobber */, implicit-def dead early-clobber $q11, 12 /* clobber */, implicit-def dead early-clobber $q12, 12 /* clobber */, implicit-def dead early-clobber $q13, 12 /* clobber */, implicit-def dead early-clobber $q14, 12 /* clobber */, implicit-def dead early-clobber $q15, 12 /* clobber */, implicit-def dead early-clobber $q16, 12 /* clobber */, implicit-def dead early-clobber $q17, 12 /* clobber */, implicit-def dead early-clobber $q18, 12 /* clobber */, implicit-def dead early-clobber $q19, 12 /* clobber */, implicit-def dead early-clobber $q20, 12 /* clobber */, implicit-def dead early-clobber $q21, 12 /* clobber */, implicit-def dead early-clobber $q22, 12 /* clobber */, implicit-def dead early-clobber $q23, 12 /* clobber */, implicit-def dead early-clobber $q24, 12 /* clobber */, implicit-def dead early-clobber $q25, 12 /* clobber */, implicit-def dead early-clobber $q26, 12 /* clobber */, implicit-def dead early-clobber $q27, 12 /* clobber */, implicit-def dead early-clobber $q28, 12 /* clobber */, implicit-def dead early-clobber $q29, 12 /* clobber */, implicit-def dead early-clobber $q30, 12 /* clobber */, implicit-def dead early-clobber $q31
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $q0, clobber, implicit-def dead early-clobber $q1, clobber, implicit-def dead early-clobber $q2, clobber, implicit-def dead early-clobber $q3, clobber, implicit-def dead early-clobber $q4, clobber, implicit-def dead early-clobber $q5, clobber, implicit-def dead early-clobber $q6, clobber, implicit-def dead early-clobber $q7, clobber, implicit-def dead early-clobber $q8, clobber, implicit-def dead early-clobber $q9, clobber, implicit-def dead early-clobber $q10, clobber, implicit-def dead early-clobber $q11, clobber, implicit-def dead early-clobber $q12, clobber, implicit-def dead early-clobber $q13, clobber, implicit-def dead early-clobber $q14, clobber, implicit-def dead early-clobber $q15, clobber, implicit-def dead early-clobber $q16, clobber, implicit-def dead early-clobber $q17, clobber, implicit-def dead early-clobber $q18, clobber, implicit-def dead early-clobber $q19, clobber, implicit-def dead early-clobber $q20, clobber, implicit-def dead early-clobber $q21, clobber, implicit-def dead early-clobber $q22, clobber, implicit-def dead early-clobber $q23, clobber, implicit-def dead early-clobber $q24, clobber, implicit-def dead early-clobber $q25, clobber, implicit-def dead early-clobber $q26, clobber, implicit-def dead early-clobber $q27, clobber, implicit-def dead early-clobber $q28, clobber, implicit-def dead early-clobber $q29, clobber, implicit-def dead early-clobber $q30, clobber, implicit-def dead early-clobber $q31
|
||||
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
||||
; CHECK-NEXT: [[FMOVv8f16_ns1:%[0-9]+]]:fpr128 = FMOVv8f16_ns 128
|
||||
; CHECK-NEXT: $q0 = COPY [[FMOVv8f16_ns1]]
|
||||
@@ -185,7 +185,7 @@ body: |
|
||||
$q0 = COPY %0
|
||||
BL @bar_v8f16, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $q0, implicit-def $sp
|
||||
ADJCALLSTACKUP 0, 0, implicit-def dead $sp, implicit $sp
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $q0, 12 /* clobber */, implicit-def dead early-clobber $q1, 12 /* clobber */, implicit-def dead early-clobber $q2, 12 /* clobber */, implicit-def dead early-clobber $q3, 12 /* clobber */, implicit-def dead early-clobber $q4, 12 /* clobber */, implicit-def dead early-clobber $q5, 12 /* clobber */, implicit-def dead early-clobber $q6, 12 /* clobber */, implicit-def dead early-clobber $q7, 12 /* clobber */, implicit-def dead early-clobber $q8, 12 /* clobber */, implicit-def dead early-clobber $q9, 12 /* clobber */, implicit-def dead early-clobber $q10, 12 /* clobber */, implicit-def dead early-clobber $q11, 12 /* clobber */, implicit-def dead early-clobber $q12, 12 /* clobber */, implicit-def dead early-clobber $q13, 12 /* clobber */, implicit-def dead early-clobber $q14, 12 /* clobber */, implicit-def dead early-clobber $q15, 12 /* clobber */, implicit-def dead early-clobber $q16, 12 /* clobber */, implicit-def dead early-clobber $q17, 12 /* clobber */, implicit-def dead early-clobber $q18, 12 /* clobber */, implicit-def dead early-clobber $q19, 12 /* clobber */, implicit-def dead early-clobber $q20, 12 /* clobber */, implicit-def dead early-clobber $q21, 12 /* clobber */, implicit-def dead early-clobber $q22, 12 /* clobber */, implicit-def dead early-clobber $q23, 12 /* clobber */, implicit-def dead early-clobber $q24, 12 /* clobber */, implicit-def dead early-clobber $q25, 12 /* clobber */, implicit-def dead early-clobber $q26, 12 /* clobber */, implicit-def dead early-clobber $q27, 12 /* clobber */, implicit-def dead early-clobber $q28, 12 /* clobber */, implicit-def dead early-clobber $q29, 12 /* clobber */, implicit-def dead early-clobber $q30, 12 /* clobber */, implicit-def dead early-clobber $q31
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $q0, clobber, implicit-def dead early-clobber $q1, clobber, implicit-def dead early-clobber $q2, clobber, implicit-def dead early-clobber $q3, clobber, implicit-def dead early-clobber $q4, clobber, implicit-def dead early-clobber $q5, clobber, implicit-def dead early-clobber $q6, clobber, implicit-def dead early-clobber $q7, clobber, implicit-def dead early-clobber $q8, clobber, implicit-def dead early-clobber $q9, clobber, implicit-def dead early-clobber $q10, clobber, implicit-def dead early-clobber $q11, clobber, implicit-def dead early-clobber $q12, clobber, implicit-def dead early-clobber $q13, clobber, implicit-def dead early-clobber $q14, clobber, implicit-def dead early-clobber $q15, clobber, implicit-def dead early-clobber $q16, clobber, implicit-def dead early-clobber $q17, clobber, implicit-def dead early-clobber $q18, clobber, implicit-def dead early-clobber $q19, clobber, implicit-def dead early-clobber $q20, clobber, implicit-def dead early-clobber $q21, clobber, implicit-def dead early-clobber $q22, clobber, implicit-def dead early-clobber $q23, clobber, implicit-def dead early-clobber $q24, clobber, implicit-def dead early-clobber $q25, clobber, implicit-def dead early-clobber $q26, clobber, implicit-def dead early-clobber $q27, clobber, implicit-def dead early-clobber $q28, clobber, implicit-def dead early-clobber $q29, clobber, implicit-def dead early-clobber $q30, clobber, implicit-def dead early-clobber $q31
|
||||
ADJCALLSTACKDOWN 0, 0, implicit-def dead $sp, implicit $sp
|
||||
$q0 = COPY %0
|
||||
BL @bar_v8f16, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit killed $q0, implicit-def $sp
|
||||
|
||||
@@ -723,7 +723,7 @@ body: |
|
||||
; CHECK-NEXT: bb.1 (%ir-block.0):
|
||||
; CHECK-NEXT: successors: %bb.2(0x80000000), %bb.3(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 1 /* sideeffect attdialect */, 13 /* imm */, %bb.3
|
||||
; CHECK-NEXT: INLINEASM_BR &"", sideeffect attdialect, imm, %bb.3
|
||||
; CHECK-NEXT: B %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.2 (%ir-block.1):
|
||||
@@ -745,7 +745,7 @@ body: |
|
||||
bb.1 (%ir-block.0):
|
||||
successors: %bb.2(0x80000000), %bb.3(0x00000000)
|
||||
|
||||
INLINEASM_BR &"", 1 /* sideeffect attdialect */, 13 /* imm */, %bb.3
|
||||
INLINEASM_BR &"", sideeffect attdialect, imm, %bb.3
|
||||
B %bb.2
|
||||
|
||||
bb.2 (%ir-block.1):
|
||||
|
||||
@@ -91,7 +91,7 @@ body: |
|
||||
STRXui killed renamable $x1, $sp, 1 :: (store (s64) into %ir.x.addr)
|
||||
$x0 = ADDXri $sp, 8, 0
|
||||
BLR killed renamable $x8, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $x0, implicit-def $sp
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $x19
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def dead early-clobber $x19
|
||||
renamable $x0 = LDRXui $sp, 1 :: (dereferenceable load (s64) from %ir.x.addr)
|
||||
frame-destroy SEH_EpilogStart
|
||||
$lr = frame-destroy LDRXui $sp, 3 :: (load (s64) from %stack.1)
|
||||
|
||||
@@ -53,7 +53,7 @@ define i64 @return_type_is_too_big_scalar() {
|
||||
; CHECK-NEXT: successors: %bb.1(0x80000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1 (%ir-block.0):
|
||||
; CHECK-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vgpr8
|
||||
; CHECK-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef, implicit-def $vgpr8
|
||||
%reg = call i64 asm sideeffect "; def $0", "={v8}" ()
|
||||
ret i64 %reg
|
||||
}
|
||||
@@ -74,7 +74,7 @@ define ptr addrspace(1) @return_type_is_too_big_pointer() {
|
||||
; CHECK-NEXT: successors: %bb.1(0x80000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1 (%ir-block.0):
|
||||
; CHECK-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vgpr8
|
||||
; CHECK-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef, implicit-def $vgpr8
|
||||
%reg = call ptr addrspace(1) asm sideeffect "; def $0", "={v8}" ()
|
||||
ret ptr addrspace(1) %reg
|
||||
}
|
||||
@@ -104,7 +104,7 @@ define void @use_vector_too_small(<8 x i32> %arg) {
|
||||
; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $vgpr7
|
||||
; CHECK-NEXT: [[BUILD_VECTOR:%[0-9]+]]:_(<8 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32), [[COPY4]](s32), [[COPY5]](s32), [[COPY6]](s32), [[COPY7]](s32)
|
||||
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY [[BUILD_VECTOR]](<8 x s32>)
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
call void asm sideeffect "; use $0", "{v[0:7]}"(<8 x i32> %arg)
|
||||
ret void
|
||||
|
||||
@@ -7,7 +7,7 @@ define amdgpu_kernel void @asm_convergent() convergent{
|
||||
; CHECK-NEXT: liveins: $sgpr8_sgpr9
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9
|
||||
; CHECK-NEXT: INLINEASM &s_barrier, 33 /* sideeffect isconvergent attdialect */, !1
|
||||
; CHECK-NEXT: INLINEASM &s_barrier, sideeffect isconvergent attdialect, !1
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
call void asm sideeffect "s_barrier", ""() convergent, !srcloc !0
|
||||
ret void
|
||||
@@ -19,8 +19,8 @@ define amdgpu_kernel void @asm_simple_memory_clobber() {
|
||||
; CHECK-NEXT: liveins: $sgpr8_sgpr9
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9
|
||||
; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, !1
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, !1
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, !1
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, !1
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
call void asm sideeffect "", "~{memory}"(), !srcloc !0
|
||||
call void asm sideeffect "", ""(), !srcloc !0
|
||||
@@ -33,7 +33,7 @@ define amdgpu_kernel void @asm_simple_vgpr_clobber() {
|
||||
; CHECK-NEXT: liveins: $sgpr8_sgpr9
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 v0, 7", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $vgpr0, !1
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 v0, 7", sideeffect attdialect, clobber, implicit-def early-clobber $vgpr0, !1
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
call void asm sideeffect "v_mov_b32 v0, 7", "~{v0}"(), !srcloc !0
|
||||
ret void
|
||||
@@ -45,7 +45,7 @@ define amdgpu_kernel void @asm_simple_sgpr_clobber() {
|
||||
; CHECK-NEXT: liveins: $sgpr8_sgpr9
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 s0, 7", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $sgpr0, !1
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 s0, 7", sideeffect attdialect, clobber, implicit-def early-clobber $sgpr0, !1
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
call void asm sideeffect "s_mov_b32 s0, 7", "~{s0}"(), !srcloc !0
|
||||
ret void
|
||||
@@ -57,7 +57,7 @@ define amdgpu_kernel void @asm_simple_agpr_clobber() {
|
||||
; CHECK-NEXT: liveins: $sgpr8_sgpr9
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9
|
||||
; CHECK-NEXT: INLINEASM &"; def a0", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $agpr0, !1
|
||||
; CHECK-NEXT: INLINEASM &"; def a0", sideeffect attdialect, clobber, implicit-def early-clobber $agpr0, !1
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
call void asm sideeffect "; def a0", "~{a0}"(), !srcloc !0
|
||||
ret void
|
||||
@@ -66,7 +66,7 @@ define amdgpu_kernel void @asm_simple_agpr_clobber() {
|
||||
define i32 @asm_vgpr_early_clobber() {
|
||||
; CHECK-LABEL: name: asm_vgpr_early_clobber
|
||||
; CHECK: bb.1 (%ir-block.0):
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, 7; v_mov_b32 $1, 7", 1 /* sideeffect attdialect */, 1114123 /* regdef-ec:VGPR_32 */, def early-clobber %8, 1114123 /* regdef-ec:VGPR_32 */, def early-clobber %9, !1
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, 7; v_mov_b32 $1, 7", sideeffect attdialect, regdef-ec:VGPR_32, def early-clobber %8, regdef-ec:VGPR_32, def early-clobber %9, !1
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY %8
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY %9
|
||||
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[COPY1]]
|
||||
@@ -82,7 +82,7 @@ define i32 @asm_vgpr_early_clobber() {
|
||||
define i32 @test_specific_vgpr_output() nounwind {
|
||||
; CHECK-LABEL: name: test_specific_vgpr_output
|
||||
; CHECK: bb.1.entry:
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 v1, 7", 0 /* attdialect */, 10 /* regdef */, implicit-def $vgpr1
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 v1, 7", attdialect, regdef, implicit-def $vgpr1
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr1
|
||||
; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)
|
||||
; CHECK-NEXT: SI_RETURN implicit $vgpr0
|
||||
@@ -94,7 +94,7 @@ entry:
|
||||
define i32 @test_single_vgpr_output() nounwind {
|
||||
; CHECK-LABEL: name: test_single_vgpr_output
|
||||
; CHECK: bb.1.entry:
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, 7", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %8
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, 7", attdialect, regdef:VGPR_32, def %8
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY %8
|
||||
; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)
|
||||
; CHECK-NEXT: SI_RETURN implicit $vgpr0
|
||||
@@ -106,7 +106,7 @@ entry:
|
||||
define i32 @test_single_sgpr_output_s32() nounwind {
|
||||
; CHECK-LABEL: name: test_single_sgpr_output_s32
|
||||
; CHECK: bb.1.entry:
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 $0, 7", 0 /* attdialect */, 1507338 /* regdef:SReg_32 */, def %8
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 $0, 7", attdialect, regdef:SReg_32, def %8
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY %8
|
||||
; CHECK-NEXT: $vgpr0 = COPY [[COPY]](s32)
|
||||
; CHECK-NEXT: SI_RETURN implicit $vgpr0
|
||||
@@ -119,7 +119,7 @@ entry:
|
||||
define float @test_multiple_register_outputs_same() #0 {
|
||||
; CHECK-LABEL: name: test_multiple_register_outputs_same
|
||||
; CHECK: bb.1 (%ir-block.0):
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, 0; v_mov_b32 $1, 1", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %8, 1114122 /* regdef:VGPR_32 */, def %9
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, 0; v_mov_b32 $1, 1", attdialect, regdef:VGPR_32, def %8, regdef:VGPR_32, def %9
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY %8
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY %9
|
||||
; CHECK-NEXT: [[FADD:%[0-9]+]]:_(s32) = G_FADD [[COPY]], [[COPY1]]
|
||||
@@ -136,7 +136,7 @@ define float @test_multiple_register_outputs_same() #0 {
|
||||
define double @test_multiple_register_outputs_mixed() #0 {
|
||||
; CHECK-LABEL: name: test_multiple_register_outputs_mixed
|
||||
; CHECK: bb.1 (%ir-block.0):
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, 0; v_add_f64 $1, 0, 0", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %8, 2359306 /* regdef:VReg_64 */, def %9
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, 0; v_add_f64 $1, 0, 0", attdialect, regdef:VGPR_32, def %8, regdef:VReg_64, def %9
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY %8
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY %9
|
||||
; CHECK-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY1]](s64)
|
||||
@@ -153,7 +153,7 @@ define float @test_vector_output() nounwind {
|
||||
; CHECK-LABEL: name: test_vector_output
|
||||
; CHECK: bb.1 (%ir-block.0):
|
||||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
|
||||
; CHECK-NEXT: INLINEASM &"v_add_f64 $0, 0, 0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vgpr14_vgpr15
|
||||
; CHECK-NEXT: INLINEASM &"v_add_f64 $0, 0, 0", sideeffect attdialect, regdef, implicit-def $vgpr14_vgpr15
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr14_vgpr15
|
||||
; CHECK-NEXT: [[EVEC:%[0-9]+]]:_(s32) = G_EXTRACT_VECTOR_ELT [[COPY]](<2 x s32>), [[C]](s32)
|
||||
; CHECK-NEXT: $vgpr0 = COPY [[EVEC]](s32)
|
||||
@@ -171,7 +171,7 @@ define amdgpu_kernel void @test_input_vgpr_imm() {
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9
|
||||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[C]](s32)
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 v0, $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 v0, $0", sideeffect attdialect, reguse:VGPR_32, [[COPY1]]
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
call void asm sideeffect "v_mov_b32 v0, $0", "v"(i32 42)
|
||||
ret void
|
||||
@@ -185,7 +185,7 @@ define amdgpu_kernel void @test_input_sgpr_imm() {
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9
|
||||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 42
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY [[C]](s32)
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 s0, $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 s0, $0", sideeffect attdialect, reguse:SReg_32, [[COPY1]]
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
call void asm sideeffect "s_mov_b32 s0, $0", "s"(i32 42)
|
||||
ret void
|
||||
@@ -197,8 +197,8 @@ define amdgpu_kernel void @test_input_imm() {
|
||||
; CHECK-NEXT: liveins: $sgpr8_sgpr9
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 s0, $0", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 42
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b64 s[0:1], $0", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 42
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 s0, $0", sideeffect mayload attdialect, imm, 42
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b64 s[0:1], $0", sideeffect mayload attdialect, imm, 42
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
call void asm sideeffect "s_mov_b32 s0, $0", "i"(i32 42)
|
||||
call void asm sideeffect "s_mov_b64 s[0:1], $0", "i"(i64 42)
|
||||
@@ -212,7 +212,7 @@ define float @test_input_vgpr(i32 %src) nounwind {
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]](s32)
|
||||
; CHECK-NEXT: INLINEASM &"v_add_f32 $0, 1.0, $1", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %9, 1114121 /* reguse:VGPR_32 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"v_add_f32 $0, 1.0, $1", attdialect, regdef:VGPR_32, def %9, reguse:VGPR_32, [[COPY1]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY %9
|
||||
; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32)
|
||||
; CHECK-NEXT: SI_RETURN implicit $vgpr0
|
||||
@@ -227,7 +227,7 @@ define i32 @test_memory_constraint(ptr addrspace(3) %a) nounwind {
|
||||
; CHECK-NEXT: liveins: $vgpr0
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
|
||||
; CHECK-NEXT: INLINEASM &"ds_read_b32 $0, $1", 8 /* mayload attdialect */, 1114122 /* regdef:VGPR_32 */, def %9, 262158 /* mem:m */, [[COPY]](p3)
|
||||
; CHECK-NEXT: INLINEASM &"ds_read_b32 $0, $1", mayload attdialect, regdef:VGPR_32, def %9, mem:m, [[COPY]](p3)
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY %9
|
||||
; CHECK-NEXT: $vgpr0 = COPY [[COPY1]](s32)
|
||||
; CHECK-NEXT: SI_RETURN implicit $vgpr0
|
||||
@@ -244,7 +244,7 @@ define i32 @test_vgpr_matching_constraint(i32 %a) nounwind {
|
||||
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
|
||||
; CHECK-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[AND]](s32)
|
||||
; CHECK-NEXT: INLINEASM &";", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def %11, 2147483657 /* reguse tiedto:$0 */, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: INLINEASM &";", sideeffect attdialect, regdef:VGPR_32, def %11, reguse tiedto:$0, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY %11
|
||||
; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32)
|
||||
; CHECK-NEXT: SI_RETURN implicit $vgpr0
|
||||
@@ -256,13 +256,13 @@ define i32 @test_vgpr_matching_constraint(i32 %a) nounwind {
|
||||
define i32 @test_sgpr_matching_constraint() nounwind {
|
||||
; CHECK-LABEL: name: test_sgpr_matching_constraint
|
||||
; CHECK: bb.1.entry:
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 $0, 7", 0 /* attdialect */, 1507338 /* regdef:SReg_32 */, def %8
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 $0, 7", attdialect, regdef:SReg_32, def %8
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY %8
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 $0, 8", 0 /* attdialect */, 1507338 /* regdef:SReg_32 */, def %10
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 $0, 8", attdialect, regdef:SReg_32, def %10
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY %10
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY [[COPY]](s32)
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:sreg_32 = COPY [[COPY1]](s32)
|
||||
; CHECK-NEXT: INLINEASM &"s_add_u32 $0, $1, $2", 0 /* attdialect */, 1507338 /* regdef:SReg_32 */, def %12, 1507337 /* reguse:SReg_32 */, [[COPY2]], 2147483657 /* reguse tiedto:$0 */, [[COPY3]](tied-def 3)
|
||||
; CHECK-NEXT: INLINEASM &"s_add_u32 $0, $1, $2", attdialect, regdef:SReg_32, def %12, reguse:SReg_32, [[COPY2]], reguse tiedto:$0, [[COPY3]](tied-def 3)
|
||||
; CHECK-NEXT: [[COPY4:%[0-9]+]]:_(s32) = COPY %12
|
||||
; CHECK-NEXT: $vgpr0 = COPY [[COPY4]](s32)
|
||||
; CHECK-NEXT: SI_RETURN implicit $vgpr0
|
||||
@@ -285,7 +285,7 @@ define void @test_many_matching_constraints(i32 %a, i32 %b, i32 %c) nounwind {
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY [[COPY2]](s32)
|
||||
; CHECK-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY [[COPY]](s32)
|
||||
; CHECK-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[COPY1]](s32)
|
||||
; CHECK-NEXT: INLINEASM &"; ", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def %11, 1114122 /* regdef:VGPR_32 */, def %12, 1114122 /* regdef:VGPR_32 */, def %13, 2147483657 /* reguse tiedto:$0 */, [[COPY3]](tied-def 3), 2147614729 /* reguse tiedto:$2 */, [[COPY4]](tied-def 7), 2147549193 /* reguse tiedto:$1 */, [[COPY5]](tied-def 5)
|
||||
; CHECK-NEXT: INLINEASM &"; ", sideeffect attdialect, regdef:VGPR_32, def %11, regdef:VGPR_32, def %12, regdef:VGPR_32, def %13, reguse tiedto:$0, [[COPY3]](tied-def 3), reguse tiedto:$2, [[COPY4]](tied-def 7), reguse tiedto:$1, [[COPY5]](tied-def 5)
|
||||
; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY %11
|
||||
; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY %12
|
||||
; CHECK-NEXT: [[COPY8:%[0-9]+]]:_(s32) = COPY %13
|
||||
@@ -306,10 +306,10 @@ define void @test_many_matching_constraints(i32 %a, i32 %b, i32 %c) nounwind {
|
||||
define i32 @test_sgpr_to_vgpr_move_matching_constraint() nounwind {
|
||||
; CHECK-LABEL: name: test_sgpr_to_vgpr_move_matching_constraint
|
||||
; CHECK: bb.1.entry:
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 $0, 7", 0 /* attdialect */, 1507338 /* regdef:SReg_32 */, def %8
|
||||
; CHECK-NEXT: INLINEASM &"s_mov_b32 $0, 7", attdialect, regdef:SReg_32, def %8
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY %8
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]](s32)
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, $1", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %10, 2147483657 /* reguse tiedto:$0 */, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, $1", attdialect, regdef:VGPR_32, def %10, reguse tiedto:$0, [[COPY1]](tied-def 3)
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY %10
|
||||
; CHECK-NEXT: $vgpr0 = COPY [[COPY2]](s32)
|
||||
; CHECK-NEXT: SI_RETURN implicit $vgpr0
|
||||
@@ -325,7 +325,7 @@ define amdgpu_kernel void @asm_constraint_n_n() {
|
||||
; CHECK-NEXT: liveins: $sgpr8_sgpr9
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr8_sgpr9
|
||||
; CHECK-NEXT: INLINEASM &"s_trap ${0:n}", 1 /* sideeffect attdialect */, 13 /* imm */, 10
|
||||
; CHECK-NEXT: INLINEASM &"s_trap ${0:n}", sideeffect attdialect, imm, 10
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
tail call void asm sideeffect "s_trap ${0:n}", "n"(i32 10) #1
|
||||
ret void
|
||||
@@ -342,7 +342,7 @@ define void @test_indirectify_i32_value(i32 %x, i32 %y) {
|
||||
; CHECK-NEXT: G_STORE [[COPY]](s32), [[FRAME_INDEX]](p5) :: (store (s32) into %stack.0, addrspace 5)
|
||||
; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.1
|
||||
; CHECK-NEXT: G_STORE [[COPY1]](s32), [[FRAME_INDEX1]](p5) :: (store (s32) into %stack.1, addrspace 5)
|
||||
; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 262158 /* mem:m */, [[FRAME_INDEX]](p5), 262158 /* mem:m */, [[FRAME_INDEX1]](p5)
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p5), mem:m, [[FRAME_INDEX1]](p5)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
entry:
|
||||
tail call void asm sideeffect "", "imr,imr,~{memory}"(i32 %x, i32 %y)
|
||||
@@ -358,7 +358,7 @@ define void @test_indirectify_i32_constant() {
|
||||
; CHECK-NEXT: G_STORE [[C]](s32), [[FRAME_INDEX]](p5) :: (store (s32) into %stack.0, addrspace 5)
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||||
; CHECK-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.1
|
||||
; CHECK-NEXT: G_STORE [[C1]](s32), [[FRAME_INDEX1]](p5) :: (store (s32) into %stack.1, addrspace 5)
|
||||
; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 262158 /* mem:m */, [[FRAME_INDEX]](p5), 262158 /* mem:m */, [[FRAME_INDEX1]](p5)
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p5), mem:m, [[FRAME_INDEX1]](p5)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
entry:
|
||||
tail call void asm sideeffect "", "imr,imr,~{memory}"(i32 42, i32 0)
|
||||
@@ -375,7 +375,7 @@ define void @test_indirectify_i16_value(i16 %val) {
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||||
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
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||||
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.0
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||||
; CHECK-NEXT: G_STORE [[TRUNC]](s16), [[FRAME_INDEX]](p5) :: (store (s16) into %stack.0, addrspace 5)
|
||||
; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 262158 /* mem:m */, [[FRAME_INDEX]](p5)
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; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p5)
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; CHECK-NEXT: SI_RETURN
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entry:
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||||
tail call void asm sideeffect "", "imr,~{memory}"(i16 %val)
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@@ -388,7 +388,7 @@ define void @test_indirectify_i16_constant() {
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 42
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; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.0
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; CHECK-NEXT: G_STORE [[C]](s16), [[FRAME_INDEX]](p5) :: (store (s16) into %stack.0, addrspace 5)
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; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 262158 /* mem:m */, [[FRAME_INDEX]](p5)
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; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p5)
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; CHECK-NEXT: SI_RETURN
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entry:
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tail call void asm sideeffect "", "imr,~{memory}"(i16 42)
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@@ -405,7 +405,7 @@ define void @test_indirectify_i64_value(i64 %val) {
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; CHECK-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY]](s32), [[COPY1]](s32)
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; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.0
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; CHECK-NEXT: G_STORE [[MV]](s64), [[FRAME_INDEX]](p5) :: (store (s64) into %stack.0, addrspace 5)
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; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 262158 /* mem:m */, [[FRAME_INDEX]](p5)
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; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p5)
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; CHECK-NEXT: SI_RETURN
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entry:
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||||
tail call void asm sideeffect "", "imr,~{memory}"(i64 %val)
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@@ -418,7 +418,7 @@ define void @test_indirectify_i64_constant() {
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; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 42
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; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p5) = G_FRAME_INDEX %stack.0
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; CHECK-NEXT: G_STORE [[C]](s64), [[FRAME_INDEX]](p5) :: (store (s64) into %stack.0, addrspace 5)
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; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 262158 /* mem:m */, [[FRAME_INDEX]](p5)
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; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, mem:m, [[FRAME_INDEX]](p5)
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||||
; CHECK-NEXT: SI_RETURN
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||||
entry:
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||||
tail call void asm sideeffect "", "imr,~{memory}"(i64 42)
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||||
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||||
@@ -24,7 +24,7 @@ body: |
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||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY [[C]](s32)
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; CHECK-NEXT: [[FMUL:%[0-9]+]]:vgpr(s32) = G_FMUL [[COPY]], [[COPY1]]
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; CHECK-NEXT: [[C1:%[0-9]+]]:sgpr(s32) = G_FCONSTANT float 1.000000e+00
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||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, 0", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %5(s32)
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||||
; CHECK-NEXT: INLINEASM &"v_mov_b32 $0, 0", attdialect, regdef:VGPR_32, def %5(s32)
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; CHECK-NEXT: [[COPY2:%[0-9]+]]:vgpr(s32) = COPY [[C1]](s32)
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; CHECK-NEXT: [[AMDGPU_FMED3_:%[0-9]+]]:vgpr(s32) = nnan G_AMDGPU_FMED3 [[FMUL]], %5, [[COPY2]]
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||||
; CHECK-NEXT: $vgpr0 = COPY [[AMDGPU_FMED3_]](s32)
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||||
@@ -33,7 +33,7 @@ body: |
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||||
%2:vgpr(s32) = COPY %1(s32)
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||||
%3:vgpr(s32) = G_FMUL %0, %2
|
||||
%4:sgpr(s32) = G_FCONSTANT float 1.000000e+00
|
||||
INLINEASM &"v_mov_b32 $0, 0", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %5:vgpr_32
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||||
INLINEASM &"v_mov_b32 $0, 0", attdialect, regdef:VGPR_32, def %5:vgpr_32
|
||||
%6:vgpr(s32) = COPY %4(s32)
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||||
%7:vgpr(s32) = nnan G_AMDGPU_FMED3 %3(s32), %5(s32), %6(s32)
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||||
$vgpr0 = COPY %7(s32)
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||||
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||||
@@ -68,7 +68,7 @@ body: |
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||||
; CHECK-NEXT: successors: %bb.3(0x04000000), %bb.7(0x7c000000)
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||||
; CHECK-NEXT: liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
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||||
; CHECK-NEXT: {{ $}}
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||||
; CHECK-NEXT: INLINEASM &"v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64", 1 /* sideeffect attdialect */, 1507338 /* regdef:SReg_32 */, def renamable $sgpr4
|
||||
; CHECK-NEXT: INLINEASM &"v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64", sideeffect attdialect, regdef:SReg_32, def renamable $sgpr4
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||||
; CHECK-NEXT: S_CMP_LG_U32 killed renamable $sgpr4, 0, implicit-def $scc
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||||
; CHECK-NEXT: S_CBRANCH_SCC0 %bb.3, implicit killed $scc
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||||
; CHECK-NEXT: {{ $}}
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||||
@@ -149,7 +149,7 @@ body: |
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||||
successors: %bb.3(0x04000000), %bb.2(0x7c000000)
|
||||
liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
|
||||
|
||||
INLINEASM &"v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64", 1 /* sideeffect attdialect */, 1507338 /* regdef:SReg_32 */, def renamable $sgpr4
|
||||
INLINEASM &"v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64", sideeffect attdialect, regdef:SReg_32, def renamable $sgpr4
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||||
S_CMP_LG_U32 killed renamable $sgpr4, 0, implicit-def $scc
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||||
S_CBRANCH_SCC1 %bb.2, implicit killed $scc
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||||
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||||
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||||
@@ -69,7 +69,7 @@ body: |
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||||
; CHECK-NEXT: successors: %bb.3(0x04000000), %bb.7(0x7c000000)
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||||
; CHECK-NEXT: liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
|
||||
; CHECK-NEXT: {{ $}}
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||||
; CHECK-NEXT: INLINEASM &"v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64", 1 /* sideeffect attdialect */, 1507338 /* regdef:SReg_32 */, def renamable $sgpr4
|
||||
; CHECK-NEXT: INLINEASM &"v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64", sideeffect attdialect, regdef:SReg_32, def renamable $sgpr4
|
||||
; CHECK-NEXT: S_CMP_LG_U32 killed renamable $sgpr4, 0, implicit-def $scc
|
||||
; CHECK-NEXT: S_CBRANCH_SCC0 %bb.3, implicit killed $scc
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -151,7 +151,7 @@ body: |
|
||||
successors: %bb.3(0x04000000), %bb.2(0x7c000000)
|
||||
liveins: $vcc_hi, $vcc_lo, $sgpr5, $sgpr6, $sgpr7, $sgpr8, $sgpr9, $sgpr10, $sgpr11, $sgpr12, $sgpr13, $sgpr14, $sgpr15, $sgpr16, $sgpr17, $sgpr18, $sgpr19, $sgpr20, $sgpr21, $sgpr22, $sgpr23, $sgpr24, $sgpr25, $sgpr26, $sgpr27, $sgpr28, $sgpr29, $sgpr30, $sgpr31, $sgpr34, $sgpr35, $sgpr36, $sgpr37, $sgpr38, $sgpr39, $sgpr40, $sgpr41, $sgpr42, $sgpr43, $sgpr44, $sgpr45, $sgpr46, $sgpr47, $sgpr48, $sgpr49, $sgpr50, $sgpr51, $sgpr52, $sgpr53, $sgpr54, $sgpr55, $sgpr56, $sgpr57, $sgpr58, $sgpr59, $sgpr60, $sgpr61, $sgpr62, $sgpr63, $sgpr64, $sgpr65, $sgpr66, $sgpr67, $sgpr68, $sgpr69, $sgpr70, $sgpr71, $sgpr72, $sgpr73, $sgpr74, $sgpr75, $sgpr76, $sgpr77, $sgpr78, $sgpr79, $sgpr80, $sgpr81, $sgpr82, $sgpr83, $sgpr84, $sgpr85, $sgpr86, $sgpr87, $sgpr88, $sgpr89, $sgpr90, $sgpr91, $sgpr92, $sgpr93, $sgpr94, $sgpr95, $sgpr96, $sgpr97, $sgpr98, $sgpr99, $sgpr100, $sgpr101, $vgpr0, $vgpr1
|
||||
|
||||
INLINEASM &"v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64", 1 /* sideeffect attdialect */, 1507338 /* regdef:SReg_32 */, def renamable $sgpr4
|
||||
INLINEASM &"v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64\0A v_nop_e64", sideeffect attdialect, regdef:SReg_32, def renamable $sgpr4
|
||||
S_CMP_LG_U32 killed renamable $sgpr4, 0, implicit-def $scc
|
||||
S_CBRANCH_SCC1 %bb.2, implicit killed $scc
|
||||
|
||||
|
||||
@@ -27,14 +27,14 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_OFFEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_2]], 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY6:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_OFFSET3:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET [[S_LOAD_DWORDX4_IMM]], [[COPY6]], 128, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_OFFSET4:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET [[REG_SEQUENCE1]], [[S_MOV_B32_]], 128, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_OFFSET5:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET [[REG_SEQUENCE1]], [[S_MOV_B32_1]], 64, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_OFFSET6:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET [[REG_SEQUENCE1]], [[S_MOV_B32_2]], 0, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_OFFEN1:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFEN [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_2]], 0, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY7:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_OFFSET7:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_OFFSET [[REG_SEQUENCE1]], [[COPY7]], 128, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_OFFSET:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 144, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[S_MOV_B32_3:%[0-9]+]]:sreg_32 = S_MOV_B32 72
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_OFFSET1:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_3]], 72, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
@@ -43,14 +43,14 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_OFFEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_4]], 0, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY8:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_OFFSET3:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[S_LOAD_DWORDX4_IMM]], [[COPY8]], 144, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_OFFSET4:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[REG_SEQUENCE1]], [[S_MOV_B32_]], 144, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_OFFSET5:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[REG_SEQUENCE1]], [[S_MOV_B32_3]], 72, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_OFFSET6:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[REG_SEQUENCE1]], [[S_MOV_B32_4]], 0, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_OFFEN1:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFEN [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_4]], 0, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY9:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_OFFSET7:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_OFFSET [[REG_SEQUENCE1]], [[COPY9]], 144, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 160, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[S_MOV_B32_5:%[0-9]+]]:sreg_32 = S_MOV_B32 80
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_5]], 80, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
@@ -59,14 +59,14 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_OFFEN [[COPY]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY10:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[COPY10]], 160, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 160, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_5]], 80, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_OFFEN [[COPY]], [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_6]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY11:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_OFFSET [[COPY]], [[REG_SEQUENCE1]], [[COPY11]], 160, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[REG_SEQUENCE2:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY]], %subreg.sub1
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE2]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 176, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[S_MOV_B32_7:%[0-9]+]]:sreg_32 = S_MOV_B32 88
|
||||
@@ -76,14 +76,14 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_OFFEN [[REG_SEQUENCE2]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_8]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY12:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE2]], [[S_LOAD_DWORDX4_IMM]], [[COPY12]], 176, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE2]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 176, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE2]], [[REG_SEQUENCE1]], [[S_MOV_B32_7]], 88, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE2]], [[REG_SEQUENCE1]], [[S_MOV_B32_8]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_OFFEN [[REG_SEQUENCE2]], [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_8]], 0, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY13:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_OFFSET [[REG_SEQUENCE2]], [[REG_SEQUENCE1]], [[COPY13]], 176, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 192, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[S_MOV_B32_9:%[0-9]+]]:sreg_32 = S_MOV_B32 96
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET1]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_9]], 96, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
@@ -92,14 +92,14 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_OFFEN_exact killed [[BUFFER_LOAD_DWORDX4_OFFEN]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_10]], 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY14:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET3]], [[S_LOAD_DWORDX4_IMM]], [[COPY14]], 192, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET4]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 192, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET5]], [[REG_SEQUENCE1]], [[S_MOV_B32_9]], 96, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET6]], [[REG_SEQUENCE1]], [[S_MOV_B32_10]], 0, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_OFFEN_exact killed [[BUFFER_LOAD_DWORDX4_OFFEN1]], [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_10]], 0, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY15:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_OFFSET_exact killed [[BUFFER_LOAD_DWORDX4_OFFSET7]], [[REG_SEQUENCE1]], [[COPY15]], 192, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 208, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[S_MOV_B32_11:%[0-9]+]]:sreg_32 = S_MOV_B32 104
|
||||
; GCN-NEXT: BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET1]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_11]], 104, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
@@ -108,14 +108,14 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: BUFFER_STORE_FORMAT_XYZW_OFFEN_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFEN]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_12]], 0, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY16:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET3]], [[S_LOAD_DWORDX4_IMM]], [[COPY16]], 208, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET4]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 208, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET5]], [[REG_SEQUENCE1]], [[S_MOV_B32_11]], 104, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET6]], [[REG_SEQUENCE1]], [[S_MOV_B32_12]], 0, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_STORE_FORMAT_XYZW_OFFEN_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFEN1]], [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_12]], 0, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY17:%[0-9]+]]:sreg_32 = COPY [[COPY]]
|
||||
; GCN-NEXT: BUFFER_STORE_FORMAT_XYZW_OFFSET_exact killed [[BUFFER_LOAD_FORMAT_XYZW_OFFSET7]], [[REG_SEQUENCE1]], [[COPY17]], 208, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY18:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_IDXEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY18]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 224, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[S_MOV_B32_13:%[0-9]+]]:sreg_32 = S_MOV_B32 112
|
||||
@@ -132,7 +132,7 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_IDXEN4:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 224, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_IDXEN5:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 224, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY23:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_IDXEN6:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY23]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 224, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY24:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
@@ -145,7 +145,7 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_IDXEN9:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY26]], [[REG_SEQUENCE1]], [[COPY27]], 224, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_IDXEN10:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[V_MOV_B32_e32_]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 224, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_DWORDX4_IDXEN11:%[0-9]+]]:vreg_128 = BUFFER_LOAD_DWORDX4_IDXEN [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 224, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY28:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_IDXEN:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY28]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 240, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[S_MOV_B32_15:%[0-9]+]]:sreg_32 = S_MOV_B32 120
|
||||
@@ -160,7 +160,7 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_IDXEN3:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY31]], [[S_LOAD_DWORDX4_IMM]], [[COPY32]], 240, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_IDXEN4:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 240, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_IDXEN5:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 240, 0, 0, implicit $exec :: (dereferenceable load (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY33:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_IDXEN6:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY33]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 240, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY34:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
@@ -173,7 +173,7 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_IDXEN9:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY36]], [[REG_SEQUENCE1]], [[COPY37]], 240, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_IDXEN10:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[V_MOV_B32_e32_]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 240, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[BUFFER_LOAD_FORMAT_XYZW_IDXEN11:%[0-9]+]]:vreg_128 = BUFFER_LOAD_FORMAT_XYZW_IDXEN [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 240, 0, 0, implicit $exec :: (dereferenceable load (s128) from %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY38:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY38]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 256, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY39:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
@@ -187,7 +187,7 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY41]], [[S_LOAD_DWORDX4_IMM]], [[COPY42]], 256, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 256, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 256, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY43:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY43]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 256, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY44:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
@@ -200,7 +200,7 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY46]], [[REG_SEQUENCE1]], [[COPY47]], 256, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 256, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_ADD_IDXEN [[COPY]], [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 256, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY48:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE2]], [[COPY48]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 272, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[S_MOV_B32_18:%[0-9]+]]:sreg_32 = S_MOV_B32 136
|
||||
@@ -215,7 +215,7 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE2]], [[COPY51]], [[S_LOAD_DWORDX4_IMM]], [[COPY52]], 272, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE2]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 272, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE2]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 272, 0, implicit $exec :: (volatile dereferenceable load store (s32), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY53:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE2]], [[COPY53]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 272, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY54:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
@@ -228,7 +228,7 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE2]], [[COPY56]], [[REG_SEQUENCE1]], [[COPY57]], 272, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE2]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 272, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_ATOMIC_CMPSWAP_IDXEN [[REG_SEQUENCE2]], [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 272, 0, implicit $exec :: (volatile dereferenceable load store (s32) on %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY58:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN]], [[COPY58]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 288, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY59:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
@@ -242,7 +242,7 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN3]], [[COPY61]], [[S_LOAD_DWORDX4_IMM]], [[COPY62]], 288, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN4]], [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 288, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN5]], [[COPY]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 288, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY63:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN6]], [[COPY63]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 288, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: [[COPY64:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
@@ -255,7 +255,7 @@ define amdgpu_cs void @mmo_offsets0(ptr addrspace(6) inreg noalias align(16) der
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN9]], [[COPY66]], [[REG_SEQUENCE1]], [[COPY67]], 288, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN10]], [[V_MOV_B32_e32_]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 288, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: BUFFER_STORE_DWORDX4_IDXEN_exact killed [[BUFFER_LOAD_DWORDX4_IDXEN11]], [[COPY]], [[REG_SEQUENCE1]], [[S_MOV_B32_]], 288, 0, 0, implicit $exec :: (dereferenceable store (s128) into %ir.tmp1, align 1, addrspace 8)
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: [[COPY68:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GCN-NEXT: BUFFER_STORE_FORMAT_XYZW_IDXEN_exact killed [[BUFFER_LOAD_FORMAT_XYZW_IDXEN]], [[COPY68]], [[S_LOAD_DWORDX4_IMM]], [[S_MOV_B32_]], 304, 0, 0, implicit $exec :: (dereferenceable store (s128), align 1, addrspace 8)
|
||||
; GCN-NEXT: [[S_MOV_B32_21:%[0-9]+]]:sreg_32 = S_MOV_B32 152
|
||||
|
||||
@@ -67,7 +67,7 @@ define float @asm_changes_mode(float %x, float %y) #0 {
|
||||
; SDAG-NEXT: {{ $}}
|
||||
; SDAG-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
||||
; SDAG-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; SDAG-NEXT: INLINEASM &"; maybe defs mode", 1 /* sideeffect attdialect */, !0, implicit-def $mode
|
||||
; SDAG-NEXT: INLINEASM &"; maybe defs mode", sideeffect attdialect, !0, implicit-def $mode
|
||||
; SDAG-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
|
||||
; SDAG-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]]
|
||||
; SDAG-NEXT: SI_RETURN implicit $vgpr0
|
||||
@@ -78,7 +78,7 @@ define float @asm_changes_mode(float %x, float %y) #0 {
|
||||
; GISEL-NEXT: {{ $}}
|
||||
; GISEL-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; GISEL-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
||||
; GISEL-NEXT: INLINEASM &"; maybe defs mode", 1 /* sideeffect attdialect */, !0, implicit-def $mode
|
||||
; GISEL-NEXT: INLINEASM &"; maybe defs mode", sideeffect attdialect, !0, implicit-def $mode
|
||||
; GISEL-NEXT: [[V_ADD_F32_e64_:%[0-9]+]]:vgpr_32 = nofpexcept V_ADD_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
|
||||
; GISEL-NEXT: $vgpr0 = COPY [[V_ADD_F32_e64_]]
|
||||
; GISEL-NEXT: SI_RETURN implicit $vgpr0
|
||||
|
||||
@@ -20,13 +20,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%1:vgpr_32 = COPY $vgpr1
|
||||
undef %2.sub0:areg_64 = COPY %0
|
||||
%2.sub1:areg_64 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -45,13 +45,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%1:vgpr_32 = COPY $vgpr1
|
||||
undef %2.sub0:areg_64_align2 = COPY %0
|
||||
%2.sub1:areg_64_align2 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -72,7 +72,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0:areg_96 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]].sub1:areg_96 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]].sub2:areg_96 = COPY [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY3]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%1:vgpr_32 = COPY $vgpr1
|
||||
@@ -80,7 +80,7 @@ body: |
|
||||
undef %3.sub0:areg_96 = COPY %0
|
||||
%3.sub1:areg_96 = COPY %1
|
||||
%3.sub2:areg_96 = COPY %2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %3
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %3
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -101,7 +101,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, [[COPY3]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%1:vgpr_32 = COPY $vgpr1
|
||||
@@ -109,7 +109,7 @@ body: |
|
||||
undef %3.sub0:areg_96_align2 = COPY %0
|
||||
%3.sub1:areg_96_align2 = COPY %1
|
||||
%3.sub2:areg_96_align2 = COPY %2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, %3
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, %3
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -128,13 +128,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_128 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2_sub3:areg_128 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64 = COPY $vgpr0_vgpr1
|
||||
%1:vreg_64 = COPY $vgpr2_vgpr3
|
||||
undef %2.sub0_sub1:areg_128 = COPY %0
|
||||
%2.sub2_sub3:areg_128 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -153,13 +153,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr2_vgpr3
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2_sub3:areg_128_align2 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64 = COPY $vgpr0_vgpr1
|
||||
%1:vreg_64 = COPY $vgpr2_vgpr3
|
||||
undef %2.sub0_sub1:areg_128_align2 = COPY %0
|
||||
%2.sub2_sub3:areg_128_align2 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -178,13 +178,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:sgpr_32 = COPY $sgpr9
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:sgpr_32 = COPY $sgpr8
|
||||
%1:sgpr_32 = COPY $sgpr9
|
||||
undef %2.sub0:areg_64_align2 = COPY %0
|
||||
%2.sub1:areg_64_align2 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -203,13 +203,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr1_vgpr2
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_96 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%1:vreg_64 = COPY $vgpr1_vgpr2
|
||||
undef %2.sub0:areg_96 = COPY %0
|
||||
%2.sub1_sub2:areg_96 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -228,13 +228,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vreg_64 = COPY $vgpr1_vgpr2
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1_sub2:areg_96_align2 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%1:vreg_64 = COPY $vgpr1_vgpr2
|
||||
undef %2.sub0:areg_96_align2 = COPY %0
|
||||
%2.sub1_sub2:areg_96_align2 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -253,13 +253,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_96 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2:areg_96 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64 = COPY $vgpr0_vgpr1
|
||||
%1:vgpr_32 = COPY $vgpr2
|
||||
undef %2.sub0_sub1:areg_96 = COPY %0
|
||||
%2.sub2:areg_96 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -278,13 +278,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64 = COPY $vgpr0_vgpr1
|
||||
%1:vgpr_32 = COPY $vgpr2
|
||||
undef %2.sub0_sub1:areg_96_align2 = COPY %0
|
||||
%2.sub2:areg_96_align2 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -302,12 +302,12 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
undef %2.sub0:areg_64 = COPY %0
|
||||
%2.sub1:areg_64 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -326,13 +326,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%1:vgpr_32 = COPY $vgpr1
|
||||
undef %2.sub0:areg_64_align2 = COPY %0
|
||||
%2.sub1:areg_64_align2 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -350,12 +350,12 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
undef %1.sub0:areg_96 = COPY %0
|
||||
%1.sub1:areg_96 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %1
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -373,12 +373,12 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
undef %1.sub0:areg_96_align2 = COPY %0
|
||||
%1.sub1:areg_96_align2 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, %1
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -398,14 +398,14 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
undef %1.sub0:areg_128 = COPY %0
|
||||
%1.sub1:areg_128 = COPY %0
|
||||
%1.sub2:areg_128 = COPY %0
|
||||
%1.sub3:areg_128 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, killed %1
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128, killed %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -425,14 +425,14 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
undef %1.sub0:areg_128_align2 = COPY %0
|
||||
%1.sub1:areg_128_align2 = COPY %0
|
||||
%1.sub2:areg_128_align2 = COPY %0
|
||||
%1.sub3:areg_128_align2 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %1
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -451,15 +451,15 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_64 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1:areg_64 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
%1:vgpr_32 = COPY $vgpr1
|
||||
undef %2.sub0:areg_64 = COPY %0
|
||||
%2.sub1:areg_64 = COPY %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, killed %2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 1114121 /* reguse:VGPR_32 */, killed %0
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:VGPR_32, killed %0
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -477,14 +477,14 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
undef %1.sub0:areg_64 = COPY %0
|
||||
%1.sub1:areg_64 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, killed %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 1114121 /* reguse:VGPR_32 */, killed %0
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64, killed %1
|
||||
INLINEASM &"; use $0", attdialect, reguse:VGPR_32, killed %0
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -503,16 +503,16 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2359305 /* reguse:VReg_64 */, [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:VReg_64, [[COPY]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = COPY $vgpr0
|
||||
undef %1.sub0:areg_64 = COPY %0
|
||||
%1.sub1:areg_64 = COPY %0
|
||||
undef %2.sub0:vreg_64 = COPY %0
|
||||
%2.sub1:vreg_64 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, killed %1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 2359305 /* reguse:VReg_64 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64, killed %1
|
||||
INLINEASM &"; use $0", attdialect, reguse:VReg_64, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -533,13 +533,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_64 = COPY $vgpr0
|
||||
%0.sub1:vreg_64 = COPY $vgpr1
|
||||
undef %2.sub0:areg_64 = COPY %0.sub0
|
||||
%2.sub1:areg_64 = COPY %0.sub1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -558,13 +558,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_64 = COPY $vgpr0
|
||||
%0.sub1:vreg_64 = COPY $vgpr1
|
||||
undef %2.sub0:areg_64_align2 = COPY %0.sub0
|
||||
%2.sub1:areg_64_align2 = COPY %0.sub1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -585,7 +585,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_96 =COPY $vgpr0
|
||||
%0.sub1:vreg_96 = COPY $vgpr1
|
||||
@@ -593,7 +593,7 @@ body: |
|
||||
undef %3.sub0:areg_96 = COPY %0.sub0
|
||||
%3.sub1:areg_96 = COPY %0.sub1
|
||||
%3.sub2:areg_96 = COPY %0.sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %3
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %3
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -614,7 +614,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_96 =COPY $vgpr0
|
||||
%0.sub1:vreg_96 = COPY $vgpr1
|
||||
@@ -622,7 +622,7 @@ body: |
|
||||
undef %3.sub0:areg_96_align2 = COPY %0.sub0
|
||||
%3.sub1:areg_96_align2 = COPY %0.sub1
|
||||
%3.sub2:areg_96_align2 = COPY %0.sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, %3
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, %3
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -641,13 +641,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128 = COPY [[COPY]].sub0_sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128 = COPY [[COPY]].sub2_sub3
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0_sub1:vreg_128 =COPY $vgpr0_vgpr1
|
||||
%0.sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3
|
||||
undef %2.sub0_sub1:areg_128 = COPY %0.sub0_sub1
|
||||
%2.sub2_sub3:areg_128 = COPY %0.sub2_sub3
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -668,13 +668,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_128 = COPY $vgpr2_vgpr3
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128_align2 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_128 =COPY $vgpr0_vgpr1
|
||||
%0.sub1:vreg_128 = COPY $vgpr2_vgpr3
|
||||
undef %2.sub0_sub1:areg_128_align2 = COPY %0.sub0
|
||||
%2.sub2_sub3:areg_128_align2 = COPY %0.sub1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -693,13 +693,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:sreg_64 = COPY $sgpr9
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:sreg_64 = COPY $sgpr8
|
||||
%0.sub1:sreg_64 = COPY $sgpr9
|
||||
undef %2.sub0:areg_64_align2 = COPY %0.sub0
|
||||
%2.sub1:areg_64_align2 = COPY %0.sub1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -718,13 +718,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY]].sub1_sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_96 =COPY $vgpr0
|
||||
%0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2
|
||||
undef %2.sub0:areg_96 = COPY %0.sub0
|
||||
%2.sub1_sub2:areg_96 = COPY %0.sub1_sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -743,13 +743,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96_align2 = COPY [[COPY]].sub1_sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_96 =COPY $vgpr0
|
||||
%0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2
|
||||
undef %2.sub0:areg_96_align2 = COPY %0.sub0
|
||||
%2.sub1_sub2:areg_96_align2 = COPY %0.sub1_sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -768,13 +768,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96 = COPY [[COPY]].sub0_sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1
|
||||
%0.sub2:vreg_96 = COPY $vgpr2
|
||||
undef %2.sub0_sub1:areg_96 = COPY %0.sub0_sub1
|
||||
%2.sub2:areg_96 = COPY %0.sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -793,13 +793,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]].sub0_sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1
|
||||
%0.sub2:vreg_96 = COPY $vgpr2
|
||||
undef %2.sub0_sub1:areg_96_align2 = COPY %0.sub0_sub1
|
||||
%2.sub2:areg_96_align2 = COPY %0.sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -817,12 +817,12 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_64 = COPY $vgpr0
|
||||
undef %2.sub0:areg_64 = COPY %0.sub0
|
||||
%2.sub1:areg_64 = COPY %0.sub0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -841,13 +841,13 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_64 = COPY $vgpr0
|
||||
undef %1.sub0:areg_96 = COPY %0.sub0
|
||||
%1.sub1:areg_96 = COPY %0.sub0
|
||||
%1.sub2:areg_96 = COPY %0.sub0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %1
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -865,12 +865,12 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub0:vreg_64 = COPY $vgpr0
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_64 = COPY $vgpr0
|
||||
undef %1.sub0:areg_96_align2 = COPY %0.sub0
|
||||
%1.sub1:areg_96_align2 = COPY %0.sub0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, %1
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -890,14 +890,14 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_64 = COPY $vgpr0
|
||||
undef %1.sub0:areg_128 = COPY %0.sub0
|
||||
%1.sub1:areg_128 = COPY %0.sub0
|
||||
%1.sub2:areg_128 = COPY %0.sub0
|
||||
%1.sub3:areg_128 = COPY %0.sub0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, killed %1
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128, killed %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -917,14 +917,14 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_128_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_128_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub3:areg_128_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_64 = COPY $vgpr0
|
||||
undef %1.sub0:areg_128_align2 = COPY %0.sub0
|
||||
%1.sub1:areg_128_align2 = COPY %0.sub0
|
||||
%1.sub2:areg_128_align2 = COPY %0.sub0
|
||||
%1.sub3:areg_128_align2 = COPY %0.sub0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %1
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -943,13 +943,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64 = COPY $vgpr1
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_64 = COPY $vgpr0
|
||||
%0.sub1:vreg_64 = COPY $vgpr1
|
||||
undef %2.sub0:areg_64 = COPY %0.sub0
|
||||
%2.sub1:areg_64 = COPY %0.sub1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -968,13 +968,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:vreg_64_align2 = COPY $vgpr1
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_64_align2 = COPY $vgpr0
|
||||
%0.sub1:vreg_64_align2 = COPY $vgpr1
|
||||
undef %2.sub0:areg_64_align2 = COPY %0.sub0
|
||||
%2.sub1:areg_64_align2 = COPY %0.sub1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -995,7 +995,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_96 = COPY $vgpr0
|
||||
%0.sub1:vreg_96 = COPY $vgpr1
|
||||
@@ -1003,7 +1003,7 @@ body: |
|
||||
undef %3.sub0:areg_96 = COPY %0.sub0
|
||||
%3.sub1:areg_96 = COPY %0.sub1
|
||||
%3.sub2:areg_96 = COPY %0.sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %3
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %3
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1024,7 +1024,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_96_align2 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_96_align2 = COPY $vgpr0
|
||||
%0.sub1:vreg_96_align2 = COPY $vgpr1
|
||||
@@ -1032,7 +1032,7 @@ body: |
|
||||
undef %3.sub0:areg_96_align2 = COPY %0.sub0
|
||||
%3.sub1:areg_96_align2 = COPY %0.sub1
|
||||
%3.sub2:areg_96_align2 = COPY %0.sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, %3
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, %3
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1051,13 +1051,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128 = COPY [[COPY]].sub0_sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128 = COPY [[COPY]].sub2_sub3
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0_sub1:vreg_128 = COPY $vgpr0_vgpr1
|
||||
%0.sub2_sub3:vreg_128 = COPY $vgpr2_vgpr3
|
||||
undef %2.sub0_sub1:areg_128 = COPY %0.sub0_sub1
|
||||
%2.sub2_sub3:areg_128 = COPY %0.sub2_sub3
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1076,13 +1076,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub2_sub3:vreg_128_align2 = COPY $vgpr2_vgpr3
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[COPY]].sub0_sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2_sub3:areg_128_align2 = COPY [[COPY]].sub2_sub3
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0_sub1:vreg_128_align2 = COPY $vgpr0_vgpr1
|
||||
%0.sub2_sub3:vreg_128_align2 = COPY $vgpr2_vgpr3
|
||||
undef %2.sub0_sub1:areg_128_align2 = COPY %0.sub0_sub1
|
||||
%2.sub2_sub3:areg_128_align2 = COPY %0.sub2_sub3
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1101,13 +1101,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1:sreg_64 = COPY $sgpr9
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_64_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1:areg_64_align2 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:sreg_64 = COPY $sgpr8
|
||||
%0.sub1:sreg_64 = COPY $sgpr9
|
||||
undef %2.sub0:areg_64_align2 = COPY %0.sub0
|
||||
%2.sub1:areg_64_align2 = COPY %0.sub1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1126,13 +1126,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY]].sub1_sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_96 = COPY $vgpr0
|
||||
%0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2
|
||||
undef %2.sub0:areg_96 = COPY %0.sub0
|
||||
%2.sub1_sub2:areg_96 = COPY %0.sub1_sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1151,13 +1151,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub0:areg_96 = COPY [[COPY]]
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub1_sub2:areg_96 = COPY [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY2]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_96 = COPY $vgpr0
|
||||
%0.sub1_sub2:vreg_96 = COPY $vgpr1_vgpr2
|
||||
undef %2.sub0:areg_96 = COPY %0.sub2
|
||||
%2.sub1_sub2:areg_96 = COPY %0.sub0_sub1
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1177,13 +1177,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub1_sub2:vreg_96_align2 = COPY $vgpr1_vgpr2
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0:areg_96_align2 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub1_sub2:areg_96_align2 = COPY [[COPY]].sub1_sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0:vreg_96_align2 = COPY $vgpr0
|
||||
%0.sub1_sub2:vreg_96_align2 = COPY $vgpr1_vgpr2
|
||||
undef %2.sub0:areg_96_align2 = COPY %0.sub0
|
||||
%2.sub1_sub2:areg_96_align2 = COPY %0.sub1_sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1202,13 +1202,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96 = COPY [[COPY]].sub0_sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96 = COPY [[COPY]].sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1
|
||||
%0.sub2:vreg_96 = COPY $vgpr2
|
||||
undef %2.sub0_sub1:areg_96 = COPY %0.sub0_sub1
|
||||
%2.sub2:areg_96 = COPY %0.sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1227,13 +1227,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96_align2 = COPY $vgpr2
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]].sub0_sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0_sub1:vreg_96_align2 = COPY $vgpr0_vgpr1
|
||||
%0.sub2:vreg_96_align2 = COPY $vgpr2
|
||||
undef %2.sub0_sub1:areg_96_align2 = COPY %0.sub0_sub1
|
||||
%2.sub2:areg_96_align2 = COPY %0.sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1252,13 +1252,13 @@ body: |
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub2:vreg_96 = COPY $vgpr2
|
||||
; CHECK-NEXT: undef [[COPY1:%[0-9]+]].sub0_sub1:areg_96_align2 = COPY [[COPY]].sub0_sub1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]].sub2:areg_96_align2 = COPY [[COPY]].sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
undef %0.sub0_sub1:vreg_96 = COPY $vgpr0_vgpr1
|
||||
%0.sub2:vreg_96 = COPY $vgpr2
|
||||
undef %2.sub0_sub1:areg_96_align2 = COPY %0.sub0_sub1
|
||||
%2.sub2:areg_96_align2 = COPY %0.sub2
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1275,11 +1275,11 @@ body: |
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_64 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64 = COPY $vgpr0_vgpr1
|
||||
%2:areg_64 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 2949129 /* reguse:AReg_64 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1296,11 +1296,11 @@ body: |
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_64_align2 = COPY $vgpr0_vgpr1
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_64_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr0_vgpr1
|
||||
%2:areg_64_align2 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1317,11 +1317,11 @@ body: |
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_96 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
|
||||
%3:areg_96 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5046281 /* reguse:AReg_96 */, %3
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96, %3
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1338,11 +1338,11 @@ body: |
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96_align2 = COPY $vgpr0_vgpr1_vgpr2
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_96_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_96_align2 = COPY $vgpr0_vgpr1_vgpr2
|
||||
%3:areg_96_align2 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 5373961 /* reguse:AReg_96_Align2 */, %3
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_96_Align2, %3
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1359,11 +1359,11 @@ body: |
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_128 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_128 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
%2:areg_128 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 7471113 /* reguse:AReg_128 */, killed %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128, killed %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1380,11 +1380,11 @@ body: |
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_128_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_128_align2 = COPY $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
%2:areg_128_align2 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_128_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1401,11 +1401,11 @@ body: |
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr8_sgpr9
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_64_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:sreg_64 = COPY $sgpr8_sgpr9
|
||||
%2:areg_64_align2 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -1422,11 +1422,11 @@ body: |
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:areg_96_align2 = COPY [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, [[COPY1]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_96 = COPY $vgpr0_vgpr1_vgpr2
|
||||
%2:areg_96_align2 = COPY %0
|
||||
INLINEASM &"; use $0", 0 /* attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %2
|
||||
INLINEASM &"; use $0", attdialect, reguse:AReg_64_Align2, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
|
||||
@@ -20,10 +20,10 @@ body: |
|
||||
; CHECK-LABEL: name: foo1
|
||||
; CHECK: liveins: $vgpr0_vgpr1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM &"", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def undef %2.sub0, 1114123 /* regdef-ec:VGPR_32 */, def undef early-clobber %2.sub1
|
||||
; CHECK-NEXT: INLINEASM &"", attdialect, regdef:VGPR_32, def undef %2.sub0, regdef-ec:VGPR_32, def undef early-clobber %2.sub1
|
||||
; CHECK-NEXT: FLAT_STORE_DWORDX2 $vgpr0_vgpr1, %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
INLINEASM &"", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %0:vgpr_32, 1114123 /* regdef-ec:VGPR_32 */, def early-clobber %1:vgpr_32
|
||||
INLINEASM &"", attdialect, regdef:VGPR_32, def %0:vgpr_32, regdef-ec:VGPR_32, def early-clobber %1:vgpr_32
|
||||
undef %2.sub0:vreg_64 = COPY killed %0
|
||||
%2.sub1:vreg_64 = COPY killed %1
|
||||
FLAT_STORE_DWORDX2 killed $vgpr0_vgpr1, killed %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
|
||||
@@ -41,10 +41,10 @@ body: |
|
||||
; CHECK-LABEL: name: foo2
|
||||
; CHECK: liveins: $vgpr0_vgpr1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM &"", 0 /* attdialect */, 1114123 /* regdef-ec:VGPR_32 */, def undef early-clobber %2.sub1, 1114122 /* regdef:VGPR_32 */, def undef %2.sub0
|
||||
; CHECK-NEXT: INLINEASM &"", attdialect, regdef-ec:VGPR_32, def undef early-clobber %2.sub1, regdef:VGPR_32, def undef %2.sub0
|
||||
; CHECK-NEXT: FLAT_STORE_DWORDX2 $vgpr0_vgpr1, %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
INLINEASM &"", 0 /* attdialect */, 1114123 /* regdef-ec:VGPR_32 */, def early-clobber %1:vgpr_32, 1114122 /* regdef:VGPR_32 */, def %0:vgpr_32
|
||||
INLINEASM &"", attdialect, regdef-ec:VGPR_32, def early-clobber %1:vgpr_32, regdef:VGPR_32, def %0:vgpr_32
|
||||
undef %2.sub0:vreg_64 = COPY killed %0
|
||||
%2.sub1:vreg_64 = COPY killed %1
|
||||
FLAT_STORE_DWORDX2 killed $vgpr0_vgpr1, killed %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
|
||||
@@ -62,10 +62,10 @@ body: |
|
||||
; CHECK-LABEL: name: foo3
|
||||
; CHECK: liveins: $vgpr0_vgpr1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM &"", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def undef %2.sub0, 1114123 /* regdef-ec:VGPR_32 */, def undef early-clobber %2.sub1
|
||||
; CHECK-NEXT: INLINEASM &"", attdialect, regdef:VGPR_32, def undef %2.sub0, regdef-ec:VGPR_32, def undef early-clobber %2.sub1
|
||||
; CHECK-NEXT: FLAT_STORE_DWORDX2 $vgpr0_vgpr1, %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
INLINEASM &"", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %1:vgpr_32, 1114123 /* regdef-ec:VGPR_32 */, def early-clobber %0:vgpr_32
|
||||
INLINEASM &"", attdialect, regdef:VGPR_32, def %1:vgpr_32, regdef-ec:VGPR_32, def early-clobber %0:vgpr_32
|
||||
undef %2.sub0:vreg_64 = COPY killed %1
|
||||
%2.sub1:vreg_64 = COPY killed %0
|
||||
FLAT_STORE_DWORDX2 killed $vgpr0_vgpr1, killed %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
|
||||
@@ -83,10 +83,10 @@ body: |
|
||||
; CHECK-LABEL: name: foo4
|
||||
; CHECK: liveins: $vgpr0_vgpr1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM &"", 0 /* attdialect */, 1114123 /* regdef-ec:VGPR_32 */, def undef early-clobber %2.sub1, 1114122 /* regdef:VGPR_32 */, def undef %2.sub0
|
||||
; CHECK-NEXT: INLINEASM &"", attdialect, regdef-ec:VGPR_32, def undef early-clobber %2.sub1, regdef:VGPR_32, def undef %2.sub0
|
||||
; CHECK-NEXT: FLAT_STORE_DWORDX2 $vgpr0_vgpr1, %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
INLINEASM &"", 0 /* attdialect */, 1114123 /* regdef-ec:VGPR_32 */, def early-clobber %0:vgpr_32, 1114122 /* regdef:VGPR_32 */, def %1:vgpr_32
|
||||
INLINEASM &"", attdialect, regdef-ec:VGPR_32, def early-clobber %0:vgpr_32, regdef:VGPR_32, def %1:vgpr_32
|
||||
undef %2.sub0:vreg_64 = COPY killed %1
|
||||
%2.sub1:vreg_64 = COPY killed %0
|
||||
FLAT_STORE_DWORDX2 killed $vgpr0_vgpr1, killed %2, 0, 0, implicit $exec, implicit $flat_scr :: (store (s64))
|
||||
|
||||
@@ -1,9 +1,9 @@
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
|
||||
# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass post-RA-hazard-rec -print-symbolic-inline-asm-ops -o - %s | FileCheck -check-prefix=HAZARD %s
|
||||
# RUN: llc -mtriple=amdgcn -mcpu=gfx9-4-generic -run-pass post-RA-hazard-rec -print-symbolic-inline-asm-ops -o - %s | FileCheck -check-prefix=HAZARD %s
|
||||
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass post-RA-hazard-rec -print-symbolic-inline-asm-ops -o - %s | FileCheck -check-prefix=NOHAZARD %s
|
||||
# RUN: llc -mtriple=amdgcn -mcpu=gfx942 -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefix=HAZARD %s
|
||||
# RUN: llc -mtriple=amdgcn -mcpu=gfx9-4-generic -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefix=HAZARD %s
|
||||
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -run-pass post-RA-hazard-rec -o - %s | FileCheck -check-prefix=NOHAZARD %s
|
||||
|
||||
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -passes post-RA-hazard-rec -print-symbolic-inline-asm-ops -o - %s | FileCheck -check-prefix=NOHAZARD %s
|
||||
# RUN: llc -mtriple=amdgcn -mcpu=gfx90a -passes post-RA-hazard-rec -o - %s | FileCheck -check-prefix=NOHAZARD %s
|
||||
|
||||
---
|
||||
name: sdwa_opsel_hazard
|
||||
|
||||
@@ -353,6 +353,6 @@ body: |
|
||||
%1 = IMPLICIT_DEF
|
||||
$sgpr0_sgpr1 = S_OR_B64 $exec, killed $vcc, implicit-def $scc
|
||||
%2:sreg_64 = IMPLICIT_DEF
|
||||
INLINEASM &"", 1
|
||||
INLINEASM &"", sideeffect attdialect
|
||||
S_ENDPGM 0
|
||||
...
|
||||
|
||||
@@ -1112,11 +1112,11 @@ body: |
|
||||
; GCN-NEXT: S_WAITCNT 0
|
||||
; GCN-NEXT: renamable $vgpr2 = V_CVT_SCALEF32_PK_FP4_F16_e64 8, killed $vgpr0, 0, killed $vgpr1, 4, killed $vgpr2, 0, implicit $mode, implicit $exec
|
||||
; GCN-NEXT: S_NOP 0
|
||||
; GCN-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, killed renamable $vgpr2
|
||||
; GCN-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, killed renamable $vgpr2
|
||||
; GCN-NEXT: S_SETPC_B64_return undef $sgpr30_sgpr31
|
||||
S_WAITCNT 0
|
||||
renamable $vgpr2 = V_CVT_SCALEF32_PK_FP4_F16_e64 8, killed $vgpr0, 0, killed $vgpr1, 4, killed $vgpr2, 0, implicit $mode, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, killed renamable $vgpr2
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, killed renamable $vgpr2
|
||||
S_SETPC_B64_return undef $sgpr30_sgpr31
|
||||
...
|
||||
|
||||
|
||||
@@ -486,7 +486,7 @@ body: |
|
||||
; CHECK-NEXT: S_NOP 0, implicit-def $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55
|
||||
; CHECK-NEXT: S_NOP 0, implicit-def $vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63
|
||||
; CHECK-NEXT: renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY killed renamable $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
|
||||
; CHECK-NEXT: INLINEASM &"; use $0 ", 1 /* sideeffect attdialect */, 38862857 /* reguse:VReg_512_Align2 */, killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
|
||||
; CHECK-NEXT: INLINEASM &"; use $0 ", sideeffect attdialect, reguse:VReg_512_Align2, killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
bb.0:
|
||||
S_NOP 0, implicit-def $agpr0
|
||||
@@ -516,7 +516,7 @@ body: |
|
||||
S_NOP 0, implicit-def $vgpr40_vgpr41_vgpr42_vgpr43_vgpr44_vgpr45_vgpr46_vgpr47
|
||||
S_NOP 0, implicit-def $vgpr48_vgpr49_vgpr50_vgpr51_vgpr52_vgpr53_vgpr54_vgpr55
|
||||
S_NOP 0, implicit-def $vgpr56_vgpr57_vgpr58_vgpr59_vgpr60_vgpr61_vgpr62_vgpr63
|
||||
INLINEASM &"; use $0 ", 1 /* sideeffect attdialect */, 38862857 /* reguse:VReg_512_Align2 */, %0:vreg_512_align2
|
||||
INLINEASM &"; use $0 ", sideeffect attdialect, reguse:VReg_512_Align2, %0:vreg_512_align2
|
||||
S_ENDPGM 0
|
||||
|
||||
...
|
||||
@@ -1368,7 +1368,7 @@ body: |
|
||||
; CHECK-NEXT: renamable $vgpr0_vgpr1 = GLOBAL_LOAD_DWORDX2 undef renamable $vgpr0_vgpr1, 0, 0, implicit $exec :: (load (s64), addrspace 1)
|
||||
; CHECK-NEXT: early-clobber renamable $vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33 = V_MFMA_F32_32X32X8F16_vgprcd_e64 $vgpr16_vgpr17, $vgpr16_vgpr17, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: early-clobber renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = V_MFMA_F32_32X32X8F16_vgprcd_e64 $vgpr16_vgpr17, $vgpr16_vgpr17, $vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 38862857 /* reguse:VReg_512_Align2 */, killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_512_Align2, killed renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
|
||||
; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc
|
||||
; CHECK-NEXT: S_BRANCH %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -1408,7 +1408,7 @@ body: |
|
||||
undef %2.sub0_sub1:vreg_512_align2 = GLOBAL_LOAD_DWORDX2 undef %3:vreg_64_align2, 0, 0, implicit $exec :: (load (s64), addrspace 1)
|
||||
early-clobber %0:vreg_512_align2 = V_MFMA_F32_32X32X8F16_vgprcd_e64 %1, %1, %2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
early-clobber %4:vreg_512_align2 = V_MFMA_F32_32X32X8F16_vgprcd_e64 %1, %1, %0, 0, 0, 0, implicit $mode, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 38862857 /* reguse:VReg_512_Align2 */, %4
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_512_Align2, %4
|
||||
S_CBRANCH_VCCNZ %bb.1, implicit $vcc
|
||||
S_BRANCH %bb.2
|
||||
|
||||
@@ -1726,7 +1726,7 @@ body: |
|
||||
; CHECK-NEXT: renamable $vgpr0_vgpr1 = GLOBAL_LOAD_DWORDX2 undef renamable $vgpr0_vgpr1, 0, 0, implicit $exec :: (load (s64), addrspace 1)
|
||||
; CHECK-NEXT: renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 $vgpr16_vgpr17, $vgpr16_vgpr17, $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: early-clobber renamable $vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33 = V_MFMA_F32_32X32X8F16_vgprcd_e64 $vgpr16_vgpr17, $vgpr16_vgpr17, killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 38862857 /* reguse:VReg_512_Align2 */, renamable $vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_512_Align2, renamable $vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31_vgpr32_vgpr33
|
||||
; CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit $vcc
|
||||
; CHECK-NEXT: S_BRANCH %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
@@ -1763,7 +1763,7 @@ body: |
|
||||
undef %0.sub0_sub1:vreg_512_align2 = GLOBAL_LOAD_DWORDX2 undef %3:vreg_64_align2, 0, 0, implicit $exec :: (load (s64), addrspace 1)
|
||||
%0:vreg_512_align2 = V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %1, %1, %0, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%4:vreg_512_align2 = V_MFMA_F32_32X32X8F16_vgprcd_e64 %1, %1, %0, 0, 0, 0, implicit $mode, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 38862857 /* reguse:VReg_512_Align2 */, %4
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_512_Align2, %4
|
||||
S_CBRANCH_VCCNZ %bb.1, implicit $vcc
|
||||
S_BRANCH %bb.2
|
||||
|
||||
|
||||
@@ -8,16 +8,16 @@
|
||||
define amdgpu_kernel void @s_input_output_i128() {
|
||||
; GFX908-LABEL: name: s_input_output_i128
|
||||
; GFX908: bb.0 (%ir-block.0):
|
||||
; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 9306122 /* regdef:SGPR_128 */, def %13
|
||||
; GFX908-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:SGPR_128, def %13
|
||||
; GFX908-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY %13
|
||||
; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 9306121 /* reguse:SGPR_128 */, [[COPY]]
|
||||
; GFX908-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SGPR_128, [[COPY]]
|
||||
; GFX908-NEXT: S_ENDPGM 0
|
||||
;
|
||||
; GFX90A-LABEL: name: s_input_output_i128
|
||||
; GFX90A: bb.0 (%ir-block.0):
|
||||
; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 9306122 /* regdef:SGPR_128 */, def %11
|
||||
; GFX90A-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:SGPR_128, def %11
|
||||
; GFX90A-NEXT: [[COPY:%[0-9]+]]:sgpr_128 = COPY %11
|
||||
; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 9306121 /* reguse:SGPR_128 */, [[COPY]]
|
||||
; GFX90A-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SGPR_128, [[COPY]]
|
||||
; GFX90A-NEXT: S_ENDPGM 0
|
||||
%val = tail call i128 asm sideeffect "; def $0", "=s"()
|
||||
call void asm sideeffect "; use $0", "s"(i128 %val)
|
||||
@@ -27,16 +27,16 @@ define amdgpu_kernel void @s_input_output_i128() {
|
||||
define amdgpu_kernel void @v_input_output_i128() {
|
||||
; GFX908-LABEL: name: v_input_output_i128
|
||||
; GFX908: bb.0 (%ir-block.0):
|
||||
; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 6553610 /* regdef:VReg_128 */, def %13
|
||||
; GFX908-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_128, def %13
|
||||
; GFX908-NEXT: [[COPY:%[0-9]+]]:vreg_128 = COPY %13
|
||||
; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 6553609 /* reguse:VReg_128 */, [[COPY]]
|
||||
; GFX908-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_128, [[COPY]]
|
||||
; GFX908-NEXT: S_ENDPGM 0
|
||||
;
|
||||
; GFX90A-LABEL: name: v_input_output_i128
|
||||
; GFX90A: bb.0 (%ir-block.0):
|
||||
; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 6881290 /* regdef:VReg_128_Align2 */, def %11
|
||||
; GFX90A-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_128_Align2, def %11
|
||||
; GFX90A-NEXT: [[COPY:%[0-9]+]]:vreg_128_align2 = COPY %11
|
||||
; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 6881289 /* reguse:VReg_128_Align2 */, [[COPY]]
|
||||
; GFX90A-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_128_Align2, [[COPY]]
|
||||
; GFX90A-NEXT: S_ENDPGM 0
|
||||
%val = tail call i128 asm sideeffect "; def $0", "=v"()
|
||||
call void asm sideeffect "; use $0", "v"(i128 %val)
|
||||
@@ -47,16 +47,16 @@ define amdgpu_kernel void @a_input_output_i128() {
|
||||
|
||||
; GFX908-LABEL: name: a_input_output_i128
|
||||
; GFX908: bb.0 (%ir-block.0):
|
||||
; GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 7471114 /* regdef:AReg_128 */, def %13
|
||||
; GFX908-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:AReg_128, def %13
|
||||
; GFX908-NEXT: [[COPY:%[0-9]+]]:areg_128 = COPY %13
|
||||
; GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 7471113 /* reguse:AReg_128 */, [[COPY]]
|
||||
; GFX908-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128, [[COPY]]
|
||||
; GFX908-NEXT: S_ENDPGM 0
|
||||
;
|
||||
; GFX90A-LABEL: name: a_input_output_i128
|
||||
; GFX90A: bb.0 (%ir-block.0):
|
||||
; GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 8192010 /* regdef:AReg_128_Align2 */, def %11
|
||||
; GFX90A-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:AReg_128_Align2, def %11
|
||||
; GFX90A-NEXT: [[COPY:%[0-9]+]]:areg_128_align2 = COPY %11
|
||||
; GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY]]
|
||||
; GFX90A-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, [[COPY]]
|
||||
; GFX90A-NEXT: S_ENDPGM 0
|
||||
%val = call i128 asm sideeffect "; def $0", "=a"()
|
||||
call void asm sideeffect "; use $0", "a"(i128 %val)
|
||||
|
||||
@@ -1243,7 +1243,7 @@ body: |
|
||||
%608:vreg_128_align2 = BUFFER_LOAD_DWORDX4_OFFEN %599:vgpr_32, %443:sgpr_128, 0, 64, 0, 0, implicit $exec
|
||||
%610:vgpr_32 = V_ADD_U32_e32 64, %602:vgpr_32, implicit $exec
|
||||
%611:vreg_128_align2 = BUFFER_LOAD_DWORDX4_OFFEN %610:vgpr_32, %443:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%612:vreg_128_align2 = DS_READ_B128_gfx9 %23:vgpr_32, 0, 0, implicit $exec
|
||||
early-clobber %668:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_vgprcd_e64 %612.sub0_sub1:vreg_128_align2, %391.sub0_sub1:vreg_128_align2, 0, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%668:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %612.sub2_sub3:vreg_128_align2, %391.sub2_sub3:vreg_128_align2, %668:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
@@ -1268,13 +1268,13 @@ body: |
|
||||
%695:vreg_128_align2 = DS_READ_B128_gfx9 %24:vgpr_32, 1536, 0, implicit $exec
|
||||
%701:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %695.sub0_sub1:vreg_128_align2, %392.sub0_sub1:vreg_128_align2, %701:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%701:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %695.sub2_sub3:vreg_128_align2, %392.sub2_sub3:vreg_128_align2, %701:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
DS_WRITE_B128_gfx9 %606:vgpr_32, %608:vreg_128_align2, 0, 0, implicit $exec
|
||||
DS_WRITE_B128_gfx9 %606:vgpr_32, %611:vreg_128_align2, 1024, 0, implicit $exec
|
||||
%706:vreg_128_align2 = BUFFER_LOAD_DWORDX4_OFFEN %599:vgpr_32, %443:sgpr_128, 0, 128, 0, 0, implicit $exec
|
||||
%708:vgpr_32 = V_ADD_U32_e32 128, %602:vgpr_32, implicit $exec
|
||||
%709:vreg_128_align2 = BUFFER_LOAD_DWORDX4_OFFEN %708:vgpr_32, %443:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%710:vreg_128_align2 = DS_READ_B128_gfx9 %23:vgpr_32, 0, 0, implicit $exec
|
||||
%668:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %710.sub0_sub1:vreg_128_align2, %401.sub0_sub1:vreg_128_align2, %668:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%668:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %710.sub2_sub3:vreg_128_align2, %401.sub2_sub3:vreg_128_align2, %668:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
@@ -1299,7 +1299,7 @@ body: |
|
||||
%787:vreg_128_align2 = DS_READ_B128_gfx9 %24:vgpr_32, 1536, 0, implicit $exec
|
||||
%701:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %787.sub0_sub1:vreg_128_align2, %406.sub0_sub1:vreg_128_align2, %701:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%701:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %787.sub2_sub3:vreg_128_align2, %406.sub2_sub3:vreg_128_align2, %701:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
DS_WRITE_B128_gfx9 %606:vgpr_32, %706:vreg_128_align2, 0, 0, implicit $exec
|
||||
DS_WRITE_B128_gfx9 %606:vgpr_32, %709:vreg_128_align2, 1024, 0, implicit $exec
|
||||
%798:vreg_128_align2 = BUFFER_LOAD_DWORDX4_OFFEN %599:vgpr_32, %443:sgpr_128, 0, 192, 0, 0, implicit $exec
|
||||
@@ -1313,7 +1313,7 @@ body: |
|
||||
%807:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %806:vgpr_32, %473:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
%808:vgpr_32 = V_ADD_U32_e32 %48:vgpr_32, %3333:vgpr_32, implicit $exec
|
||||
%809:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %808:vgpr_32, %473:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%810:vreg_128_align2 = DS_READ_B128_gfx9 %23:vgpr_32, 0, 0, implicit $exec
|
||||
%668:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %810.sub0_sub1:vreg_128_align2, %411.sub0_sub1:vreg_128_align2, %668:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%668:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %810.sub2_sub3:vreg_128_align2, %411.sub2_sub3:vreg_128_align2, %668:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
@@ -1338,10 +1338,10 @@ body: |
|
||||
%887:vreg_128_align2 = DS_READ_B128_gfx9 %24:vgpr_32, 1536, 0, implicit $exec
|
||||
%701:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %887.sub0_sub1:vreg_128_align2, %416.sub0_sub1:vreg_128_align2, %701:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%701:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %887.sub2_sub3:vreg_128_align2, %416.sub2_sub3:vreg_128_align2, %701:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
DS_WRITE_B128_gfx9 %606:vgpr_32, %798:vreg_128_align2, 0, 0, implicit $exec
|
||||
DS_WRITE_B128_gfx9 %606:vgpr_32, %801:vreg_128_align2, 1024, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%898:vreg_128_align2 = DS_READ_B128_gfx9 %23:vgpr_32, 0, 0, implicit $exec
|
||||
%668:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %898.sub0_sub1:vreg_128_align2, %421.sub0_sub1:vreg_128_align2, %668:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%668:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %898.sub2_sub3:vreg_128_align2, %421.sub2_sub3:vreg_128_align2, %668:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
@@ -1733,7 +1733,7 @@ body: |
|
||||
%1417:vgpr_32 = contract nofpexcept V_SUB_F32_e32 %3346:vgpr_32, %151:vgpr_32, implicit $mode, implicit $exec
|
||||
%1418:vgpr_32 = afn nofpexcept V_MUL_F32_e32 1069066811, %1417:vgpr_32, implicit $mode, implicit $exec
|
||||
undef %1455.sub0:vreg_64_align2 = afn nofpexcept V_EXP_F32_e32 %1418:vgpr_32, implicit $mode, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
undef %3037.sub0:vreg_64_align2 = V_PERM_B32_e64 %805.sub0:vreg_64_align2, %803.sub0:vreg_64_align2, %1422:sreg_32, implicit $exec
|
||||
undef %3021.sub0:vreg_64_align2 = V_PERM_B32_e64 %805.sub0:vreg_64_align2, %803.sub0:vreg_64_align2, %1424:sreg_32, implicit $exec
|
||||
%3037.sub1:vreg_64_align2 = V_PERM_B32_e64 %809.sub0:vreg_64_align2, %807.sub0:vreg_64_align2, %1422:sreg_32, implicit $exec
|
||||
@@ -1830,7 +1830,7 @@ body: |
|
||||
%1595:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %1594:vgpr_32, %473:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
%1596:vgpr_32 = V_ADD_U32_e32 %48:vgpr_32, %3336:vgpr_32, implicit $exec
|
||||
%1597:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %1596:vgpr_32, %473:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%1598:vreg_128_align2 = DS_READ_B128_gfx9 %44:vgpr_32, 0, 0, implicit $exec
|
||||
%1605:vreg_128_align2 = DS_READ_B128_gfx9 %44:vgpr_32, 576, 0, implicit $exec
|
||||
%1612:vreg_128_align2 = DS_READ_B128_gfx9 %44:vgpr_32, 1152, 0, implicit $exec
|
||||
@@ -1839,7 +1839,7 @@ body: |
|
||||
%1633:vreg_128_align2 = DS_READ_B128_gfx9 %45:vgpr_32, 576, 0, implicit $exec
|
||||
%1640:vreg_128_align2 = DS_READ_B128_gfx9 %45:vgpr_32, 1152, 0, implicit $exec
|
||||
%1647:vreg_128_align2 = DS_READ_B128_gfx9 %45:vgpr_32, 1728, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
undef %3161.sub0:vreg_64_align2 = V_PERM_B32_e64 %1593.sub0:vreg_64_align2, %1591.sub0:vreg_64_align2, %1422:sreg_32, implicit $exec
|
||||
undef %3145.sub0:vreg_64_align2 = V_PERM_B32_e64 %1593.sub0:vreg_64_align2, %1591.sub0:vreg_64_align2, %1424:sreg_32, implicit $exec
|
||||
%3161.sub1:vreg_64_align2 = V_PERM_B32_e64 %1597.sub0:vreg_64_align2, %1595.sub0:vreg_64_align2, %1422:sreg_32, implicit $exec
|
||||
@@ -1860,7 +1860,7 @@ body: |
|
||||
%1683:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %1682:vgpr_32, %473:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
%1684:vgpr_32 = V_ADD_U32_e32 %48:vgpr_32, %3339:vgpr_32, implicit $exec
|
||||
%1685:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %1684:vgpr_32, %473:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%1686:vreg_128_align2 = DS_READ_B128_gfx9 %44:vgpr_32, 0, 0, implicit $exec
|
||||
%1693:vreg_128_align2 = DS_READ_B128_gfx9 %44:vgpr_32, 576, 0, implicit $exec
|
||||
%1700:vreg_128_align2 = DS_READ_B128_gfx9 %44:vgpr_32, 1152, 0, implicit $exec
|
||||
@@ -1869,7 +1869,7 @@ body: |
|
||||
%1721:vreg_128_align2 = DS_READ_B128_gfx9 %45:vgpr_32, 576, 0, implicit $exec
|
||||
%1728:vreg_128_align2 = DS_READ_B128_gfx9 %45:vgpr_32, 1152, 0, implicit $exec
|
||||
%1735:vreg_128_align2 = DS_READ_B128_gfx9 %45:vgpr_32, 1728, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
undef %3062.sub0:vreg_64_align2 = V_PERM_B32_e64 %1681.sub0:vreg_64_align2, %1679.sub0:vreg_64_align2, %1422:sreg_32, implicit $exec
|
||||
undef %3046.sub0:vreg_64_align2 = V_PERM_B32_e64 %1681.sub0:vreg_64_align2, %1679.sub0:vreg_64_align2, %1424:sreg_32, implicit $exec
|
||||
%3062.sub1:vreg_64_align2 = V_PERM_B32_e64 %1685.sub0:vreg_64_align2, %1683.sub0:vreg_64_align2, %1422:sreg_32, implicit $exec
|
||||
@@ -1890,7 +1890,7 @@ body: |
|
||||
%1771:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %1770:vgpr_32, %473:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
%1772:vgpr_32 = V_ADD_U32_e32 %48:vgpr_32, %3342:vgpr_32, implicit $exec
|
||||
%1773:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %1772:vgpr_32, %473:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%1774:vreg_128_align2 = DS_READ_B128_gfx9 %44:vgpr_32, 0, 0, implicit $exec
|
||||
%1781:vreg_128_align2 = DS_READ_B128_gfx9 %44:vgpr_32, 576, 0, implicit $exec
|
||||
%1788:vreg_128_align2 = DS_READ_B128_gfx9 %44:vgpr_32, 1152, 0, implicit $exec
|
||||
@@ -1899,7 +1899,7 @@ body: |
|
||||
%1809:vreg_128_align2 = DS_READ_B128_gfx9 %45:vgpr_32, 576, 0, implicit $exec
|
||||
%1816:vreg_128_align2 = DS_READ_B128_gfx9 %45:vgpr_32, 1152, 0, implicit $exec
|
||||
%1823:vreg_128_align2 = DS_READ_B128_gfx9 %45:vgpr_32, 1728, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
undef %3185.sub0:vreg_64_align2 = V_PERM_B32_e64 %1769.sub0:vreg_64_align2, %1767.sub0:vreg_64_align2, %1422:sreg_32, implicit $exec
|
||||
undef %3169.sub0:vreg_64_align2 = V_PERM_B32_e64 %1769.sub0:vreg_64_align2, %1767.sub0:vreg_64_align2, %1424:sreg_32, implicit $exec
|
||||
%3185.sub1:vreg_64_align2 = V_PERM_B32_e64 %1773.sub0:vreg_64_align2, %1771.sub0:vreg_64_align2, %1422:sreg_32, implicit $exec
|
||||
@@ -2012,7 +2012,7 @@ body: |
|
||||
%2067:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1314:vgpr_32, implicit $mode, implicit $exec
|
||||
%2068:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1308:vgpr_32, implicit $mode, implicit $exec
|
||||
%2069:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %1302:vgpr_32, implicit $mode, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
undef %3082.sub1:vreg_64_align2 = nofpexcept V_PACK_B32_F16_e64 0, %2068:vgpr_32, 0, %2060:vgpr_32, 0, 0, implicit $mode, implicit $exec
|
||||
%3082.sub0:vreg_64_align2 = nofpexcept V_PACK_B32_F16_e64 0, %2069:vgpr_32, 0, %2061:vgpr_32, 0, 0, implicit $mode, implicit $exec
|
||||
undef %3066.sub1:vreg_64_align2 = nofpexcept V_PACK_B32_F16_e64 0, %2066:vgpr_32, 0, %2058:vgpr_32, 0, 0, implicit $mode, implicit $exec
|
||||
@@ -2045,7 +2045,7 @@ body: |
|
||||
%2170:vreg_128_align2 = DS_READ_B128_gfx9 %45:vgpr_32, 1728, 0, implicit $exec
|
||||
%3003:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %2170.sub0_sub1:vreg_128_align2, %3050:vreg_64_align2, %3003:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%3003:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %2170.sub2_sub3:vreg_128_align2, %3033:vreg_64_align2, %3003:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%3345:vgpr_32 = V_ADD_U32_e32 %50:sreg_32, %3345:vgpr_32, implicit $exec
|
||||
%3344:vgpr_32 = V_ADD_U32_e32 %50:sreg_32, %3344:vgpr_32, implicit $exec
|
||||
%3343:vgpr_32 = V_ADD_U32_e32 %50:sreg_32, %3343:vgpr_32, implicit $exec
|
||||
|
||||
@@ -557,7 +557,7 @@ body: |
|
||||
%38:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %36:vgpr_32, %8:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
%39:vgpr_32 = V_ADD_U32_e32 %9:vgpr_32, %37:vgpr_32, implicit $exec
|
||||
%40:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %39:vgpr_32, %8:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%41:vreg_128_align2 = DS_READ_B128_gfx9 %42:vgpr_32, 0, 0, implicit $exec
|
||||
early-clobber %43:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_vgprcd_e64 %41.sub0_sub1:vreg_128_align2, %44.sub0_sub1:vreg_128_align2, 0, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%43:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %41.sub2_sub3:vreg_128_align2, %44.sub2_sub3:vreg_128_align2, %43:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
@@ -570,9 +570,9 @@ body: |
|
||||
%50:vreg_128_align2 = DS_READ_B128_gfx9 %48:vgpr_32, 512, 0, implicit $exec
|
||||
%46:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %50.sub0_sub1:vreg_128_align2, %49.sub0_sub1:vreg_128_align2, %46:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%46:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %50.sub2_sub3:vreg_128_align2, %49.sub2_sub3:vreg_128_align2, %46:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
DS_WRITE_B128_gfx9 %34:vgpr_32, %35:vreg_128_align2, 0, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%51:vreg_128_align2 = DS_READ_B128_gfx9 %42:vgpr_32, 0, 0, implicit $exec
|
||||
%43:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %51.sub0_sub1:vreg_128_align2, %52.sub0_sub1:vreg_128_align2, %43:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%43:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %51.sub2_sub3:vreg_128_align2, %52.sub2_sub3:vreg_128_align2, %43:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
@@ -776,7 +776,7 @@ body: |
|
||||
%245:vgpr_32 = contract nofpexcept V_SUB_F32_e32 %13:vgpr_32, %113:vgpr_32, implicit $mode, implicit $exec
|
||||
%246:vgpr_32 = afn nofpexcept V_MUL_F32_e32 1069066811, %245:vgpr_32, implicit $mode, implicit $exec
|
||||
undef %247.sub0:vreg_64_align2 = afn nofpexcept V_EXP_F32_e32 %246:vgpr_32, implicit $mode, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%248:vgpr_32 = V_PERM_B32_e64 %40.sub0:vreg_64_align2, %38.sub0:vreg_64_align2, %14:sreg_32, implicit $exec
|
||||
%249:vgpr_32 = V_PERM_B32_e64 %40.sub0:vreg_64_align2, %38.sub0:vreg_64_align2, %15:sreg_32, implicit $exec
|
||||
%250:vgpr_32 = V_PERM_B32_e64 %40.sub1:vreg_64_align2, %38.sub1:vreg_64_align2, %14:sreg_32, implicit $exec
|
||||
@@ -825,12 +825,12 @@ body: |
|
||||
%274:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %273:vgpr_32, %8:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
%275:vgpr_32 = V_ADD_U32_e32 %23:vgpr_32, %37:vgpr_32, implicit $exec
|
||||
%276:vreg_64_align2 = BUFFER_LOAD_DWORDX2_OFFEN %275:vgpr_32, %8:sgpr_128, 0, 0, 0, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%277:vreg_128_align2 = DS_READ_B128_gfx9 %24:vgpr_32, 0, 0, implicit $exec
|
||||
%278:vreg_128_align2 = DS_READ_B128_gfx9 %24:vgpr_32, 576, 0, implicit $exec
|
||||
%279:vreg_128_align2 = DS_READ_B128_gfx9 %25:vgpr_32, 0, 0, implicit $exec
|
||||
%280:vreg_128_align2 = DS_READ_B128_gfx9 %25:vgpr_32, 576, 0, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%281:vgpr_32 = V_PERM_B32_e64 %276.sub0:vreg_64_align2, %274.sub0:vreg_64_align2, %14:sreg_32, implicit $exec
|
||||
%282:vgpr_32 = V_PERM_B32_e64 %276.sub0:vreg_64_align2, %274.sub0:vreg_64_align2, %15:sreg_32, implicit $exec
|
||||
%283:vgpr_32 = V_PERM_B32_e64 %276.sub1:vreg_64_align2, %274.sub1:vreg_64_align2, %14:sreg_32, implicit $exec
|
||||
@@ -875,7 +875,7 @@ body: |
|
||||
%306:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %176:vgpr_32, implicit $mode, implicit $exec
|
||||
%307:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %170:vgpr_32, implicit $mode, implicit $exec
|
||||
%308:vgpr_32 = nofpexcept V_CVT_F16_F32_e32 %164:vgpr_32, implicit $mode, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
undef %309.sub1:vreg_64_align2 = nofpexcept V_PACK_B32_F16_e64 0, %307:vgpr_32, 0, %299:vgpr_32, 0, 0, implicit $mode, implicit $exec
|
||||
%309.sub0:vreg_64_align2 = nofpexcept V_PACK_B32_F16_e64 0, %308:vgpr_32, 0, %300:vgpr_32, 0, 0, implicit $mode, implicit $exec
|
||||
undef %310.sub1:vreg_64_align2 = nofpexcept V_PACK_B32_F16_e64 0, %305:vgpr_32, 0, %297:vgpr_32, 0, 0, implicit $mode, implicit $exec
|
||||
@@ -896,7 +896,7 @@ body: |
|
||||
%316:vreg_128_align2 = DS_READ_B128_gfx9 %25:vgpr_32, 576, 0, implicit $exec
|
||||
%260:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %316.sub0_sub1:vreg_128_align2, %311:vreg_64_align2, %260:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%260:vreg_512_align2 = contract V_MFMA_F32_32X32X8F16_mac_vgprcd_e64 %316.sub2_sub3:vreg_128_align2, %312:vreg_64_align2, %260:vreg_512_align2, 0, 0, 0, implicit $mode, implicit $exec
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 57 /* sideeffect mayload maystore isconvergent attdialect */, 13 /* imm */, 8, !0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload maystore isconvergent attdialect, imm, 8, !0
|
||||
%37:vgpr_32 = V_ADD_U32_e32 %26:sreg_32, %37:vgpr_32, implicit $exec
|
||||
%29:vgpr_32 = nuw V_ADD_U32_e32 64, %29:vgpr_32, implicit $exec
|
||||
S_ENDPGM 0
|
||||
|
||||
@@ -18,21 +18,21 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_ADD_U32_e64_]], 256, 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e64__literal_offsets
|
||||
; GFX12: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 256, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 512, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = V_ADD_U32_e64 %stack.0, 256, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e64 %stack.0, 512, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -53,27 +53,27 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 156, [[V_ADD_U32_e64_]], 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 412, [[V_ADD_U32_e64_]], 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_2]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_2]]
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e64__literal_offsets_commute
|
||||
; GFX12: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 256, %stack.0, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 512, %stack.0, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e64_2:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 100, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_2]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_2]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = V_ADD_U32_e64 256, %stack.0, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e64 512, %stack.0, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
%2:vgpr_32 = V_ADD_U32_e64 %stack.0, 100, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %2
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %2
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
|
||||
@@ -21,9 +21,9 @@ body: |
|
||||
; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX803-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_CO_U32_e64_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, [[V_ADD_CO_U32_e64_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets
|
||||
@@ -31,9 +31,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, [[V_ADD_U32_e64_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets
|
||||
@@ -41,10 +41,10 @@ body: |
|
||||
; GFX942-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
|
||||
; GFX942-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
|
||||
; GFX942-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX942-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, [[COPY1]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets
|
||||
@@ -52,9 +52,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, [[V_ADD_U32_e64_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets
|
||||
@@ -62,15 +62,15 @@ body: |
|
||||
; GFX12-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
|
||||
; GFX12-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
|
||||
; GFX12-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX12-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, [[COPY1]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -88,42 +88,42 @@ body: |
|
||||
bb.0:
|
||||
; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
|
||||
; GFX803: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]], implicit $vcc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]], implicit $vcc
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
|
||||
; GFX900: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]], implicit $vcc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]], implicit $vcc
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
|
||||
; GFX942: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]], implicit $vcc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]], implicit $vcc
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
|
||||
; GFX10: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]], implicit $vcc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]], implicit $vcc
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__literal_offsets_live_vcc
|
||||
; GFX12: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]], implicit $vcc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]], implicit $vcc
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = V_ADD_CO_U32_e32 256, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_CO_U32_e32 512, %stack.0, implicit-def $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1, implicit $vcc
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1, implicit $vcc
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -144,9 +144,9 @@ body: |
|
||||
; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX803-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_CO_U32_e64_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 8, [[V_ADD_CO_U32_e64_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__inline_imm_offsets
|
||||
@@ -154,9 +154,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 8, [[V_ADD_U32_e64_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_co_u32_e32__inline_imm_offsets
|
||||
@@ -164,10 +164,10 @@ body: |
|
||||
; GFX942-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
|
||||
; GFX942-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
|
||||
; GFX942-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX942-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 8, [[COPY1]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__inline_imm_offsets
|
||||
@@ -175,9 +175,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 8, [[V_ADD_U32_e64_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__inline_imm_offsets
|
||||
@@ -185,15 +185,15 @@ body: |
|
||||
; GFX12-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
|
||||
; GFX12-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
|
||||
; GFX12-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX12-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 8, [[COPY1]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = V_ADD_CO_U32_e32 8, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_CO_U32_e32 16, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -214,9 +214,9 @@ body: |
|
||||
; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64 = V_ADD_CO_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX803-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_CO_U32_e64_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 8, [[V_ADD_CO_U32_e64_]], 0, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets
|
||||
@@ -224,9 +224,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 8, [[V_ADD_U32_e64_]], 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets
|
||||
@@ -234,9 +234,9 @@ body: |
|
||||
; GFX942-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
|
||||
; GFX942-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
|
||||
; GFX942-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 8, [[S_ADD_I32_]], 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets
|
||||
@@ -244,9 +244,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 8, [[V_ADD_U32_e64_]], 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets
|
||||
@@ -254,14 +254,14 @@ body: |
|
||||
; GFX12-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32_xm0 = S_MOV_B32 %stack.0
|
||||
; GFX12-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32_xexec_hi = S_ADD_I32 killed [[S_MOV_B32_]], [[S_MOV_B32_1]], implicit-def dead $scc
|
||||
; GFX12-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 8, [[S_ADD_I32_]], 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:vgpr_32, dead %2:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32, dead %3:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -279,42 +279,42 @@ body: |
|
||||
bb.0:
|
||||
; GFX803-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
|
||||
; GFX803: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX803-NEXT: SI_RETURN implicit [[V_ADD_CO_U32_e64_1]]
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
|
||||
; GFX900: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX900-NEXT: SI_RETURN implicit [[V_ADD_CO_U32_e64_1]]
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
|
||||
; GFX942: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX942-NEXT: SI_RETURN implicit [[V_ADD_CO_U32_e64_1]]
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
|
||||
; GFX10: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX10-NEXT: SI_RETURN implicit [[V_ADD_CO_U32_e64_1]]
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e64__inline_imm_offsets_live_vcc
|
||||
; GFX12: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX12-NEXT: SI_RETURN implicit [[V_ADD_CO_U32_e64_1]]
|
||||
%0:vgpr_32, %2:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, 8, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32, %3:sreg_64_xexec = V_ADD_CO_U32_e64 16, %stack.0, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN implicit %2
|
||||
|
||||
...
|
||||
@@ -332,42 +332,42 @@ body: |
|
||||
bb.0:
|
||||
; GFX803-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets
|
||||
; GFX803: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX803-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets
|
||||
; GFX900: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX900-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets
|
||||
; GFX942: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets
|
||||
; GFX10: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX10-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets
|
||||
; GFX12: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def dead $scc
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, %0
|
||||
%1:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def dead $scc
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -385,42 +385,42 @@ body: |
|
||||
bb.0:
|
||||
; GFX803-LABEL: name: local_stack_alloc__s_add_i32__inline_imm_offsets
|
||||
; GFX803: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX803-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__s_add_i32__inline_imm_offsets
|
||||
; GFX900: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX900-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__s_add_i32__inline_imm_offsets
|
||||
; GFX942: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__s_add_i32__inline_imm_offsets
|
||||
; GFX10: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX10-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__s_add_i32__inline_imm_offsets
|
||||
; GFX12: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:sreg_32 = S_ADD_I32 8, %stack.0, implicit-def dead $scc
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, %0
|
||||
%1:sreg_32 = S_ADD_I32 16, %stack.0, implicit-def dead $scc
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -443,9 +443,9 @@ body: |
|
||||
; GFX803-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
|
||||
; GFX803-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
|
||||
; GFX803-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], %stack.0, implicit-def dead $scc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX803-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], %stack.0, implicit-def dead $scc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets
|
||||
@@ -454,9 +454,9 @@ body: |
|
||||
; GFX900-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
|
||||
; GFX900-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
|
||||
; GFX900-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], %stack.0, implicit-def dead $scc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX900-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], %stack.0, implicit-def dead $scc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets
|
||||
@@ -465,9 +465,9 @@ body: |
|
||||
; GFX942-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
|
||||
; GFX942-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
|
||||
; GFX942-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], %stack.0, implicit-def dead $scc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], %stack.0, implicit-def dead $scc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets
|
||||
@@ -476,9 +476,9 @@ body: |
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
|
||||
; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
|
||||
; GFX10-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], %stack.0, implicit-def dead $scc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX10-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], %stack.0, implicit-def dead $scc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets
|
||||
@@ -487,17 +487,17 @@ body: |
|
||||
; GFX12-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
|
||||
; GFX12-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
|
||||
; GFX12-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], %stack.0, implicit-def dead $scc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY1]], %stack.0, implicit-def dead $scc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:sreg_32 = COPY $sgpr4
|
||||
%1:sreg_32 = COPY $sgpr5
|
||||
|
||||
%2:sreg_32 = S_ADD_I32 %0, %stack.0, implicit-def dead $scc
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, %2
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, %2
|
||||
%3:sreg_32 = S_ADD_I32 %1, %stack.0, implicit-def dead $scc
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, %3
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, %3
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -520,9 +520,9 @@ body: |
|
||||
; GFX803-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
|
||||
; GFX803-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
|
||||
; GFX803-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY]], implicit-def dead $scc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX803-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY1]], implicit-def dead $scc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets_commute
|
||||
@@ -531,9 +531,9 @@ body: |
|
||||
; GFX900-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
|
||||
; GFX900-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
|
||||
; GFX900-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY]], implicit-def dead $scc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX900-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY1]], implicit-def dead $scc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets_commute
|
||||
@@ -542,9 +542,9 @@ body: |
|
||||
; GFX942-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
|
||||
; GFX942-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
|
||||
; GFX942-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY]], implicit-def dead $scc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY1]], implicit-def dead $scc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets_commute
|
||||
@@ -553,9 +553,9 @@ body: |
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
|
||||
; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
|
||||
; GFX10-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY]], implicit-def dead $scc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX10-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY1]], implicit-def dead $scc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__s_add_i32__reg_offsets_commute
|
||||
@@ -564,17 +564,17 @@ body: |
|
||||
; GFX12-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr4
|
||||
; GFX12-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr5
|
||||
; GFX12-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY]], implicit-def dead $scc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 %stack.0, [[COPY1]], implicit-def dead $scc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:sreg_32 = COPY $sgpr4
|
||||
%1:sreg_32 = COPY $sgpr5
|
||||
|
||||
%2:sreg_32 = S_ADD_I32 %stack.0, %0, implicit-def dead $scc
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, %2
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, %2
|
||||
%3:sreg_32 = S_ADD_I32 %stack.0, %1, implicit-def dead $scc
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, %3
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, %3
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -592,48 +592,48 @@ body: |
|
||||
bb.0:
|
||||
; GFX803-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets_live_scc
|
||||
; GFX803: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX803-NEXT: S_NOP 0, implicit $scc
|
||||
; GFX803-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX803-NEXT: SI_RETURN implicit $scc
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets_live_scc
|
||||
; GFX900: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX900-NEXT: S_NOP 0, implicit $scc
|
||||
; GFX900-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX900-NEXT: SI_RETURN implicit $scc
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets_live_scc
|
||||
; GFX942: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX942-NEXT: S_NOP 0, implicit $scc
|
||||
; GFX942-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX942-NEXT: SI_RETURN implicit $scc
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets_live_scc
|
||||
; GFX10: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX10-NEXT: S_NOP 0, implicit $scc
|
||||
; GFX10-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX10-NEXT: SI_RETURN implicit $scc
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__s_add_i32__literal_offsets_live_scc
|
||||
; GFX12: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_]]
|
||||
; GFX12-NEXT: S_NOP 0, implicit $scc
|
||||
; GFX12-NEXT: [[S_ADD_I32_1:%[0-9]+]]:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, [[S_ADD_I32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, [[S_ADD_I32_1]]
|
||||
; GFX12-NEXT: SI_RETURN implicit $scc
|
||||
%0:sreg_32 = S_ADD_I32 256, %stack.0, implicit-def $scc
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, %0
|
||||
S_NOP 0, implicit $scc
|
||||
%1:sreg_32 = S_ADD_I32 512, %stack.0, implicit-def $scc
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1507337 /* reguse:SReg_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:SReg_32, %1
|
||||
SI_RETURN implicit $scc
|
||||
|
||||
...
|
||||
@@ -656,9 +656,9 @@ body: |
|
||||
; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX803-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets
|
||||
@@ -667,9 +667,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets
|
||||
@@ -678,9 +678,9 @@ body: |
|
||||
; GFX942-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
|
||||
; GFX942-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets
|
||||
@@ -689,9 +689,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets
|
||||
@@ -700,15 +700,15 @@ body: |
|
||||
; GFX12-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
|
||||
; GFX12-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
%0:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_CO_U32_e32 %vgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -731,9 +731,9 @@ body: |
|
||||
; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX803-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets_commute
|
||||
@@ -742,9 +742,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets_commute
|
||||
@@ -753,9 +753,9 @@ body: |
|
||||
; GFX942-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
|
||||
; GFX942-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets_commute
|
||||
@@ -764,9 +764,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__vgpr_offsets_commute
|
||||
@@ -775,15 +775,15 @@ body: |
|
||||
; GFX12-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
|
||||
; GFX12-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 [[S_MOV_B32_]], %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
%0:vgpr_32 = V_ADD_CO_U32_e32 %stack.0, %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_CO_U32_e32 %stack.0, %vgpr_offset, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -805,9 +805,9 @@ body: |
|
||||
; GFX803-NEXT: {{ $}}
|
||||
; GFX803-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e32__sgpr_offsets
|
||||
@@ -815,9 +815,9 @@ body: |
|
||||
; GFX900-NEXT: {{ $}}
|
||||
; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_co_u32_e32__sgpr_offsets
|
||||
@@ -825,9 +825,9 @@ body: |
|
||||
; GFX942-NEXT: {{ $}}
|
||||
; GFX942-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e32__sgpr_offsets
|
||||
@@ -836,9 +836,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, [[V_MOV_B32_e32_]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e32__sgpr_offsets
|
||||
@@ -848,16 +848,16 @@ body: |
|
||||
; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX12-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, [[COPY]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_]]
|
||||
; GFX12-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, [[COPY1]], implicit-def dead $vcc, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
%0:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_CO_U32_e32 %sgpr_offset, %stack.0, implicit-def dead $vcc, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -880,9 +880,9 @@ body: |
|
||||
; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX803-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets
|
||||
@@ -891,9 +891,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets
|
||||
@@ -903,10 +903,10 @@ body: |
|
||||
; GFX942-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX942-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[COPY]], 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX942-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[COPY1]], 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets
|
||||
@@ -915,9 +915,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets
|
||||
@@ -926,15 +926,15 @@ body: |
|
||||
; GFX12-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
|
||||
; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[S_MOV_B32_]], 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, [[S_MOV_B32_]], 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
%0:vgpr_32, dead %2:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32, dead %3:sreg_64_xexec = V_ADD_CO_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -957,9 +957,9 @@ body: |
|
||||
; GFX803-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX803-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX803-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX803-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX803-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX900-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets_commute
|
||||
@@ -968,9 +968,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX900-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets_commute
|
||||
@@ -980,10 +980,10 @@ body: |
|
||||
; GFX942-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX942-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY %sgpr_offset
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[S_MOV_B32_]], [[COPY]], 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX942-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY %sgpr_offset
|
||||
; GFX942-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[S_MOV_B32_]], [[COPY1]], 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets_commute
|
||||
@@ -992,9 +992,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX10-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_co_u32_e64__sgpr_offsets_commute
|
||||
@@ -1003,15 +1003,15 @@ body: |
|
||||
; GFX12-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.0
|
||||
; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e64_:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[S_MOV_B32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_]]
|
||||
; GFX12-NEXT: [[V_ADD_CO_U32_e64_2:%[0-9]+]]:vgpr_32, dead [[V_ADD_CO_U32_e64_3:%[0-9]+]]:sreg_64_xexec = V_ADD_CO_U32_e64 [[S_MOV_B32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_CO_U32_e64_2]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
%0:vgpr_32, dead %2:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32, dead %3:sreg_64_xexec = V_ADD_CO_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
|
||||
@@ -20,16 +20,16 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX900-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 256, [[V_ADD_U32_e64_]], implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_u32_e32__literal_offsets
|
||||
; GFX942: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 256, %stack.0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX942-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 512, %stack.0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e32__literal_offsets
|
||||
@@ -37,21 +37,21 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 256, [[V_ADD_U32_e64_]], implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e32__literal_offsets
|
||||
; GFX12: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 256, %stack.0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 512, %stack.0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = V_ADD_U32_e32 256, %stack.0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e32 512, %stack.0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -72,16 +72,16 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX900-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 8, [[V_ADD_U32_e64_]], implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_u32_e32__inline_imm_offsets
|
||||
; GFX942: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 8, %stack.0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX942-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 16, %stack.0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e32__inline_imm_offsets
|
||||
@@ -89,21 +89,21 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 8, [[V_ADD_U32_e64_]], implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e32__inline_imm_offsets
|
||||
; GFX12: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 8, %stack.0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 16, %stack.0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = V_ADD_U32_e32 8, %stack.0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e32 16, %stack.0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -124,16 +124,16 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 8, [[V_ADD_U32_e64_]], 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets
|
||||
; GFX942: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX942-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 16, %stack.0, 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets
|
||||
@@ -141,21 +141,21 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 8, [[V_ADD_U32_e64_]], 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets
|
||||
; GFX12: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 16, %stack.0, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e64 16, %stack.0, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -178,9 +178,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX900-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX900-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets
|
||||
@@ -188,9 +188,9 @@ body: |
|
||||
; GFX942-NEXT: {{ $}}
|
||||
; GFX942-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX942-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX942-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets
|
||||
@@ -199,9 +199,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX10-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, [[V_MOV_B32_e32_]], implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets
|
||||
@@ -209,15 +209,15 @@ body: |
|
||||
; GFX12-NEXT: {{ $}}
|
||||
; GFX12-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX12-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
%0:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e32 %vgpr_offset, %stack.0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -240,9 +240,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX900-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX900-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets_commute
|
||||
@@ -250,9 +250,9 @@ body: |
|
||||
; GFX942-NEXT: {{ $}}
|
||||
; GFX942-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX942-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX942-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets_commute
|
||||
@@ -261,9 +261,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX10-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 [[V_MOV_B32_e32_]], %vgpr_offset, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e32__vgpr_offsets_commute
|
||||
@@ -271,15 +271,15 @@ body: |
|
||||
; GFX12-NEXT: {{ $}}
|
||||
; GFX12-NEXT: %vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
; GFX12-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%vgpr_offset:vgpr_32 = COPY $vgpr0
|
||||
%0:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e32 %stack.0, %vgpr_offset, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -301,9 +301,9 @@ body: |
|
||||
; GFX900-NEXT: {{ $}}
|
||||
; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX900-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX900-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_u32_e32__sgpr_offsets
|
||||
@@ -311,9 +311,9 @@ body: |
|
||||
; GFX942-NEXT: {{ $}}
|
||||
; GFX942-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX942-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX942-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e32__sgpr_offsets
|
||||
@@ -322,9 +322,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX10-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, [[V_MOV_B32_e32_]], implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, [[V_MOV_B32_e32_]], implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e32__sgpr_offsets
|
||||
@@ -332,15 +332,15 @@ body: |
|
||||
; GFX12-NEXT: {{ $}}
|
||||
; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX12-NEXT: [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e32_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e32_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e32_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
%0:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e32 %sgpr_offset, %stack.0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -363,9 +363,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets
|
||||
@@ -373,9 +373,9 @@ body: |
|
||||
; GFX942-NEXT: {{ $}}
|
||||
; GFX942-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX942-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX942-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets
|
||||
@@ -384,9 +384,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets
|
||||
@@ -394,15 +394,15 @@ body: |
|
||||
; GFX12-NEXT: {{ $}}
|
||||
; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX12-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
%0:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e64 %sgpr_offset, %stack.0, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -425,9 +425,9 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets_commute
|
||||
@@ -435,9 +435,9 @@ body: |
|
||||
; GFX942-NEXT: {{ $}}
|
||||
; GFX942-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX942-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX942-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets_commute
|
||||
@@ -446,9 +446,9 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[V_MOV_B32_e32_]], %sgpr_offset, 0, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e64__sgpr_offsets_commute
|
||||
@@ -456,15 +456,15 @@ body: |
|
||||
; GFX12-NEXT: {{ $}}
|
||||
; GFX12-NEXT: %sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
; GFX12-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%sgpr_offset:sreg_32 = COPY $sgpr8
|
||||
%0:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e64 %stack.0, %sgpr_offset, 0, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
@@ -486,16 +486,16 @@ body: |
|
||||
; GFX900-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX900-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX900-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 8, [[V_ADD_U32_e64_]], 1, implicit $exec
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX900-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX900-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX942-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets_clamp_modifier
|
||||
; GFX942: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, 1, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX942-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 16, %stack.0, 1, implicit $exec
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX942-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX942-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX10-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets_clamp_modifier
|
||||
@@ -503,21 +503,21 @@ body: |
|
||||
; GFX10-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 %stack.0, implicit $exec
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 killed [[S_MOV_B32_]], [[V_MOV_B32_e32_]], 0, implicit $exec
|
||||
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY [[V_ADD_U32_e64_]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[COPY]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[COPY]]
|
||||
; GFX10-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 8, [[V_ADD_U32_e64_]], 1, implicit $exec
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX10-NEXT: SI_RETURN
|
||||
;
|
||||
; GFX12-LABEL: name: local_stack_alloc__v_add_u32_e64__inline_imm_offsets_clamp_modifier
|
||||
; GFX12: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, 1, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_]]
|
||||
; GFX12-NEXT: [[V_ADD_U32_e64_1:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 16, %stack.0, 1, implicit $exec
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, [[V_ADD_U32_e64_1]]
|
||||
; GFX12-NEXT: SI_RETURN
|
||||
%0:vgpr_32 = V_ADD_U32_e64 %stack.0, 8, /*clamp*/1, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %0
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %0
|
||||
%1:vgpr_32 = V_ADD_U32_e64 16, %stack.0, /*clamp*/1, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1114121 /* reguse:VGPR_32 */, %1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VGPR_32, %1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
|
||||
@@ -9572,7 +9572,7 @@ body: |
|
||||
; GFX908-NEXT: [[V_CVT_I32_F64_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0
|
||||
; GFX908-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0
|
||||
; GFX908-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
|
||||
; GFX908-NEXT: INLINEASM &"v_or_b32 $0, 0, $1", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %22, 1114121 /* reguse:VGPR_32 */, [[V_CVT_I32_F64_e32_4]]
|
||||
; GFX908-NEXT: INLINEASM &"v_or_b32 $0, 0, $1", attdialect, regdef:VGPR_32, def %22, reguse:VGPR_32, [[V_CVT_I32_F64_e32_4]]
|
||||
; GFX908-NEXT: {{ $}}
|
||||
; GFX908-NEXT: bb.1:
|
||||
; GFX908-NEXT: successors: %bb.2(0x80000000)
|
||||
@@ -9623,7 +9623,7 @@ body: |
|
||||
; GFX908-GCNTRACKERS-NEXT: [[V_CVT_I32_F64_e32_20:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0
|
||||
; GFX908-GCNTRACKERS-NEXT: [[V_CVT_I32_F64_e32_21:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0
|
||||
; GFX908-GCNTRACKERS-NEXT: [[V_CVT_I32_F64_e32_22:%[0-9]+]]:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
|
||||
; GFX908-GCNTRACKERS-NEXT: INLINEASM &"v_or_b32 $0, 0, $1", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %22, 1114121 /* reguse:VGPR_32 */, [[V_CVT_I32_F64_e32_4]]
|
||||
; GFX908-GCNTRACKERS-NEXT: INLINEASM &"v_or_b32 $0, 0, $1", attdialect, regdef:VGPR_32, def %22, reguse:VGPR_32, [[V_CVT_I32_F64_e32_4]]
|
||||
; GFX908-GCNTRACKERS-NEXT: {{ $}}
|
||||
; GFX908-GCNTRACKERS-NEXT: bb.1:
|
||||
; GFX908-GCNTRACKERS-NEXT: successors: %bb.2(0x80000000)
|
||||
@@ -9671,7 +9671,7 @@ body: |
|
||||
%19:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 19, implicit $exec, implicit $mode, implicit-def $m0
|
||||
%20:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 20, implicit $exec, implicit $mode, implicit-def $m0
|
||||
%21:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 21, implicit $exec, implicit $mode, implicit-def $m0
|
||||
INLINEASM &"v_or_b32 $0, 0, $1", 0 /* attdialect */, 1114122 /* regdef:VGPR_32 */, def %22:vgpr_32, 1114121 /* reguse:VGPR_32 */, %4
|
||||
INLINEASM &"v_or_b32 $0, 0, $1", attdialect, regdef:VGPR_32, def %22:vgpr_32, reguse:VGPR_32, %4
|
||||
%23:vgpr_32 = nofpexcept V_CVT_I32_F64_e32 23, implicit $exec, implicit $mode
|
||||
|
||||
bb.1:
|
||||
|
||||
@@ -34,8 +34,8 @@ body: |
|
||||
; GFX9-SUNK-NEXT: [[COPY2:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: [[COPY3:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: [[COPY4:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[COPY]], implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]], implicit [[COPY4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[COPY]], implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]], implicit [[COPY4]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.3:
|
||||
@@ -46,8 +46,8 @@ body: |
|
||||
; GFX9-SUNK-NEXT: [[COPY7:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: [[COPY8:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: [[COPY9:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[COPY5]], implicit [[COPY6]], implicit [[COPY7]], implicit [[COPY8]], implicit [[COPY9]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[COPY5]], implicit [[COPY6]], implicit [[COPY7]], implicit [[COPY8]], implicit [[COPY9]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.4:
|
||||
@@ -86,8 +86,8 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[COPY2:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: [[COPY3:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: [[COPY4:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[COPY]], implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]], implicit [[COPY4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[COPY]], implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]], implicit [[COPY4]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.3:
|
||||
@@ -98,8 +98,8 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[COPY7:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: [[COPY8:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: [[COPY9:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[COPY5]], implicit [[COPY6]], implicit [[COPY7]], implicit [[COPY8]], implicit [[COPY9]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[COPY5]], implicit [[COPY6]], implicit [[COPY7]], implicit [[COPY8]], implicit [[COPY9]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.4:
|
||||
@@ -188,9 +188,9 @@ body: |
|
||||
; GFX9-SUNK-NEXT: [[COPY2:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: [[COPY3:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: [[COPY4:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[COPY]], implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]], implicit [[COPY4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[COPY]], implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]], implicit [[COPY4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.3:
|
||||
@@ -201,9 +201,9 @@ body: |
|
||||
; GFX9-SUNK-NEXT: [[COPY7:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: [[COPY8:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: [[COPY9:%[0-9]+]]:vreg_256_align2 = COPY [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[COPY5]], implicit [[COPY6]], implicit [[COPY7]], implicit [[COPY8]], implicit [[COPY9]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[COPY5]], implicit [[COPY6]], implicit [[COPY7]], implicit [[COPY8]], implicit [[COPY9]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.4:
|
||||
@@ -247,9 +247,9 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[COPY2:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: [[COPY3:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: [[COPY4:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[COPY]], implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]], implicit [[COPY4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[COPY]], implicit [[COPY1]], implicit [[COPY2]], implicit [[COPY3]], implicit [[COPY4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.3:
|
||||
@@ -265,9 +265,9 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[COPY7:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: [[COPY8:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: [[COPY9:%[0-9]+]]:vreg_256 = COPY [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[COPY5]], implicit [[COPY6]], implicit [[COPY7]], implicit [[COPY8]], implicit [[COPY9]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[COPY5]], implicit [[COPY6]], implicit [[COPY7]], implicit [[COPY8]], implicit [[COPY9]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.4:
|
||||
@@ -370,15 +370,15 @@ body: |
|
||||
; GFX9-SUNK-NEXT: bb.2:
|
||||
; GFX9-SUNK-NEXT: successors: %bb.4(0x80000000)
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.3:
|
||||
; GFX9-SUNK-NEXT: successors: %bb.4(0x80000000)
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.4:
|
||||
@@ -433,8 +433,8 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_18:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub2, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_19:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub3, [[DEF1]].sub2, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_20:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub4, [[DEF1]].sub2, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.3:
|
||||
@@ -461,8 +461,8 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_39:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub2, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_40:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub3, [[DEF1]].sub2, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_41:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub4, [[DEF1]].sub2, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]], implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]], implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.4:
|
||||
@@ -581,8 +581,8 @@ body: |
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_24:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_25:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_26:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.3:
|
||||
@@ -615,8 +615,8 @@ body: |
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_51:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_52:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_53:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.4:
|
||||
@@ -677,8 +677,8 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_24:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_25:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_26:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.3:
|
||||
@@ -711,8 +711,8 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_51:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_52:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_53:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.4:
|
||||
@@ -811,7 +811,7 @@ body: |
|
||||
; GFX9-SUNK-NEXT: bb.1:
|
||||
; GFX9-SUNK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF8]], implicit [[V_MFMA_F32_4X4X1F32_e64_]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF8]], implicit [[V_MFMA_F32_4X4X1F32_e64_]]
|
||||
; GFX9-SUNK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.3
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
@@ -845,8 +845,8 @@ body: |
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_24:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_25:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_26:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.3:
|
||||
@@ -879,8 +879,8 @@ body: |
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_51:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_52:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_53:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.4:
|
||||
@@ -913,7 +913,7 @@ body: |
|
||||
; GFX10-SUNK-NEXT: bb.1:
|
||||
; GFX10-SUNK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF8]], implicit [[V_MFMA_F32_4X4X1F32_e64_]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF8]], implicit [[V_MFMA_F32_4X4X1F32_e64_]]
|
||||
; GFX10-SUNK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.3
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
@@ -947,8 +947,8 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_24:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_25:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_26:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.3:
|
||||
@@ -981,8 +981,8 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_51:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_52:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_53:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.4:
|
||||
@@ -1084,7 +1084,7 @@ body: |
|
||||
; GFX9-SUNK-NEXT: bb.1:
|
||||
; GFX9-SUNK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_ADD_CO_U32_e64_1]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_ADD_CO_U32_e64_1]]
|
||||
; GFX9-SUNK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.3
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
@@ -1118,8 +1118,8 @@ body: |
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_24:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_25:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_26:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.3:
|
||||
@@ -1152,8 +1152,8 @@ body: |
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_51:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_52:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: [[V_ADD_U32_e64_53:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX9-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX9-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX9-SUNK-NEXT: {{ $}}
|
||||
; GFX9-SUNK-NEXT: bb.4:
|
||||
@@ -1182,7 +1182,7 @@ body: |
|
||||
; GFX10-SUNK-NEXT: bb.1:
|
||||
; GFX10-SUNK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_ADD_CO_U32_e64_1]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_CO_U32_e64_]], implicit [[V_ADD_CO_U32_e64_1]]
|
||||
; GFX10-SUNK-NEXT: S_CBRANCH_EXECZ %bb.2, implicit $exec
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.3
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
@@ -1216,8 +1216,8 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_24:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_25:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_26:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]], implicit [[V_ADD_U32_e64_1]], implicit [[V_ADD_U32_e64_2]], implicit [[V_ADD_U32_e64_3]], implicit [[V_ADD_U32_e64_4]], implicit [[V_ADD_U32_e64_5]], implicit [[V_ADD_U32_e64_6]], implicit [[V_ADD_U32_e64_7]], implicit [[V_ADD_U32_e64_8]], implicit [[V_ADD_U32_e64_9]], implicit [[V_ADD_U32_e64_10]], implicit [[V_ADD_U32_e64_11]], implicit [[V_ADD_U32_e64_12]], implicit [[V_ADD_U32_e64_13]], implicit [[V_ADD_U32_e64_14]], implicit [[V_ADD_U32_e64_15]], implicit [[V_ADD_U32_e64_16]], implicit [[V_ADD_U32_e64_17]], implicit [[V_ADD_U32_e64_18]], implicit [[V_ADD_U32_e64_19]], implicit [[V_ADD_U32_e64_20]], implicit [[V_ADD_U32_e64_21]], implicit [[V_ADD_U32_e64_22]], implicit [[V_ADD_U32_e64_23]], implicit [[V_ADD_U32_e64_24]], implicit [[V_ADD_U32_e64_25]], implicit [[V_ADD_U32_e64_26]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.3:
|
||||
@@ -1250,8 +1250,8 @@ body: |
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_51:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub0, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_52:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub1, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: [[V_ADD_U32_e64_53:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[DEF]].sub2, [[DEF1]].sub3, 0, implicit $exec
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]]
|
||||
; GFX10-SUNK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_27]], implicit [[V_ADD_U32_e64_28]], implicit [[V_ADD_U32_e64_29]], implicit [[V_ADD_U32_e64_30]], implicit [[V_ADD_U32_e64_31]], implicit [[V_ADD_U32_e64_32]], implicit [[V_ADD_U32_e64_33]], implicit [[V_ADD_U32_e64_34]], implicit [[V_ADD_U32_e64_35]], implicit [[V_ADD_U32_e64_36]], implicit [[V_ADD_U32_e64_37]], implicit [[V_ADD_U32_e64_38]], implicit [[V_ADD_U32_e64_39]], implicit [[V_ADD_U32_e64_40]], implicit [[V_ADD_U32_e64_41]], implicit [[V_ADD_U32_e64_42]], implicit [[V_ADD_U32_e64_43]], implicit [[V_ADD_U32_e64_44]], implicit [[V_ADD_U32_e64_45]], implicit [[V_ADD_U32_e64_46]], implicit [[V_ADD_U32_e64_47]], implicit [[V_ADD_U32_e64_48]], implicit [[V_ADD_U32_e64_49]], implicit [[V_ADD_U32_e64_50]], implicit [[V_ADD_U32_e64_51]], implicit [[V_ADD_U32_e64_52]], implicit [[V_ADD_U32_e64_53]]
|
||||
; GFX10-SUNK-NEXT: S_BRANCH %bb.4
|
||||
; GFX10-SUNK-NEXT: {{ $}}
|
||||
; GFX10-SUNK-NEXT: bb.4:
|
||||
|
||||
@@ -41,7 +41,7 @@ body: |
|
||||
; CHECK-NEXT: bb.4:
|
||||
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; CHECK-NEXT: [[SI_IF_BREAK:%[0-9]+]]:sreg_32 = SI_IF_BREAK killed [[SI_IF1]], [[SI_IF]], implicit-def dead $scc
|
||||
; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
; CHECK-NEXT: S_BRANCH %bb.5
|
||||
@@ -52,7 +52,7 @@ body: |
|
||||
; CHECK-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.4
|
||||
; CHECK-NEXT: SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
; CHECK-NEXT: [[V_ADD_U32_e64_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e64 [[COPY]], [[COPY1]], 0, implicit $exec
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[V_ADD_U32_e64_]]
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[V_ADD_U32_e64_]]
|
||||
; CHECK-NEXT: S_BRANCH %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.6:
|
||||
@@ -88,7 +88,7 @@ body: |
|
||||
S_NOP 0
|
||||
|
||||
bb.4:
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
INLINEASM &"", sideeffect attdialect
|
||||
%5:vgpr_32 = V_ADD_U32_e64 %0, %1, 0, implicit $exec
|
||||
%6:sreg_32 = SI_IF_BREAK killed %4, %3, implicit-def dead $scc
|
||||
SI_LOOP %6, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
@@ -152,7 +152,7 @@ body: |
|
||||
; CHECK-NEXT: bb.4:
|
||||
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.5(0x40000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; CHECK-NEXT: [[SI_IF_BREAK:%[0-9]+]]:sreg_32 = SI_IF_BREAK killed [[SI_IF1]], [[SI_IF]], implicit-def dead $scc
|
||||
; CHECK-NEXT: SI_LOOP [[SI_IF_BREAK]], %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
; CHECK-NEXT: S_BRANCH %bb.5
|
||||
@@ -163,7 +163,7 @@ body: |
|
||||
; CHECK-NEXT: [[PHI:%[0-9]+]]:vgpr_32 = PHI [[COPY]], %bb.4
|
||||
; CHECK-NEXT: SI_END_CF [[SI_IF_BREAK]], implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
; CHECK-NEXT: [[S_ADD_I32_:%[0-9]+]]:sreg_32 = S_ADD_I32 [[COPY]], [[COPY1]], implicit-def dead $scc
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[S_ADD_I32_]]
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[S_ADD_I32_]]
|
||||
; CHECK-NEXT: S_BRANCH %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.6:
|
||||
@@ -199,7 +199,7 @@ body: |
|
||||
S_NOP 0
|
||||
|
||||
bb.4:
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
INLINEASM &"", sideeffect attdialect
|
||||
%5:sreg_32 = S_ADD_I32 %0, %1, implicit-def dead $scc
|
||||
%6:sreg_32 = SI_IF_BREAK killed %4, %3, implicit-def dead $scc
|
||||
SI_LOOP %6, %bb.2, implicit-def dead $exec, implicit-def dead $scc, implicit $exec
|
||||
|
||||
@@ -33,7 +33,7 @@ name: asm_write_vgpr_accvgpr_write_read
|
||||
body: |
|
||||
bb.0:
|
||||
|
||||
INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 1179658 /* regdef:VGPR_32 */, def $vgpr0
|
||||
INLINEASM &"; def $0", sideeffect attdialect, regdef:VGPR_32, def $vgpr0
|
||||
$agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
|
||||
...
|
||||
|
||||
@@ -47,7 +47,7 @@ name: asm_write_vgpr_accvgpr_write_read_partialnop
|
||||
body: |
|
||||
bb.0:
|
||||
|
||||
INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 1179658 /* regdef:VGPR_32 */, def $vgpr0
|
||||
INLINEASM &"; def $0", sideeffect attdialect, regdef:VGPR_32, def $vgpr0
|
||||
S_NOP 0
|
||||
$agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
|
||||
...
|
||||
@@ -60,7 +60,7 @@ name: asm_write_vgpr_accvgpr_write_read_otherreg
|
||||
body: |
|
||||
bb.0:
|
||||
liveins: $vgpr0
|
||||
INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 1179658 /* regdef:VGPR_32 */, def $vgpr1
|
||||
INLINEASM &"; def $0", sideeffect attdialect, regdef:VGPR_32, def $vgpr1
|
||||
$agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
|
||||
...
|
||||
|
||||
|
||||
@@ -15,7 +15,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[COPY:%[0-9]+]].sub1:sgpr_64 = COPY $sgpr17
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]].sub0:sgpr_64 = COPY $sgpr16
|
||||
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
; CHECK-NEXT: INLINEASM &"; def $0", 0 /* attdialect */, 2359306 /* regdef:VReg_64 */, def undef %5.sub0_sub1
|
||||
; CHECK-NEXT: INLINEASM &"; def $0", attdialect, regdef:VReg_64, def undef %5.sub0_sub1
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX4_SADDR [[V_MOV_B32_e32_]], %5.sub1_sub2_sub3_sub4, [[COPY]], 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:sgpr_32 = COPY killed $sgpr17
|
||||
@@ -23,7 +23,7 @@ body: |
|
||||
undef %2.sub0:sgpr_64 = COPY killed %1
|
||||
%2.sub1:sgpr_64 = COPY killed %0
|
||||
%3:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
INLINEASM &"; def $0", 0 /* attdialect */, 2359306 /* regdef:VReg_64 */, def %4:vreg_64
|
||||
INLINEASM &"; def $0", attdialect, regdef:VReg_64, def %4:vreg_64
|
||||
undef %5.sub0:vreg_128 = COPY killed %4.sub1
|
||||
GLOBAL_STORE_DWORDX4_SADDR killed %3, killed %5, killed %2, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
SI_RETURN
|
||||
|
||||
@@ -15,7 +15,7 @@ body: |
|
||||
; CHECK-NEXT: successors: %bb.1(0x80000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:sgpr_64 = COPY $exec
|
||||
; CHECK-NEXT: INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 4194313 /* reguse:SGPR_64 */, [[COPY]]
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect mayload maystore attdialect, reguse:SGPR_64, [[COPY]]
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1:
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
@@ -23,7 +23,7 @@ body: |
|
||||
successors: %bb.1(0x80000000)
|
||||
|
||||
%0:sgpr_64 = COPY $exec
|
||||
INLINEASM &"", 25 /* sideeffect mayload maystore attdialect */, 4194313 /* reguse:SGPR_64 */, %0
|
||||
INLINEASM &"", sideeffect mayload maystore attdialect, reguse:SGPR_64, %0
|
||||
|
||||
bb.1:
|
||||
SI_RETURN
|
||||
|
||||
@@ -11,10 +11,10 @@ define amdgpu_kernel void @partial_copy(<4 x i32> %arg) #0 {
|
||||
; REGALLOC-GFX908: bb.0 (%ir-block.0):
|
||||
; REGALLOC-GFX908-NEXT: liveins: $sgpr4_sgpr5
|
||||
; REGALLOC-GFX908-NEXT: {{ $}}
|
||||
; REGALLOC-GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1310729 /* reguse:AGPR_32 */, undef %6:agpr_32
|
||||
; REGALLOC-GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 6553610 /* regdef:VReg_128 */, def %25
|
||||
; REGALLOC-GFX908-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AGPR_32, undef %6:agpr_32
|
||||
; REGALLOC-GFX908-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_128, def %25
|
||||
; REGALLOC-GFX908-NEXT: [[COPY:%[0-9]+]]:av_128 = COPY %25
|
||||
; REGALLOC-GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 2359306 /* regdef:VReg_64 */, def %27
|
||||
; REGALLOC-GFX908-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_64, def %27
|
||||
; REGALLOC-GFX908-NEXT: SI_SPILL_AV64_SAVE %27, %stack.0, $sgpr32, 0, implicit $exec :: (store (s64) into %stack.0, align 4, addrspace 5)
|
||||
; REGALLOC-GFX908-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY [[COPY]]
|
||||
; REGALLOC-GFX908-NEXT: GLOBAL_STORE_DWORDX4 undef %15:vreg_64, [[COPY1]], 0, 0, implicit $exec :: (volatile store (s128) into `ptr addrspace(1) poison`, addrspace 1)
|
||||
@@ -36,10 +36,10 @@ define amdgpu_kernel void @partial_copy(<4 x i32> %arg) #0 {
|
||||
; PEI-GFX908-NEXT: $sgpr12_sgpr13_sgpr14_sgpr15 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3
|
||||
; PEI-GFX908-NEXT: $sgpr12 = S_ADD_U32 $sgpr12, $sgpr9, implicit-def $scc, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15
|
||||
; PEI-GFX908-NEXT: $sgpr13 = S_ADDC_U32 $sgpr13, 0, implicit-def dead $scc, implicit $scc, implicit-def $sgpr12_sgpr13_sgpr14_sgpr15
|
||||
; PEI-GFX908-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1310729 /* reguse:AGPR_32 */, undef renamable $agpr0
|
||||
; PEI-GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 6553610 /* regdef:VReg_128 */, def renamable $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; PEI-GFX908-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AGPR_32, undef renamable $agpr0
|
||||
; PEI-GFX908-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_128, def renamable $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; PEI-GFX908-NEXT: renamable $agpr0_agpr1_agpr2_agpr3 = COPY killed renamable $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec
|
||||
; PEI-GFX908-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 2359306 /* regdef:VReg_64 */, def renamable $vgpr0_vgpr1
|
||||
; PEI-GFX908-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_64, def renamable $vgpr0_vgpr1
|
||||
; PEI-GFX908-NEXT: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr12_sgpr13_sgpr14_sgpr15, 0, 0, 0, 0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr0_vgpr1 :: ("amdgpu-thread-private" store (s32) into %stack.0, addrspace 5)
|
||||
; PEI-GFX908-NEXT: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit killed $vgpr0_vgpr1
|
||||
; PEI-GFX908-NEXT: renamable $vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed renamable $agpr0_agpr1_agpr2_agpr3, implicit $exec
|
||||
@@ -60,10 +60,10 @@ define amdgpu_kernel void @partial_copy(<4 x i32> %arg) #0 {
|
||||
; REGALLOC-GFX90A: bb.0 (%ir-block.0):
|
||||
; REGALLOC-GFX90A-NEXT: liveins: $sgpr4_sgpr5
|
||||
; REGALLOC-GFX90A-NEXT: {{ $}}
|
||||
; REGALLOC-GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1310729 /* reguse:AGPR_32 */, undef %6:agpr_32
|
||||
; REGALLOC-GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 6881290 /* regdef:VReg_128_Align2 */, def %23
|
||||
; REGALLOC-GFX90A-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AGPR_32, undef %6:agpr_32
|
||||
; REGALLOC-GFX90A-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_128_Align2, def %23
|
||||
; REGALLOC-GFX90A-NEXT: [[COPY:%[0-9]+]]:av_128_align2 = COPY %23
|
||||
; REGALLOC-GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 2621450 /* regdef:VReg_64_Align2 */, def %21
|
||||
; REGALLOC-GFX90A-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_64_Align2, def %21
|
||||
; REGALLOC-GFX90A-NEXT: [[COPY1:%[0-9]+]]:av_64_align2 = COPY %21
|
||||
; REGALLOC-GFX90A-NEXT: GLOBAL_STORE_DWORDX4 undef %15:vreg_64_align2, [[COPY]], 0, 0, implicit $exec :: (volatile store (s128) into `ptr addrspace(1) poison`, addrspace 1)
|
||||
; REGALLOC-GFX90A-NEXT: renamable $sgpr0_sgpr1_sgpr2_sgpr3 = S_LOAD_DWORDX4_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (s128) from %ir.arg.kernarg.offset1, addrspace 4)
|
||||
@@ -79,10 +79,10 @@ define amdgpu_kernel void @partial_copy(<4 x i32> %arg) #0 {
|
||||
; PEI-GFX90A: bb.0 (%ir-block.0):
|
||||
; PEI-GFX90A-NEXT: liveins: $sgpr4_sgpr5
|
||||
; PEI-GFX90A-NEXT: {{ $}}
|
||||
; PEI-GFX90A-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1310729 /* reguse:AGPR_32 */, undef renamable $agpr0
|
||||
; PEI-GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 6881290 /* regdef:VReg_128_Align2 */, def renamable $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; PEI-GFX90A-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AGPR_32, undef renamable $agpr0
|
||||
; PEI-GFX90A-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_128_Align2, def renamable $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; PEI-GFX90A-NEXT: renamable $agpr0_agpr1_agpr2_agpr3 = COPY killed renamable $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec
|
||||
; PEI-GFX90A-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 2621450 /* regdef:VReg_64_Align2 */, def renamable $vgpr2_vgpr3
|
||||
; PEI-GFX90A-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VReg_64_Align2, def renamable $vgpr2_vgpr3
|
||||
; PEI-GFX90A-NEXT: GLOBAL_STORE_DWORDX4 undef renamable $vgpr0_vgpr1, killed renamable $agpr0_agpr1_agpr2_agpr3, 0, 0, implicit $exec :: (volatile store (s128) into `ptr addrspace(1) poison`, addrspace 1)
|
||||
; PEI-GFX90A-NEXT: renamable $sgpr0_sgpr1_sgpr2_sgpr3 = S_LOAD_DWORDX4_IMM killed renamable $sgpr4_sgpr5, 0, 0 :: (dereferenceable invariant load (s128) from %ir.arg.kernarg.offset1, addrspace 4)
|
||||
; PEI-GFX90A-NEXT: renamable $agpr0_agpr1_agpr2_agpr3 = COPY killed renamable $sgpr0_sgpr1_sgpr2_sgpr3, implicit $exec
|
||||
|
||||
@@ -43,17 +43,17 @@ machineFunctionInfo:
|
||||
body: |
|
||||
bb.0:
|
||||
|
||||
INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 1310730 /* regdef:AGPR_32 */, implicit-def $agpr0
|
||||
INLINEASM &"; def $0", sideeffect attdialect, regdef:AGPR_32, implicit-def $agpr0
|
||||
%14:vgpr_32 = COPY killed $agpr0
|
||||
INLINEASM &"; def $0 $1 $2 $3 $4", 1 /* sideeffect attdialect */, 38666250 /* regdef:VReg_512 */, def %7, 18087946 /* regdef:VReg_256 */, def %8, 6553610 /* regdef:VReg_128 */, def %9, 4587530 /* regdef:VReg_96 */, def %10, 4587530 /* regdef:VReg_96 */, def %11
|
||||
INLINEASM &"; clobber", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, 12 /* clobber */, implicit-def dead early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 38666249 /* reguse:VReg_512 */, %7
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 18087945 /* reguse:VReg_256 */, %8
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 6553609 /* reguse:VReg_128 */, %9
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 4587529 /* reguse:VReg_96 */, %10
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 4587529 /* reguse:VReg_96 */, %11
|
||||
INLINEASM &"; def $0 $1 $2 $3 $4", sideeffect attdialect, regdef:VReg_512, def %7, regdef:VReg_256, def %8, regdef:VReg_128, def %9, regdef:VReg_96, def %10, regdef:VReg_96, def %11
|
||||
INLINEASM &"; clobber", sideeffect attdialect, clobber, implicit-def dead early-clobber $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31, clobber, implicit-def dead early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_512, %7
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_256, %8
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_128, %9
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_96, %10
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_96, %11
|
||||
$agpr1 = COPY %14
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1310729 /* reguse:AGPR_32 */, killed $agpr1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AGPR_32, killed $agpr1
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
|
||||
@@ -40,7 +40,7 @@ machineFunctionInfo:
|
||||
body: |
|
||||
bb.0:
|
||||
; CHECK-LABEL: name: foo
|
||||
; CHECK: INLINEASM &"; def $0 $1 $2 $3 $4", 1 /* sideeffect attdialect */, 10 /* regdef */, def %10, 10 /* regdef */, def %1, 10 /* regdef */, def %2, 10 /* regdef */, def $vgpr0_vgpr1_vgpr2_vgpr3, 10 /* regdef */, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
|
||||
; CHECK: INLINEASM &"; def $0 $1 $2 $3 $4", sideeffect attdialect, regdef, def %10, regdef, def %1, regdef, def %2, regdef, def $vgpr0_vgpr1_vgpr2_vgpr3, regdef, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
|
||||
; CHECK-NEXT: KILL undef $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
; CHECK-NEXT: SI_SPILL_AV160_SAVE %2, %stack.1, $sgpr32, 0, implicit $exec :: (store (s160) into %stack.1, align 4, addrspace 5)
|
||||
; CHECK-NEXT: SI_SPILL_AV256_SAVE %1, %stack.3, $sgpr32, 0, implicit $exec :: (store (s256) into %stack.3, align 4, addrspace 5)
|
||||
@@ -48,7 +48,7 @@ body: |
|
||||
; CHECK-NEXT: SI_SPILL_V512_SAVE [[COPY]], %stack.0, $sgpr32, 0, implicit $exec :: (store (s512) into %stack.0, align 4, addrspace 5)
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:av_512 = COPY $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
|
||||
; CHECK-NEXT: SI_SPILL_AV512_SAVE [[COPY1]], %stack.6, $sgpr32, 0, implicit $exec :: (store (s512) into %stack.6, align 4, addrspace 5)
|
||||
; CHECK-NEXT: INLINEASM &"; clobber", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
|
||||
; CHECK-NEXT: INLINEASM &"; clobber", sideeffect attdialect, regdef, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
|
||||
; CHECK-NEXT: [[SI_SPILL_AV512_RESTORE:%[0-9]+]]:av_512 = SI_SPILL_AV512_RESTORE %stack.6, $sgpr32, 0, implicit $exec :: (load (s512) from %stack.6, align 4, addrspace 5)
|
||||
; CHECK-NEXT: $agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16 = COPY [[SI_SPILL_AV512_RESTORE]]
|
||||
; CHECK-NEXT: [[SI_SPILL_V512_RESTORE:%[0-9]+]]:vreg_512 = SI_SPILL_V512_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s512) from %stack.0, align 4, addrspace 5)
|
||||
@@ -59,21 +59,21 @@ body: |
|
||||
; CHECK-NEXT: $vgpr0_vgpr1_vgpr2_vgpr3 = SI_SPILL_AV128_RESTORE %stack.2, $sgpr32, 0, implicit $exec :: (load (s128) from %stack.2, align 4, addrspace 5)
|
||||
; CHECK-NEXT: [[SI_SPILL_AV512_RESTORE1:%[0-9]+]]:av_512 = SI_SPILL_AV512_RESTORE %stack.4, $sgpr32, 0, implicit $exec :: (load (s512) from %stack.4, align 4, addrspace 5)
|
||||
; CHECK-NEXT: [[SI_SPILL_AV256_RESTORE1:%[0-9]+]]:av_256 = SI_SPILL_AV256_RESTORE %stack.5, $sgpr32, 0, implicit $exec :: (load (s256) from %stack.5, align 4, addrspace 5)
|
||||
; CHECK-NEXT: INLINEASM &"; use $0 $1 $2 $3 $4", 1 /* sideeffect attdialect */, 9 /* reguse */, [[SI_SPILL_AV512_RESTORE1]], 9 /* reguse */, [[SI_SPILL_AV256_RESTORE1]], 9 /* reguse */, [[SI_SPILL_AV160_RESTORE]], 9 /* reguse */, undef $vgpr0_vgpr1_vgpr2_vgpr3, 9 /* reguse */, $agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16
|
||||
; CHECK-NEXT: INLINEASM &"; use $0 $1 $2 $3 $4", sideeffect attdialect, reguse, [[SI_SPILL_AV512_RESTORE1]], reguse, [[SI_SPILL_AV256_RESTORE1]], reguse, [[SI_SPILL_AV160_RESTORE]], reguse, undef $vgpr0_vgpr1_vgpr2_vgpr3, reguse, $agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
INLINEASM &"; def $0 $1 $2 $3 $4", 1 /* sideeffect attdialect */, 10, def %22:vreg_512, 10, def %25:vreg_256, 10, def %28:vreg_160, 10, def $vgpr0_vgpr1_vgpr2_vgpr3, 10, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
|
||||
INLINEASM &"; def $0 $1 $2 $3 $4", sideeffect attdialect, 10, def %22:vreg_512, 10, def %25:vreg_256, 10, def %28:vreg_160, 10, def $vgpr0_vgpr1_vgpr2_vgpr3, 10, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
|
||||
%30:av_128 = COPY undef $vgpr0_vgpr1_vgpr2_vgpr3
|
||||
%27:av_160 = COPY %28:vreg_160
|
||||
%24:av_256 = COPY %25:vreg_256
|
||||
SI_SPILL_V512_SAVE %22:vreg_512, %stack.0, $sgpr32, 0, implicit $exec :: (store (s512) into %stack.0, align 4, addrspace 5)
|
||||
%18:vreg_512 = COPY $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
|
||||
INLINEASM &"; clobber", 1 /* sideeffect attdialect */, 10, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
|
||||
INLINEASM &"; clobber", sideeffect attdialect, 10, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15_vgpr16_vgpr17_vgpr18_vgpr19_vgpr20_vgpr21_vgpr22_vgpr23_vgpr24_vgpr25_vgpr26_vgpr27_vgpr28_vgpr29_vgpr30_vgpr31
|
||||
$agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16 = COPY %18:vreg_512
|
||||
%23:vreg_512 = SI_SPILL_V512_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: (load (s512) from %stack.0, align 4, addrspace 5)
|
||||
%26:vreg_256 = COPY %24:av_256
|
||||
%29:vreg_160 = COPY %27:av_160
|
||||
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY %30:av_128
|
||||
INLINEASM &"; use $0 $1 $2 $3 $4", 1 /* sideeffect attdialect */, 9, %23:vreg_512, 9, %26:vreg_256, 9, %29:vreg_160, 9, undef $vgpr0_vgpr1_vgpr2_vgpr3, 9, $agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16
|
||||
INLINEASM &"; use $0 $1 $2 $3 $4", sideeffect attdialect, 9, %23:vreg_512, 9, %26:vreg_256, 9, %29:vreg_160, 9, undef $vgpr0_vgpr1_vgpr2_vgpr3, 9, $agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15_agpr16
|
||||
SI_RETURN
|
||||
|
||||
...
|
||||
|
||||
@@ -54,7 +54,7 @@ body: |
|
||||
|
||||
renamable $sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM killed renamable $sgpr8_sgpr9, 0, 0 :: (dereferenceable invariant load (s64), align 16, addrspace 4)
|
||||
%6:vgpr_32 = COPY renamable $sgpr0
|
||||
INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $agpr0
|
||||
INLINEASM &"; def $0", sideeffect attdialect, regdef, implicit-def $agpr0
|
||||
undef %4.sub0:av_512 = COPY $agpr0
|
||||
%3:areg_512 = COPY %4
|
||||
%7:vgpr_32 = COPY killed renamable $sgpr1
|
||||
@@ -65,7 +65,7 @@ body: |
|
||||
%5:areg_512 = V_MFMA_F32_16X16X1F32_mac_e64 %6, %7, %5, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%8:vgpr_32 = COPY %5.sub3
|
||||
$agpr1 = COPY %8
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 9 /* reguse */, killed $agpr1
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse, killed $agpr1
|
||||
S_ENDPGM 0
|
||||
|
||||
...
|
||||
|
||||
@@ -73,7 +73,7 @@ body: |
|
||||
# (1) %0.sub0 + %0.sub0 and (2) %0.sub1 + %0.sub1
|
||||
# Check that renaming (2) does not inadvertently rename (1).
|
||||
# CHECK-LABEL: name: test2
|
||||
# CHECK: INLINEASM &"", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def undef %0.sub0, 1114122 /* regdef:VGPR_32 */, def dead %1.sub1, 2147483657 /* reguse tiedto:$0 */, undef %0.sub0(tied-def 3), 2147549193 /* reguse tiedto:$1 */, %1.sub1(tied-def 5)
|
||||
# CHECK: INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def undef %0.sub0, regdef:VGPR_32, def dead %1.sub1, reguse tiedto:$0, undef %0.sub0(tied-def 3), reguse tiedto:$1, %1.sub1(tied-def 5)
|
||||
name: test2
|
||||
body: |
|
||||
bb.0:
|
||||
@@ -81,7 +81,7 @@ body: |
|
||||
|
||||
bb.1:
|
||||
undef %0.sub1:vreg_64 = V_ALIGNBIT_B32_e64 %0.sub0:vreg_64, %0.sub0:vreg_64, 16, implicit $exec
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def undef %0.sub0:vreg_64, 1114122 /* regdef:VGPR_32 */, def %0.sub1:vreg_64, 2147483657 /* reguse tiedto:$0 */, undef %0.sub0:vreg_64(tied-def 3), 2147549193 /* reguse tiedto:$1 */, %0.sub1:vreg_64(tied-def 5)
|
||||
INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def undef %0.sub0:vreg_64, regdef:VGPR_32, def %0.sub1:vreg_64, reguse tiedto:$0, undef %0.sub0:vreg_64(tied-def 3), reguse tiedto:$1, %0.sub1:vreg_64(tied-def 5)
|
||||
S_BRANCH %bb.1
|
||||
|
||||
...
|
||||
|
||||
@@ -43,7 +43,7 @@ body: |
|
||||
; CHECK-NEXT: [[GLOBAL_LOAD_DWORDX4_:%[0-9]+]]:areg_128_align2 = GLOBAL_LOAD_DWORDX4 [[COPY]], 0, 0, implicit $exec :: (load (s128), addrspace 1)
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:vreg_128_align2 = COPY [[GLOBAL_LOAD_DWORDX4_]]
|
||||
; CHECK-NEXT: [[V_MFMA_F64_4X4X4F64_vgprcd_e64_:%[0-9]+]]:vreg_64_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 [[COPY1]], [[COPY2]], [[COPY3]].sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2621449 /* reguse:VReg_64_Align2 */, [[V_MFMA_F64_4X4X4F64_vgprcd_e64_]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_64_Align2, [[V_MFMA_F64_4X4X4F64_vgprcd_e64_]]
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr4_vgpr5
|
||||
%1:av_64_align2 = COPY $vgpr0_vgpr1
|
||||
@@ -51,7 +51,7 @@ body: |
|
||||
%3:areg_128_align2 = GLOBAL_LOAD_DWORDX4 %0, 0, 0, implicit $exec :: (load (s128), addrspace 1)
|
||||
%4:vreg_128_align2 = COPY %3
|
||||
%5:vreg_64_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %4.sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2621449 /* reguse:VReg_64_Align2 */, %5
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_64_Align2, %5
|
||||
SI_RETURN
|
||||
...
|
||||
|
||||
|
||||
@@ -19,7 +19,7 @@ body: |
|
||||
; CHECK-NEXT: [[V_MFMA_F64_4X4X4F64_e64_:%[0-9]+]]:areg_64_align2 = V_MFMA_F64_4X4X4F64_e64 [[COPY1]], [[COPY2]], [[GLOBAL_LOAD_DWORDX2_]], 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_]]
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]].sub2_sub3:areg_128_align2 = IMPLICIT_DEF
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX4 [[COPY]], [[COPY3]], 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX2 [[COPY]], [[COPY3]].sub2_sub3, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
@@ -30,7 +30,7 @@ body: |
|
||||
%4:vreg_64_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %3, 0, 0, 0, implicit $mode, implicit $exec
|
||||
undef %5.sub0_sub1:areg_128_align2 = COPY %4
|
||||
%5.sub2_sub3 = IMPLICIT_DEF
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %5
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, %5
|
||||
GLOBAL_STORE_DWORDX4 %0, %5, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
GLOBAL_STORE_DWORDX2 %0, %5.sub2_sub3, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
SI_RETURN
|
||||
@@ -172,7 +172,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[V_MFMA_F64_4X4X4F64_e64_:%[0-9]+]].sub2_sub3:areg_128_align2 = V_MFMA_F64_4X4X4F64_e64 [[COPY1]], [[COPY2]], [[GLOBAL_LOAD_DWORDX2_]], 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_]].sub2_sub3
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]].sub2_sub3:areg_128_align2 = IMPLICIT_DEF
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX4 [[COPY]], [[COPY3]], 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX2 [[COPY]], [[COPY3]].sub2_sub3, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
@@ -183,7 +183,7 @@ body: |
|
||||
undef %4.sub2_sub3:vreg_128_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %3, 0, 0, 0, implicit $mode, implicit $exec
|
||||
undef %5.sub0_sub1:areg_128_align2 = COPY %4.sub2_sub3
|
||||
%5.sub2_sub3 = IMPLICIT_DEF
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %5
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, %5
|
||||
GLOBAL_STORE_DWORDX4 %0, %5, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
GLOBAL_STORE_DWORDX2 %0, %5.sub2_sub3, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
SI_RETURN
|
||||
@@ -208,7 +208,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[V_MFMA_F64_4X4X4F64_vgprcd_e64_:%[0-9]+]].sub2_sub3:vreg_128_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 [[COPY1]], [[COPY2]], [[GLOBAL_LOAD_DWORDX2_]], 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub1:areg_128_align2 = COPY [[V_MFMA_F64_4X4X4F64_vgprcd_e64_]].sub2
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]].sub2_sub3:areg_128_align2 = IMPLICIT_DEF
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX4 [[COPY]], [[COPY3]], 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX2 [[COPY]], [[COPY3]].sub2_sub3, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
@@ -219,7 +219,7 @@ body: |
|
||||
undef %4.sub2_sub3:vreg_128_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %3, 0, 0, 0, implicit $mode, implicit $exec
|
||||
undef %5.sub1:areg_128_align2 = COPY %4.sub2
|
||||
%5.sub2_sub3 = IMPLICIT_DEF
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %5
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, %5
|
||||
GLOBAL_STORE_DWORDX4 %0, %5, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
GLOBAL_STORE_DWORDX2 %0, %5.sub2_sub3, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
SI_RETURN
|
||||
|
||||
@@ -17,7 +17,7 @@ body: |
|
||||
; CHECK-NEXT: [[GLOBAL_LOAD_DWORDX4_:%[0-9]+]]:areg_128_align2 = GLOBAL_LOAD_DWORDX4 [[COPY]], 0, 0, implicit $exec :: (load (s128), addrspace 1)
|
||||
; CHECK-NEXT: [[V_MFMA_F64_4X4X4F64_e64_:%[0-9]+]]:areg_64_align2 = V_MFMA_F64_4X4X4F64_e64 [[COPY1]], [[COPY2]], [[GLOBAL_LOAD_DWORDX4_]].sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX4 [[COPY]], [[COPY3]], 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr4_vgpr5
|
||||
@@ -26,7 +26,7 @@ body: |
|
||||
%3:vreg_128_align2 = GLOBAL_LOAD_DWORDX4 %0, 0, 0, implicit $exec :: (load (s128), addrspace 1)
|
||||
%4:vreg_64_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %3.sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
undef %5.sub0_sub1:areg_128_align2 = COPY %4
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %5
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, %5
|
||||
GLOBAL_STORE_DWORDX4 %0, %5, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
SI_RETURN
|
||||
...
|
||||
@@ -47,7 +47,7 @@ body: |
|
||||
; CHECK-NEXT: [[GLOBAL_LOAD_DWORDX4_:%[0-9]+]]:areg_128_align2 = GLOBAL_LOAD_DWORDX4 [[COPY]], 0, 0, implicit $exec :: (load (s128), addrspace 1)
|
||||
; CHECK-NEXT: [[V_MFMA_F64_4X4X4F64_e64_:%[0-9]+]]:areg_64_align2 = V_MFMA_F64_4X4X4F64_e64 [[COPY1]], [[COPY2]], [[GLOBAL_LOAD_DWORDX4_]].sub2_sub3, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX4 [[COPY]], [[COPY3]], 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr4_vgpr5
|
||||
@@ -56,7 +56,7 @@ body: |
|
||||
%3:vreg_128_align2 = GLOBAL_LOAD_DWORDX4 %0, 0, 0, implicit $exec :: (load (s128), addrspace 1)
|
||||
%4:vreg_64_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %3.sub2_sub3, 0, 0, 0, implicit $mode, implicit $exec
|
||||
undef %5.sub0_sub1:areg_128_align2 = COPY %4
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %5
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, %5
|
||||
GLOBAL_STORE_DWORDX4 %0, %5, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
SI_RETURN
|
||||
...
|
||||
@@ -79,7 +79,7 @@ body: |
|
||||
; CHECK-NEXT: dead %other_use:vreg_64_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_]].sub0_sub1
|
||||
; CHECK-NEXT: [[V_MFMA_F64_4X4X4F64_e64_1:%[0-9]+]]:areg_64_align2 = V_MFMA_F64_4X4X4F64_e64 [[COPY1]], [[COPY2]], [[V_MFMA_F64_4X4X4F64_e64_]].sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:areg_64_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_1]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_64_Align2, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX2 [[COPY]], [[COPY3]], 0, 0, implicit $exec :: (store (s64), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr4_vgpr5
|
||||
@@ -90,7 +90,7 @@ body: |
|
||||
%other_use:vreg_64_align2 = COPY %4.sub0_sub1
|
||||
%5:vreg_64_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %4.sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%6:areg_64_align2 = COPY %5
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %6:areg_64_align2
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_64_Align2, %6:areg_64_align2
|
||||
GLOBAL_STORE_DWORDX2 %0, %6, 0, 0, implicit $exec :: (store (s64), addrspace 1)
|
||||
SI_RETURN
|
||||
...
|
||||
@@ -114,7 +114,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[V_MFMA_F64_4X4X4F64_e64_1:%[0-9]+]].sub0_sub1:areg_128_align2 = V_MFMA_F64_4X4X4F64_e64 [[COPY1]], [[COPY2]], [[V_MFMA_F64_4X4X4F64_e64_]], 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: [[V_MFMA_F64_4X4X4F64_e64_2:%[0-9]+]]:areg_64_align2 = V_MFMA_F64_4X4X4F64_e64 [[COPY1]], [[COPY2]], [[V_MFMA_F64_4X4X4F64_e64_1]].sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:areg_64_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 3538953 /* reguse:AReg_64_Align2 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_64_Align2, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX2 [[COPY]], [[COPY3]], 0, 0, implicit $exec :: (store (s64), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr4_vgpr5
|
||||
@@ -126,7 +126,7 @@ body: |
|
||||
undef %5.sub0_sub1:vreg_128_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %4, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%6:vreg_64_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %5.sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%7:areg_64_align2 = COPY %6
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 3538953 /* reguse:AReg_64_Align2 */, %7
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_64_Align2, %7
|
||||
GLOBAL_STORE_DWORDX2 %0, %7, 0, 0, implicit $exec :: (store (s64), addrspace 1)
|
||||
SI_RETURN
|
||||
|
||||
@@ -151,7 +151,7 @@ body: |
|
||||
; CHECK-NEXT: dead %other_use:vreg_64_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_1]].sub0_sub1
|
||||
; CHECK-NEXT: [[V_MFMA_F64_4X4X4F64_e64_2:%[0-9]+]]:areg_64_align2 = V_MFMA_F64_4X4X4F64_e64 [[COPY1]], [[COPY2]], [[V_MFMA_F64_4X4X4F64_e64_1]].sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: undef [[COPY3:%[0-9]+]].sub0_sub1:areg_128_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX4 [[COPY]], [[COPY3]], 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr4_vgpr5
|
||||
@@ -163,7 +163,7 @@ body: |
|
||||
%other_use:vreg_64_align2 = COPY %5.sub0_sub1
|
||||
%6:vreg_64_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %5.sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
undef %8.sub0_sub1:areg_128_align2 = COPY %6
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %8:areg_128_align2
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, %8:areg_128_align2
|
||||
GLOBAL_STORE_DWORDX4 %0, %8, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
SI_RETURN
|
||||
|
||||
@@ -189,7 +189,7 @@ body: |
|
||||
; CHECK-NEXT: dead %other_use1:vreg_64_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_1]].sub0_sub1
|
||||
; CHECK-NEXT: [[V_MFMA_F64_4X4X4F64_e64_2:%[0-9]+]]:areg_64_align2 = V_MFMA_F64_4X4X4F64_e64 [[COPY1]], [[COPY2]], [[V_MFMA_F64_4X4X4F64_e64_1]].sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:agpr_32 = COPY [[V_MFMA_F64_4X4X4F64_e64_2]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1310729 /* reguse:AGPR_32 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AGPR_32, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORD [[COPY]], [[COPY3]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr4_vgpr5
|
||||
@@ -202,7 +202,7 @@ body: |
|
||||
%other_use1:vreg_64_align2 = COPY %5.sub0_sub1
|
||||
%6:vreg_64_align2 = V_MFMA_F64_4X4X4F64_vgprcd_e64 %1, %2, %5.sub0_sub1, 0, 0, 0, implicit $mode, implicit $exec
|
||||
%8:agpr_32 = COPY %6
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 1310729 /* reguse:AGPR_32 */, %8:agpr_32
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AGPR_32, %8:agpr_32
|
||||
GLOBAL_STORE_DWORD %0, %8, 0, 0, implicit $exec :: (store (s32), addrspace 1)
|
||||
SI_RETURN
|
||||
|
||||
@@ -231,7 +231,7 @@ body: |
|
||||
; CHECK-NEXT: dead %other_use1:vreg_64_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_]].sub2_sub3
|
||||
; CHECK-NEXT: dead %other_use2:vreg_64 = COPY [[V_MFMA_F64_4X4X4F64_e64_]].sub1_sub2
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:areg_128_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX4 [[COPY]], [[COPY3]], 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr4_vgpr5
|
||||
@@ -245,7 +245,7 @@ body: |
|
||||
%other_use1:vreg_64_align2 = COPY %4.sub2_sub3
|
||||
%other_use2:vreg_64 = COPY %4.sub1_sub2
|
||||
%6:areg_128_align2 = COPY %4
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 8192009 /* reguse:AReg_128_Align2 */, %6:areg_128_align2
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_128_Align2, %6:areg_128_align2
|
||||
GLOBAL_STORE_DWORDX4 %0, %6, 0, 0, implicit $exec :: (store (s128), addrspace 1)
|
||||
SI_RETURN
|
||||
...
|
||||
@@ -273,7 +273,7 @@ body: |
|
||||
; CHECK-NEXT: %other_use1:vreg_64_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_]].sub2_sub3
|
||||
; CHECK-NEXT: dead %other_use2:vreg_64 = COPY [[V_MFMA_F64_4X4X4F64_e64_]].sub1_sub2
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:areg_64 = COPY [[V_MFMA_F64_4X4X4F64_e64_]].sub1_sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_64, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX2 [[COPY]], %other_use1, 0, 0, implicit $exec :: (store (s64), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr4_vgpr5
|
||||
@@ -287,7 +287,7 @@ body: |
|
||||
%other_use1:vreg_64_align2 = COPY %4.sub2_sub3
|
||||
%other_use2:vreg_64 = COPY %4.sub1_sub2
|
||||
%6:areg_64 = COPY %4.sub1_sub2
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2949129 /* reguse:AReg_64 */, %6:areg_64
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_64, %6:areg_64
|
||||
GLOBAL_STORE_DWORDX2 %0, %other_use1, 0, 0, implicit $exec :: (store (s64), addrspace 1)
|
||||
SI_RETURN
|
||||
...
|
||||
@@ -313,7 +313,7 @@ body: |
|
||||
; CHECK-NEXT: %other_use1:vreg_64_align2 = COPY [[V_MFMA_F64_4X4X4F64_e64_]].sub2_sub3
|
||||
; CHECK-NEXT: dead %other_use2:vreg_64 = COPY [[V_MFMA_F64_4X4X4F64_e64_]].sub1_sub2
|
||||
; CHECK-NEXT: [[COPY3:%[0-9]+]]:areg_64 = COPY [[V_MFMA_F64_4X4X4F64_e64_]].sub1_sub2
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2949129 /* reguse:AReg_64 */, [[COPY3]]
|
||||
; CHECK-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_64, [[COPY3]]
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORDX2 [[COPY]], %other_use1, 0, 0, implicit $exec :: (store (s64), addrspace 1)
|
||||
; CHECK-NEXT: SI_RETURN
|
||||
%0:vreg_64_align2 = COPY $vgpr4_vgpr5
|
||||
@@ -327,7 +327,7 @@ body: |
|
||||
%other_use1:vreg_64_align2 = COPY %4.sub2_sub3
|
||||
%other_use2:vreg_64 = COPY %4.sub1_sub2
|
||||
%6:areg_64 = COPY %4.sub1_sub2
|
||||
INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2949129 /* reguse:AReg_64 */, %6:areg_64
|
||||
INLINEASM &"; use $0", sideeffect attdialect, reguse:AReg_64, %6:areg_64
|
||||
GLOBAL_STORE_DWORDX2 %0, %other_use1, 0, 0, implicit $exec :: (store (s64), addrspace 1)
|
||||
SI_RETURN
|
||||
...
|
||||
|
||||
@@ -37,7 +37,7 @@ body: |
|
||||
; CHECK-NEXT: dead [[DS_READ_B128_gfx9_:%[0-9]+]]:vreg_128 = DS_READ_B128_gfx9 [[V_ADD_U32_e32_]], 0, 0, implicit $exec
|
||||
; CHECK-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: undef [[COPY2:%[0-9]+]].sub1:vreg_512 = COPY [[COPY]].sub1
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def dead [[COPY1]], 1114122 /* regdef:VGPR_32 */, def dead [[COPY]].sub1, 1114121 /* reguse:VGPR_32 */, [[COPY1]], 1114121 /* reguse:VGPR_32 */, [[COPY]].sub1
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def dead [[COPY1]], regdef:VGPR_32, def dead [[COPY]].sub1, reguse:VGPR_32, [[COPY1]], reguse:VGPR_32, [[COPY]].sub1
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub0:vreg_512 = COPY [[COPY]].sub0
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub3:vreg_512 = COPY [[COPY]].sub3
|
||||
; CHECK-NEXT: [[COPY2:%[0-9]+]].sub2:vreg_512 = COPY undef [[V_MOV_B32_e32_1]]
|
||||
@@ -63,7 +63,7 @@ body: |
|
||||
undef %11.sub0:vreg_512 = COPY %4.sub0
|
||||
%12:vgpr_32 = COPY %4.sub0
|
||||
%11.sub1:vreg_512 = COPY %4.sub1
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def dead %12:vgpr_32, 1114122 /* regdef:VGPR_32 */, def dead %4.sub1:vreg_512, 1114121 /* reguse:VGPR_32 */, %12:vgpr_32, 1114121 /* reguse:VGPR_32 */, %4.sub1:vreg_512
|
||||
INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def dead %12:vgpr_32, regdef:VGPR_32, def dead %4.sub1:vreg_512, reguse:VGPR_32, %12:vgpr_32, reguse:VGPR_32, %4.sub1:vreg_512
|
||||
%11.sub2:vreg_512 = COPY undef %1
|
||||
%11.sub3:vreg_512 = COPY %4.sub3
|
||||
%11.sub5:vreg_512 = COPY undef %1
|
||||
|
||||
@@ -40,18 +40,18 @@ body: |
|
||||
; CHECK-NEXT: bb.1:
|
||||
; CHECK-NEXT: successors: %bb.1(0x80000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def dead %11
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def dead %11
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORD undef %12:vreg_64, [[BUFFER_LOAD_DWORD_OFFEN]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
|
||||
; CHECK-NEXT: [[V_MOV_B32_e32_3:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
; CHECK-NEXT: [[V_MOV_B32_e32_4:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
; CHECK-NEXT: [[DS_READ_B64_gfx9_:%[0-9]+]]:vreg_64 = DS_READ_B64_gfx9 undef %14:vgpr_32, 0, 0, implicit $exec :: (load (s64), addrspace 3)
|
||||
; CHECK-NEXT: INLINEASM &"def $0 $1", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def %15, 1114122 /* regdef:VGPR_32 */, def %16
|
||||
; CHECK-NEXT: INLINEASM &"def $0 $1", sideeffect attdialect, regdef:VGPR_32, def %15, regdef:VGPR_32, def %16
|
||||
; CHECK-NEXT: [[DS_READ_B32_gfx9_:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 [[V_MOV_B32_e32_1]], 0, 0, implicit $exec
|
||||
; CHECK-NEXT: [[DS_READ_B32_gfx9_1:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 [[V_MOV_B32_e32_2]], 0, 0, implicit $exec
|
||||
; CHECK-NEXT: [[DS_READ_B32_gfx9_2:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 undef %20:vgpr_32, 0, 0, implicit $exec
|
||||
; CHECK-NEXT: INLINEASM &"def $0 $1", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def %21, 1114122 /* regdef:VGPR_32 */, def %22
|
||||
; CHECK-NEXT: INLINEASM &"def $0 $1", sideeffect attdialect, regdef:VGPR_32, def %21, regdef:VGPR_32, def %22
|
||||
; CHECK-NEXT: [[DS_READ_B32_gfx9_3:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 [[V_MOV_B32_e32_2]], 0, 0, implicit $exec
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def dead [[V_MOV_B32_e32_3]], 1114122 /* regdef:VGPR_32 */, def dead [[V_MOV_B32_e32_4]], 1114121 /* reguse:VGPR_32 */, [[DS_READ_B64_gfx9_]].sub0, 2147483657 /* reguse tiedto:$0 */, [[V_MOV_B32_e32_3]](tied-def 3), 2147549193 /* reguse tiedto:$1 */, [[V_MOV_B32_e32_4]](tied-def 5), 1114121 /* reguse:VGPR_32 */, %15, 1114121 /* reguse:VGPR_32 */, %16, 1114121 /* reguse:VGPR_32 */, [[DS_READ_B32_gfx9_1]], 1114121 /* reguse:VGPR_32 */, [[DS_READ_B32_gfx9_]], 1114121 /* reguse:VGPR_32 */, [[DS_READ_B32_gfx9_3]], 1114121 /* reguse:VGPR_32 */, [[DS_READ_B32_gfx9_2]]
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def dead [[V_MOV_B32_e32_3]], regdef:VGPR_32, def dead [[V_MOV_B32_e32_4]], reguse:VGPR_32, [[DS_READ_B64_gfx9_]].sub0, reguse tiedto:$0, [[V_MOV_B32_e32_3]](tied-def 3), reguse tiedto:$1, [[V_MOV_B32_e32_4]](tied-def 5), reguse:VGPR_32, %15, reguse:VGPR_32, %16, reguse:VGPR_32, [[DS_READ_B32_gfx9_1]], reguse:VGPR_32, [[DS_READ_B32_gfx9_]], reguse:VGPR_32, [[DS_READ_B32_gfx9_3]], reguse:VGPR_32, [[DS_READ_B32_gfx9_2]]
|
||||
; CHECK-NEXT: [[V_MOV_B32_e32_:%[0-9]+]].sub1:vreg_64 = COPY [[V_MOV_B32_e32_1]]
|
||||
; CHECK-NEXT: DS_WRITE_B32_gfx9 undef %28:vgpr_32, %21, 0, 0, implicit $exec :: (store (s32), addrspace 3)
|
||||
; CHECK-NEXT: DS_WRITE_B32_gfx9 undef %29:vgpr_32, %22, 0, 0, implicit $exec :: (store (s32), addrspace 3)
|
||||
@@ -73,7 +73,7 @@ body: |
|
||||
; CHECK-NEXT: undef [[V_READFIRSTLANE_B32_:%[0-9]+]].sub0:sgpr_64 = V_READFIRSTLANE_B32 [[V_ADD_CO_U32_e64_]].sub0, implicit $exec
|
||||
; CHECK-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]].sub1:sgpr_64 = V_READFIRSTLANE_B32 [[V_ADDC_U32_e64_]].sub1, implicit $exec
|
||||
; CHECK-NEXT: [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[V_READFIRSTLANE_B32_]], 0, 0 :: (load (s32), addrspace 1)
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; CHECK-NEXT: [[DS_READ_B32_gfx9_4:%[0-9]+]]:vgpr_32 = DS_READ_B32_gfx9 undef %45:vgpr_32, 0, 0, implicit $exec :: (load (s32), addrspace 3)
|
||||
; CHECK-NEXT: GLOBAL_STORE_DWORD undef %46:vreg_64, [[DS_READ_B32_gfx9_4]], 0, 0, implicit $exec :: (store (s32), addrspace 1)
|
||||
; CHECK-NEXT: [[FLAT_LOAD_DWORD:%[0-9]+]].sub0:vreg_64 = COPY [[S_LOAD_DWORD_IMM]], implicit $exec
|
||||
@@ -94,21 +94,21 @@ body: |
|
||||
%10:vgpr_32 = IMPLICIT_DEF
|
||||
|
||||
bb.1:
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def %11:vgpr_32
|
||||
INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def %11:vgpr_32
|
||||
GLOBAL_STORE_DWORD undef %12:vreg_64, %1, 0, 0, implicit $exec :: (store (s32), addrspace 1)
|
||||
%13:vreg_64 = DS_READ_B64_gfx9 undef %14:vgpr_32, 0, 0, implicit $exec :: (load (s64), addrspace 3)
|
||||
INLINEASM &"def $0 $1", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def %15:vgpr_32, 1114122 /* regdef:VGPR_32 */, def %16:vgpr_32
|
||||
INLINEASM &"def $0 $1", sideeffect attdialect, regdef:VGPR_32, def %15:vgpr_32, regdef:VGPR_32, def %16:vgpr_32
|
||||
%17:vgpr_32 = DS_READ_B32_gfx9 %6, 0, 0, implicit $exec
|
||||
%18:vgpr_32 = DS_READ_B32_gfx9 %7, 0, 0, implicit $exec
|
||||
%19:vgpr_32 = DS_READ_B32_gfx9 undef %20:vgpr_32, 0, 0, implicit $exec
|
||||
INLINEASM &"def $0 $1", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def %21:vgpr_32, 1114122 /* regdef:VGPR_32 */, def %22:vgpr_32
|
||||
INLINEASM &"def $0 $1", sideeffect attdialect, regdef:VGPR_32, def %21:vgpr_32, regdef:VGPR_32, def %22:vgpr_32
|
||||
%23:vgpr_32 = DS_READ_B32_gfx9 %7, 0, 0, implicit $exec
|
||||
%24:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
%5.sub1:vreg_64 = COPY %6
|
||||
%25:vgpr_32 = V_ADD_U32_e32 1, %10, implicit $exec
|
||||
%26:sreg_64_xexec = V_CMP_GT_U32_e64 64, %25, implicit $exec
|
||||
%27:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def dead %24:vgpr_32, 1114122 /* regdef:VGPR_32 */, def dead %27:vgpr_32, 1114121 /* reguse:VGPR_32 */, %13.sub0:vreg_64, 2147483657 /* reguse tiedto:$0 */, %24:vgpr_32(tied-def 3), 2147549193 /* reguse tiedto:$1 */, %27:vgpr_32(tied-def 5), 1114121 /* reguse:VGPR_32 */, %15, 1114121 /* reguse:VGPR_32 */, %16, 1114121 /* reguse:VGPR_32 */, %18, 1114121 /* reguse:VGPR_32 */, %17, 1114121 /* reguse:VGPR_32 */, %23, 1114121 /* reguse:VGPR_32 */, %19
|
||||
INLINEASM &"", sideeffect attdialect, regdef:VGPR_32, def dead %24:vgpr_32, regdef:VGPR_32, def dead %27:vgpr_32, reguse:VGPR_32, %13.sub0:vreg_64, reguse tiedto:$0, %24:vgpr_32(tied-def 3), reguse tiedto:$1, %27:vgpr_32(tied-def 5), reguse:VGPR_32, %15, reguse:VGPR_32, %16, reguse:VGPR_32, %18, reguse:VGPR_32, %17, reguse:VGPR_32, %23, reguse:VGPR_32, %19
|
||||
DS_WRITE_B32_gfx9 undef %28:vgpr_32, %21, 0, 0, implicit $exec :: (store (s32), addrspace 3)
|
||||
DS_WRITE_B32_gfx9 undef %29:vgpr_32, %22, 0, 0, implicit $exec :: (store (s32), addrspace 3)
|
||||
DS_WRITE_B64_gfx9 undef %30:vgpr_32, %5, 0, 0, implicit $exec :: (store (s64), addrspace 3)
|
||||
@@ -127,7 +127,7 @@ body: |
|
||||
undef %42.sub0:sgpr_64 = V_READFIRSTLANE_B32 %38.sub0, implicit $exec
|
||||
%42.sub1:sgpr_64 = V_READFIRSTLANE_B32 %40.sub1, implicit $exec
|
||||
%43:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM %42, 0, 0 :: (load (s32), addrspace 1)
|
||||
INLINEASM &"", 1
|
||||
INLINEASM &"", sideeffect attdialect
|
||||
%44:vgpr_32 = DS_READ_B32_gfx9 undef %45:vgpr_32, 0, 0, implicit $exec :: (load (s32), addrspace 3)
|
||||
GLOBAL_STORE_DWORD undef %46:vreg_64, %44, 0, 0, implicit $exec :: (store (s32), addrspace 1)
|
||||
%31.sub0:vreg_64 = COPY %43, implicit $exec
|
||||
|
||||
@@ -263,7 +263,7 @@ body: |
|
||||
; GFX10-NEXT: liveins: $sgpr4, $sgpr5, $sgpr8, $vgpr0, $vgpr1
|
||||
; GFX10-NEXT: {{ $}}
|
||||
; GFX10-NEXT: $exec_lo = S_OR_B32 $exec_lo, killed renamable $sgpr5, implicit-def $scc
|
||||
; GFX10-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit killed renamable $vgpr1
|
||||
; GFX10-NEXT: INLINEASM &"", sideeffect attdialect, implicit killed renamable $vgpr1
|
||||
; GFX10-NEXT: S_BRANCH %bb.3
|
||||
; GFX10-NEXT: {{ $}}
|
||||
; GFX10-NEXT: bb.7:
|
||||
@@ -325,7 +325,7 @@ body: |
|
||||
liveins: $sgpr4, $sgpr5, $sgpr8, $vgpr0, $vgpr1
|
||||
|
||||
$exec_lo = S_OR_B32 $exec_lo, killed renamable $sgpr5, implicit-def $scc
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, implicit killed renamable $vgpr1
|
||||
INLINEASM &"", sideeffect attdialect, implicit killed renamable $vgpr1
|
||||
S_BRANCH %bb.2
|
||||
|
||||
bb.6:
|
||||
@@ -386,7 +386,7 @@ body: |
|
||||
; GFX10-NEXT: renamable $sgpr6 = S_ADD_I32 renamable $sgpr8, renamable $sgpr9, implicit-def dead $scc
|
||||
; GFX10-NEXT: renamable $sgpr5 = S_AND_B32 $exec_lo, killed renamable $sgpr5, implicit-def $scc
|
||||
; GFX10-NEXT: renamable $sgpr5 = S_OR_B32 killed renamable $sgpr5, renamable $sgpr4, implicit-def $scc
|
||||
; GFX10-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GFX10-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GFX10-NEXT: $exec_lo = S_ANDN2_B32 $exec_lo, renamable $sgpr5, implicit-def $scc
|
||||
; GFX10-NEXT: S_CBRANCH_EXECNZ %bb.3, implicit $exec
|
||||
; GFX10-NEXT: S_BRANCH %bb.6
|
||||
@@ -396,7 +396,7 @@ body: |
|
||||
; GFX10-NEXT: liveins: $sgpr4, $sgpr5, $sgpr6, $sgpr8, $sgpr9
|
||||
; GFX10-NEXT: {{ $}}
|
||||
; GFX10-NEXT: $exec_lo = S_OR_B32 $exec_lo, killed renamable $sgpr5, implicit-def $scc
|
||||
; GFX10-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit killed renamable $sgpr6
|
||||
; GFX10-NEXT: INLINEASM &"", sideeffect attdialect, implicit killed renamable $sgpr6
|
||||
; GFX10-NEXT: S_BRANCH %bb.3
|
||||
; GFX10-NEXT: {{ $}}
|
||||
; GFX10-NEXT: bb.7:
|
||||
@@ -450,7 +450,7 @@ body: |
|
||||
renamable $sgpr6 = S_ADD_I32 renamable $sgpr8, renamable $sgpr9, implicit-def dead $scc
|
||||
renamable $sgpr5 = S_AND_B32 $exec_lo, killed renamable $sgpr5, implicit-def $scc
|
||||
renamable $sgpr5 = S_OR_B32 killed renamable $sgpr5, renamable $sgpr4, implicit-def $scc
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
INLINEASM &"", sideeffect attdialect
|
||||
$exec_lo = S_ANDN2_B32 $exec_lo, renamable $sgpr5, implicit-def $scc
|
||||
S_CBRANCH_EXECNZ %bb.2, implicit $exec
|
||||
S_BRANCH %bb.5
|
||||
@@ -459,7 +459,7 @@ body: |
|
||||
liveins: $sgpr4, $sgpr5, $sgpr6, $sgpr8, $sgpr9
|
||||
|
||||
$exec_lo = S_OR_B32 $exec_lo, killed renamable $sgpr5, implicit-def $scc
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, implicit killed renamable $sgpr6
|
||||
INLINEASM &"", sideeffect attdialect, implicit killed renamable $sgpr6
|
||||
S_BRANCH %bb.2
|
||||
|
||||
bb.6:
|
||||
|
||||
@@ -85,7 +85,7 @@ body: |
|
||||
; GCN-NEXT: [[DEF64:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
|
||||
; GCN-NEXT: [[DEF65:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
|
||||
; GCN-NEXT: [[DEF66:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]], implicit [[DEF5]], implicit [[DEF6]], implicit [[DEF7]], implicit [[DEF8]], implicit [[DEF9]], implicit [[DEF10]], implicit [[DEF11]], implicit [[DEF12]], implicit [[DEF13]], implicit [[DEF14]], implicit [[DEF15]], implicit [[DEF16]], implicit [[DEF17]], implicit [[DEF18]], implicit [[DEF19]], implicit [[DEF20]], implicit [[DEF21]], implicit [[DEF22]], implicit [[DEF23]], implicit [[DEF24]], implicit [[DEF25]], implicit [[DEF26]], implicit [[DEF27]], implicit [[DEF28]], implicit [[DEF29]], implicit [[DEF30]], implicit [[DEF31]], implicit [[DEF32]], implicit [[DEF33]], implicit [[DEF34]], implicit [[DEF35]], implicit [[DEF36]], implicit [[DEF37]], implicit [[DEF38]], implicit [[DEF39]], implicit [[DEF40]], implicit [[DEF41]], implicit [[DEF42]], implicit [[DEF43]], implicit [[DEF44]], implicit [[DEF45]], implicit [[DEF46]], implicit [[DEF47]], implicit [[DEF48]], implicit [[DEF49]], implicit [[DEF50]], implicit [[DEF51]], implicit [[DEF52]], implicit [[DEF53]], implicit [[DEF54]], implicit [[DEF55]], implicit [[DEF56]], implicit [[DEF57]], implicit [[DEF58]], implicit [[DEF59]], implicit [[DEF60]], implicit [[DEF61]], implicit [[DEF62]], implicit [[DEF63]], implicit [[DEF64]], implicit [[DEF65]], implicit [[DEF66]]
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF]], implicit [[DEF1]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]], implicit [[DEF5]], implicit [[DEF6]], implicit [[DEF7]], implicit [[DEF8]], implicit [[DEF9]], implicit [[DEF10]], implicit [[DEF11]], implicit [[DEF12]], implicit [[DEF13]], implicit [[DEF14]], implicit [[DEF15]], implicit [[DEF16]], implicit [[DEF17]], implicit [[DEF18]], implicit [[DEF19]], implicit [[DEF20]], implicit [[DEF21]], implicit [[DEF22]], implicit [[DEF23]], implicit [[DEF24]], implicit [[DEF25]], implicit [[DEF26]], implicit [[DEF27]], implicit [[DEF28]], implicit [[DEF29]], implicit [[DEF30]], implicit [[DEF31]], implicit [[DEF32]], implicit [[DEF33]], implicit [[DEF34]], implicit [[DEF35]], implicit [[DEF36]], implicit [[DEF37]], implicit [[DEF38]], implicit [[DEF39]], implicit [[DEF40]], implicit [[DEF41]], implicit [[DEF42]], implicit [[DEF43]], implicit [[DEF44]], implicit [[DEF45]], implicit [[DEF46]], implicit [[DEF47]], implicit [[DEF48]], implicit [[DEF49]], implicit [[DEF50]], implicit [[DEF51]], implicit [[DEF52]], implicit [[DEF53]], implicit [[DEF54]], implicit [[DEF55]], implicit [[DEF56]], implicit [[DEF57]], implicit [[DEF58]], implicit [[DEF59]], implicit [[DEF60]], implicit [[DEF61]], implicit [[DEF62]], implicit [[DEF63]], implicit [[DEF64]], implicit [[DEF65]], implicit [[DEF66]]
|
||||
; GCN-NEXT: KILL [[DEF]]
|
||||
; GCN-NEXT: KILL [[DEF1]]
|
||||
; GCN-NEXT: KILL [[DEF10]]
|
||||
@@ -98,7 +98,7 @@ body: |
|
||||
; GCN-NEXT: KILL [[DEF17]]
|
||||
; GCN-NEXT: [[DEF68:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
|
||||
; GCN-NEXT: [[DEF69:%[0-9]+]]:sgpr_128 = IMPLICIT_DEF
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF69]], implicit [[DEF23]], implicit [[DEF24]], implicit [[DEF25]], implicit [[DEF26]], implicit [[DEF27]], implicit [[DEF28]]
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF69]], implicit [[DEF23]], implicit [[DEF24]], implicit [[DEF25]], implicit [[DEF26]], implicit [[DEF27]], implicit [[DEF28]]
|
||||
; GCN-NEXT: KILL [[DEF2]]
|
||||
; GCN-NEXT: KILL [[DEF3]]
|
||||
; GCN-NEXT: KILL [[DEF4]]
|
||||
@@ -110,7 +110,7 @@ body: |
|
||||
; GCN-NEXT: KILL [[DEF18]]
|
||||
; GCN-NEXT: KILL [[DEF19]]
|
||||
; GCN-NEXT: [[DEF70:%[0-9]+]]:sgpr_128 = IMPLICIT_DEF
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, implicit [[DEF70]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]], implicit [[DEF5]], implicit [[DEF6]], implicit [[DEF7]], implicit [[DEF8]], implicit [[DEF9]]
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect, implicit [[DEF70]], implicit [[DEF2]], implicit [[DEF3]], implicit [[DEF4]], implicit [[DEF5]], implicit [[DEF6]], implicit [[DEF7]], implicit [[DEF8]], implicit [[DEF9]]
|
||||
; GCN-NEXT: KILL [[DEF69]], implicit-def %70, implicit-def %71, implicit-def %72, implicit-def %73, implicit-def %74, implicit-def %75, implicit-def %76, implicit-def %77
|
||||
; GCN-NEXT: [[DEF71:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
|
||||
; GCN-NEXT: [[DEF72:%[0-9]+]]:vgpr_32 = IMPLICIT_DEF
|
||||
|
||||
@@ -12,10 +12,10 @@ define amdgpu_kernel void @test_spill_av_class(<4 x i32> %arg) #0 {
|
||||
; GCN-NEXT: [[AV_MOV_:%[0-9]+]]:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 1, implicit $exec
|
||||
; GCN-NEXT: [[AV_MOV_1:%[0-9]+]]:vgpr_32 = AV_MOV_B32_IMM_PSEUDO 2, implicit $exec
|
||||
; GCN-NEXT: [[V_MFMA_I32_4X4X4I8_e64_:%[0-9]+]]:areg_128 = V_MFMA_I32_4X4X4I8_e64 [[AV_MOV_]], [[AV_MOV_1]], [[COPY]], 0, 0, 0, implicit $mode, implicit $exec
|
||||
; GCN-NEXT: INLINEASM &"; def $0", 1 /* sideeffect attdialect */, 1114122 /* regdef:VGPR_32 */, def undef %14.sub0
|
||||
; GCN-NEXT: INLINEASM &"; def $0", sideeffect attdialect, regdef:VGPR_32, def undef %14.sub0
|
||||
; GCN-NEXT: [[COPY1:%[0-9]+]]:vreg_128 = COPY [[V_MFMA_I32_4X4X4I8_e64_]]
|
||||
; GCN-NEXT: GLOBAL_STORE_DWORDX4 undef %24:vreg_64, [[COPY1]], 0, 0, implicit $exec :: (volatile store (s128) into `ptr addrspace(1) poison`, addrspace 1)
|
||||
; GCN-NEXT: INLINEASM &"; use $0", 1 /* sideeffect attdialect */, 2359305 /* reguse:VReg_64 */, %14
|
||||
; GCN-NEXT: INLINEASM &"; use $0", sideeffect attdialect, reguse:VReg_64, %14
|
||||
; GCN-NEXT: S_ENDPGM 0
|
||||
%v0 = call i32 asm sideeffect "; def $0", "=v"()
|
||||
%tmp = insertelement <2 x i32> poison, i32 %v0, i32 0
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
|
||||
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -print-symbolic-inline-asm-ops -o - %s | FileCheck %s
|
||||
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o - %s | FileCheck %s
|
||||
|
||||
# Deciding which lanes are killed needs to account for other defs in the
|
||||
# instruction.
|
||||
|
||||
@@ -109,9 +109,9 @@ body: |
|
||||
bb.0:
|
||||
|
||||
; CHECK-LABEL: name: fold_inlineasm_def
|
||||
; CHECK: INLINEASM &"s_waitcnt vmcnt($0)", 41 /* sideeffect mayload isconvergent attdialect */, 13 /* imm */, 0
|
||||
; CHECK: INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload isconvergent attdialect, imm, 0
|
||||
; CHECK-NEXT: S_ENDPGM 0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", 41 /* sideeffect mayload isconvergent attdialect */, 13 /* imm */, 0
|
||||
INLINEASM &"s_waitcnt vmcnt($0)", sideeffect mayload isconvergent attdialect, imm, 0
|
||||
S_ENDPGM 0
|
||||
|
||||
...
|
||||
|
||||
@@ -137,7 +137,7 @@ body: |
|
||||
# instructions to fix vccz.
|
||||
|
||||
# CHECK-LABEL: name: inlineasm_def_vcc_lo
|
||||
# CHECK: INLINEASM &"; def vcc_lo", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vcc_lo
|
||||
# CHECK: INLINEASM &"; def vcc_lo", sideeffect attdialect, regdef, implicit-def $vcc_lo
|
||||
# SI: $vcc = S_MOV_B64 $vcc
|
||||
# GFX9: $vcc = S_MOV_B64 $vcc
|
||||
# CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
|
||||
@@ -155,7 +155,7 @@ body: |
|
||||
# inserted to fix vccz.
|
||||
|
||||
# CHECK-LABEL: name: inlineasm_def_vcc
|
||||
# CHECK: INLINEASM &"; def vcc", 1 /* sideeffect attdialect */, 10 /* regdef */, implicit-def $vcc
|
||||
# CHECK: INLINEASM &"; def vcc", sideeffect attdialect, regdef, implicit-def $vcc
|
||||
# CHECK-NEXT: S_CBRANCH_VCCNZ %bb.1, implicit killed $vcc
|
||||
|
||||
name: inlineasm_def_vcc
|
||||
|
||||
@@ -146,6 +146,6 @@ body: |
|
||||
# ; XCHECK: *** Bad machine code: Subtarget requires even aligned vector registers ***
|
||||
# ; XCHECK: *** Bad machine code: Subtarget requires even aligned vector registers ***
|
||||
# ; XCHECK: *** Bad machine code: Subtarget requires even aligned vector registers ***
|
||||
# INLINEASM &"; use $0 ", 1 /* sideeffect attdialect */, 9 /* reguse */, $vgpr1_vgpr2
|
||||
# INLINEASM &"; use $0 ", 1 /* sideeffect attdialect */, 9 /* reguse */, %4
|
||||
# INLINEASM &"; use $0 ", 1 /* sideeffect attdialect */, 9 /* reguse */, %5.sub1_sub2
|
||||
# INLINEASM &"; use $0 ", sideeffect attdialect, reguse, $vgpr1_vgpr2
|
||||
# INLINEASM &"; use $0 ", sideeffect attdialect, reguse, %4
|
||||
# INLINEASM &"; use $0 ", sideeffect attdialect, reguse, %5.sub1_sub2
|
||||
|
||||
@@ -37,7 +37,7 @@ body: |
|
||||
; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr9, %stack.9, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.9, addrspace 5)
|
||||
; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr10, %stack.10, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.10, addrspace 5)
|
||||
; CHECK-NEXT: SI_SPILL_V32_SAVE $vgpr11, %stack.11, $sgpr32, 0, implicit $exec :: (store (s32) into %stack.11, addrspace 5)
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11
|
||||
; CHECK-NEXT: [[SI_SPILL_V32_RESTORE:%[0-9]+]]:vgpr_32 = SI_SPILL_V32_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: ("amdgpu-last-use" load (s32) from %stack.0, addrspace 5)
|
||||
; CHECK-NEXT: [[SI_SPILL_V32_RESTORE1:%[0-9]+]]:vgpr_32 = SI_SPILL_V32_RESTORE %stack.1, $sgpr32, 0, implicit $exec :: ("amdgpu-last-use" load (s32) from %stack.1, addrspace 5)
|
||||
; CHECK-NEXT: [[SI_SPILL_V32_RESTORE2:%[0-9]+]]:vgpr_32 = SI_SPILL_V32_RESTORE %stack.2, $sgpr32, 0, implicit $exec :: ("amdgpu-last-use" load (s32) from %stack.2, addrspace 5)
|
||||
@@ -63,7 +63,7 @@ body: |
|
||||
%9:vgpr_32 = COPY $vgpr9
|
||||
%10:vgpr_32 = COPY $vgpr10
|
||||
%11:vgpr_32 = COPY $vgpr11
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11
|
||||
S_ENDPGM 0, implicit %0, implicit %1, implicit %2, implicit %3, implicit %4, implicit %5, implicit %6, implicit %7, implicit %8, implicit %9, implicit %10, implicit %11
|
||||
...
|
||||
|
||||
@@ -80,11 +80,11 @@ body: |
|
||||
; CHECK: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: SI_SPILL_V384_SAVE $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11, %stack.0, $sgpr32, 0, implicit $exec :: (store (s384) into %stack.0, align 4, addrspace 5)
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11
|
||||
; CHECK-NEXT: [[SI_SPILL_V384_RESTORE:%[0-9]+]]:vreg_384 = SI_SPILL_V384_RESTORE %stack.0, $sgpr32, 0, implicit $exec :: ("amdgpu-last-use" load (s384) from %stack.0, align 4, addrspace 5)
|
||||
; CHECK-NEXT: S_ENDPGM 0, implicit [[SI_SPILL_V384_RESTORE]]
|
||||
%0:vreg_384 = COPY $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11
|
||||
S_ENDPGM 0, implicit %0
|
||||
...
|
||||
|
||||
|
||||
@@ -21,7 +21,7 @@ body: |
|
||||
; GCN-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
||||
; GCN-NEXT: renamable $sgpr4_sgpr5 = V_CMP_GT_U32_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GCN-NEXT: renamable $sgpr6_sgpr7 = V_CMP_LT_U32_e64 [[COPY]], [[COPY1]], implicit $exec
|
||||
; GCN-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; GCN-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr4_sgpr5, $exec, implicit-def $scc
|
||||
; GCN-NEXT: S_NOP 0, implicit killed renamable $sgpr4_sgpr5
|
||||
; GCN-NEXT: renamable $sgpr4_sgpr5 = S_AND_B64 killed renamable $sgpr6_sgpr7, $exec, implicit-def $scc
|
||||
@@ -35,7 +35,7 @@ body: |
|
||||
%0:sreg_64 = V_CMP_GT_U32_e64 %10, %11, implicit $exec
|
||||
%1:sreg_64 = V_CMP_LT_U32_e64 %10, %11, implicit $exec
|
||||
%2:sreg_64 = V_CMP_EQ_U32_e64 %10, %11, implicit $exec
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
INLINEASM &"", sideeffect attdialect
|
||||
%3:sreg_64 = S_AND_B64 %0, $exec, implicit-def $scc
|
||||
S_NOP 0, implicit %3
|
||||
%4:sreg_64 = S_AND_B64 %1, $exec, implicit-def $scc
|
||||
|
||||
@@ -36,7 +36,7 @@ body: |
|
||||
; CHECK-NEXT: t2B %bb.1, 14 /* CC::al */, $noreg
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1:
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; CHECK-NEXT: $sp = t2LDMIA_RET $sp, 14 /* CC::al */, $noreg, def $r4, def $pc
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.2.l_yes (ir-block-address-taken %ir-block.l_yes):
|
||||
@@ -72,7 +72,7 @@ body: |
|
||||
t2B %bb.3, 14, $noreg
|
||||
|
||||
bb.3:
|
||||
INLINEASM &"", 1
|
||||
INLINEASM &"", sideeffect attdialect
|
||||
$sp = t2LDMIA_RET $sp, 14, $noreg, def $r4, def $pc
|
||||
|
||||
bb.4.l_yes (ir-block-address-taken %ir-block.l_yes):
|
||||
|
||||
@@ -86,7 +86,7 @@ body: |
|
||||
; CHECK-NEXT: TSTri killed renamable $r0, 1, 14 /* CC::al */, $noreg, implicit-def $cpsr
|
||||
; CHECK-NEXT: renamable $r0 = MOVi 0, 1 /* CC::ne */, $cpsr, $noreg
|
||||
; CHECK-NEXT: renamable $r0 = MOVi 1, 0 /* CC::eq */, killed $cpsr, $noreg, implicit killed $r0
|
||||
; CHECK-NEXT: INLINEASM_BR &".word b, ${1:l}, ${0:c}\0A\09", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 0, 13 /* imm */, %bb.1
|
||||
; CHECK-NEXT: INLINEASM_BR &".word b, ${1:l}, ${0:c}\0A\09", sideeffect mayload attdialect, imm, 0, imm, %bb.1
|
||||
; CHECK-NEXT: B %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1.if.end.sink.split (machine-block-address-taken, inlineasm-br-indirect-target):
|
||||
@@ -109,7 +109,7 @@ body: |
|
||||
successors: %bb.3(0x80000000), %bb.2(0x00000000)
|
||||
|
||||
renamable $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
|
||||
INLINEASM_BR &".word b, ${1:l}, ${0:c}\0A\09", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 0, 13 /* imm */, %bb.2
|
||||
INLINEASM_BR &".word b, ${1:l}, ${0:c}\0A\09", sideeffect mayload attdialect, imm, 0, imm, %bb.2
|
||||
B %bb.3
|
||||
|
||||
bb.2.if.end.sink.split (machine-block-address-taken, inlineasm-br-indirect-target):
|
||||
@@ -126,7 +126,7 @@ body: |
|
||||
successors: %bb.3(0x80000000), %bb.2(0x00000000)
|
||||
|
||||
renamable $r0 = MOVi 0, 14 /* CC::al */, $noreg, $noreg
|
||||
INLINEASM_BR &".word b, ${1:l}, ${0:c}\0A\09", 9 /* sideeffect mayload attdialect */, 13 /* imm */, 0, 13 /* imm */, %bb.2
|
||||
INLINEASM_BR &".word b, ${1:l}, ${0:c}\0A\09", sideeffect mayload attdialect, imm, 0, imm, %bb.2
|
||||
B %bb.3
|
||||
|
||||
...
|
||||
|
||||
@@ -42,7 +42,7 @@ body: |
|
||||
; CHECK-NEXT: $lr, $sp = t2LDR_POST $sp, 8, 14 /* CC::al */, $noreg
|
||||
; CHECK-NEXT: tCMPi8 killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
|
||||
; CHECK-NEXT: t2STRDi8 killed $r2, killed $r3, $sp, 16, 14 /* CC::al */, $noreg
|
||||
; CHECK-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */, 327689 /* reguse:GPR */, killed renamable $lr
|
||||
; CHECK-NEXT: INLINEASM &"", sideeffect attdialect, reguse:GPR, killed renamable $lr
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.1:
|
||||
; CHECK-NEXT: successors: %bb.2(0x80000000)
|
||||
@@ -58,7 +58,7 @@ body: |
|
||||
|
||||
tCMPi8 killed renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
|
||||
t2STRDi8 killed $r2, killed $r3, $sp, 16, 14 /* CC::al */, $noreg
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 327689 /* reguse:GPR */, killed renamable $lr
|
||||
INLINEASM &"", sideeffect attdialect, reguse:GPR, killed renamable $lr
|
||||
|
||||
bb.1:
|
||||
liveins: $r4
|
||||
|
||||
@@ -20,20 +20,20 @@ tracksRegLiveness: true
|
||||
body: |
|
||||
; CHECK-LABEL: name: dont_outline_asm
|
||||
; CHECK: bb.0:
|
||||
; CHECK: INLINEASM &"movs r0, #42", 1
|
||||
; CHECK: INLINEASM &"movs r0, #42", sideeffect attdialect
|
||||
; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0
|
||||
; CHECK: bb.1:
|
||||
; CHECK: INLINEASM &"movs r0, #42", 1
|
||||
; CHECK: INLINEASM &"movs r0, #42", sideeffect attdialect
|
||||
; CHECK: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_0
|
||||
bb.0:
|
||||
INLINEASM &"movs r0, #42", 1
|
||||
INLINEASM &"movs r0, #42", sideeffect attdialect
|
||||
$r0, dead $cpsr = tMOVi8 1, 14, $noreg
|
||||
$r1, dead $cpsr = tMOVi8 1, 14, $noreg
|
||||
$r2, dead $cpsr = tMOVi8 1, 14, $noreg
|
||||
$r3, dead $cpsr = tMOVi8 1, 14, $noreg
|
||||
tBL 14, $noreg, @z
|
||||
bb.1:
|
||||
INLINEASM &"movs r0, #42", 1
|
||||
INLINEASM &"movs r0, #42", sideeffect attdialect
|
||||
$r0, dead $cpsr = tMOVi8 1, 14, $noreg
|
||||
$r1, dead $cpsr = tMOVi8 1, 14, $noreg
|
||||
$r2, dead $cpsr = tMOVi8 1, 14, $noreg
|
||||
|
||||
@@ -18,14 +18,14 @@ body: |
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: renamable $fcc0 = FCMP_CLT_D renamable $f1_64, renamable $f0_64
|
||||
; CHECK-NEXT: PseudoST_CFR $fcc0, %stack.0, 0 :: (store (s64) into %stack.0)
|
||||
; CHECK-NEXT: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $fcc0
|
||||
; CHECK-NEXT: INLINEASM &nop, sideeffect attdialect, clobber, implicit-def dead early-clobber $fcc0
|
||||
; CHECK-NEXT: $fcc0 = PseudoLD_CFR %stack.0, 0 :: (load (s64) from %stack.0)
|
||||
; CHECK-NEXT: $r4 = COPY killed renamable $fcc0
|
||||
; CHECK-NEXT: PseudoRET implicit killed $r4
|
||||
%1:fpr64 = COPY $f1_64
|
||||
%0:fpr64 = COPY $f0_64
|
||||
%2:cfr = FCMP_CLT_D %1, %0
|
||||
INLINEASM &"nop", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $fcc0
|
||||
INLINEASM &"nop", sideeffect attdialect, clobber, implicit-def dead early-clobber $fcc0
|
||||
$r4 = COPY %2
|
||||
PseudoRET implicit killed $r4
|
||||
|
||||
|
||||
@@ -7,5 +7,5 @@
|
||||
name: foo
|
||||
body: |
|
||||
bb.0:
|
||||
INLINEASM &"", 0 /* attdialect */, mem:badmem
|
||||
INLINEASM &"", attdialect, mem:badmem
|
||||
...
|
||||
|
||||
@@ -7,5 +7,5 @@
|
||||
name: foo
|
||||
body: |
|
||||
bb.0:
|
||||
INLINEASM &"", 0 /* attdialect */, regdef:badreg
|
||||
INLINEASM &"", attdialect, regdef:badreg
|
||||
...
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
# RUN: llc -run-pass=none -print-symbolic-inline-asm-ops -o - %s | FileCheck --match-full-lines %s
|
||||
# RUN: llc -run-pass=none -o - %s | FileCheck --match-full-lines %s
|
||||
|
||||
---
|
||||
name: test_attdialect
|
||||
|
||||
@@ -7,5 +7,5 @@
|
||||
name: foo
|
||||
body: |
|
||||
bb.0:
|
||||
INLINEASM &"", 0 /* attdialect */, regdef:123
|
||||
INLINEASM &"", attdialect, regdef:123
|
||||
...
|
||||
|
||||
@@ -8,5 +8,5 @@
|
||||
name: foo
|
||||
body: |
|
||||
bb.0:
|
||||
INLINEASM &"", 0 /* attdialect */, regdef:GR32, reguse tiedto:$abc
|
||||
INLINEASM &"", attdialect, regdef:GR32, reguse tiedto:$abc
|
||||
...
|
||||
|
||||
@@ -8,5 +8,5 @@
|
||||
name: foo
|
||||
body: |
|
||||
bb.0:
|
||||
INLINEASM &"", 0 /* attdialect */, regdef:GR32, reguse tiedto 0
|
||||
INLINEASM &"", attdialect, regdef:GR32, reguse tiedto 0
|
||||
...
|
||||
|
||||
@@ -8,5 +8,5 @@
|
||||
name: foo
|
||||
body: |
|
||||
bb.0:
|
||||
INLINEASM &"", 0 /* attdialect */, regdef:GR32, reguse tiedto:0
|
||||
INLINEASM &"", attdialect, regdef:GR32, reguse tiedto:0
|
||||
...
|
||||
|
||||
@@ -35,7 +35,7 @@ body: |
|
||||
CFI_INSTRUCTION def_cfa_offset 16
|
||||
$ecx = COPY $edi
|
||||
$ecx = ADD32rr killed $ecx, killed $esi, implicit-def dead $eflags
|
||||
; CHECK: INLINEASM &nop, 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $ax, 12 /* clobber */, implicit-def dead early-clobber $di
|
||||
; CHECK: INLINEASM &nop, sideeffect attdialect, clobber, implicit-def dead early-clobber $ax, clobber, implicit-def dead early-clobber $di
|
||||
INLINEASM &nop, 1, 12, implicit-def dead early-clobber $ax, 12, implicit-def dead early-clobber $di
|
||||
$edi = COPY killed $ecx
|
||||
CALL64pcrel32 @foo, csr_64, implicit $rsp, implicit $edi, implicit-def $rsp
|
||||
|
||||
@@ -28,7 +28,7 @@ body: |
|
||||
liveins: $rdi, $rsi
|
||||
|
||||
; CHECK-LABEL: name: test
|
||||
; CHECK: INLINEASM &foo, 0 /* attdialect */, 4784138 /* regdef:GR64 */, def $rsi, 4784138 /* regdef:GR64 */, def dead $rdi,
|
||||
; CHECK: INLINEASM &foo, attdialect, regdef:GR64, def $rsi, regdef:GR64, def dead $rdi,
|
||||
INLINEASM &foo, 0, 4784138, def $rsi, 4784138, def dead $rdi, 2147549193, killed $rdi, 2147483657, killed $rsi, 12, implicit-def dead early-clobber $eflags
|
||||
$rax = MOV64rr killed $rsi
|
||||
RET64 killed $rax
|
||||
@@ -45,7 +45,7 @@ body: |
|
||||
|
||||
; Verify that the register ties are preserved.
|
||||
; CHECK-LABEL: name: test2
|
||||
; CHECK: INLINEASM &foo, 0 /* attdialect */, 4784138 /* regdef:GR64 */, def $rsi, 4784138 /* regdef:GR64 */, def dead $rdi, 2147549193 /* reguse tiedto:$1 */, killed $rdi(tied-def 5), 2147483657 /* reguse tiedto:$0 */, killed $rsi(tied-def 3), 12 /* clobber */, implicit-def dead early-clobber $eflags
|
||||
; CHECK: INLINEASM &foo, attdialect, regdef:GR64, def $rsi, regdef:GR64, def dead $rdi, reguse tiedto:$1, killed $rdi(tied-def 5), reguse tiedto:$0, killed $rsi(tied-def 3), clobber, implicit-def dead early-clobber $eflags
|
||||
INLINEASM &foo, 0, 4784138, def $rsi, 4784138, def dead $rdi, 2147549193, killed $rdi(tied-def 5), 2147483657, killed $rsi(tied-def 3), 12, implicit-def dead early-clobber $eflags
|
||||
$rax = MOV64rr killed $rsi
|
||||
RET64 killed $rax
|
||||
|
||||
@@ -84,7 +84,7 @@ machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0 (%ir-block.1):
|
||||
; CHECK-LABEL: name: input
|
||||
; CHECK: INLINEASM &"# $0", 8 /* mayload attdialect */, 262190 /* mem:m */, %fixed-stack.0, 1, $noreg, 0, $noreg, 12 /* clobber */, implicit-def dead early-clobber $ax, 12 /* clobber */, implicit-def dead early-clobber $cx, 12 /* clobber */, implicit-def dead early-clobber $dx, 12 /* clobber */, implicit-def dead early-clobber $si, 12 /* clobber */, implicit-def dead early-clobber $di, 12 /* clobber */, implicit-def dead early-clobber $bx, 12 /* clobber */, implicit-def dead early-clobber $bp :: (load (s32) from %fixed-stack.0, align 16)
|
||||
; CHECK: INLINEASM &"# $0", mayload attdialect, mem:m, %fixed-stack.0, 1, $noreg, 0, $noreg, clobber, implicit-def dead early-clobber $ax, clobber, implicit-def dead early-clobber $cx, clobber, implicit-def dead early-clobber $dx, clobber, implicit-def dead early-clobber $si, clobber, implicit-def dead early-clobber $di, clobber, implicit-def dead early-clobber $bx, clobber, implicit-def dead early-clobber $bp :: (load (s32) from %fixed-stack.0, align 16)
|
||||
; CHECK-NEXT: RET 0
|
||||
%0:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s32) from %fixed-stack.0, align 16)
|
||||
INLINEASM &"# $0", 0 /* attdialect */, 1076101129 /* reguse:GR32 spillable */, %0, 12 /* clobber */, implicit-def early-clobber $ax, 12 /* clobber */, implicit-def early-clobber $cx, 12 /* clobber */, implicit-def early-clobber $dx, 12 /* clobber */, implicit-def early-clobber $si, 12 /* clobber */, implicit-def early-clobber $di, 12 /* clobber */, implicit-def early-clobber $bx, 12 /* clobber */, implicit-def early-clobber $bp
|
||||
@@ -147,7 +147,7 @@ machineFunctionInfo: {}
|
||||
body: |
|
||||
bb.0 (%ir-block.0):
|
||||
; CHECK-LABEL: name: output
|
||||
; CHECK: INLINEASM &"# $0", 16 /* maystore attdialect */, 262190 /* mem:m */, %stack.1, 1, $noreg, 0, $noreg, 12 /* clobber */, implicit-def dead early-clobber $ax, 12 /* clobber */, implicit-def dead early-clobber $cx, 12 /* clobber */, implicit-def dead early-clobber $dx, 12 /* clobber */, implicit-def dead early-clobber $si, 12 /* clobber */, implicit-def dead early-clobber $di, 12 /* clobber */, implicit-def dead early-clobber $bx, 12 /* clobber */, implicit-def dead early-clobber $bp :: (store (s32) into %stack.1)
|
||||
; CHECK: INLINEASM &"# $0", maystore attdialect, mem:m, %stack.1, 1, $noreg, 0, $noreg, clobber, implicit-def dead early-clobber $ax, clobber, implicit-def dead early-clobber $cx, clobber, implicit-def dead early-clobber $dx, clobber, implicit-def dead early-clobber $si, clobber, implicit-def dead early-clobber $di, clobber, implicit-def dead early-clobber $bx, clobber, implicit-def dead early-clobber $bp :: (store (s32) into %stack.1)
|
||||
; CHECK-NEXT: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %stack.1, 1, $noreg, 0, $noreg :: (load (s32) from %stack.1)
|
||||
; CHECK-NEXT: MOV32mr %stack.0, 1, $noreg, 0, $noreg, [[MOV32rm]] :: (store (s32) into %ir.1)
|
||||
; CHECK-NEXT: $eax = COPY [[MOV32rm]]
|
||||
@@ -218,7 +218,7 @@ body: |
|
||||
; CHECK-LABEL: name: inout
|
||||
; CHECK: [[MOV32rm:%[0-9]+]]:gr32 = MOV32rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s32) from %fixed-stack.0, align 16)
|
||||
; CHECK-NEXT: MOV32mr %stack.0, 1, $noreg, 0, $noreg, [[MOV32rm]] :: (store (s32) into %stack.0)
|
||||
; CHECK-NEXT: INLINEASM &"# $0 $1", 24 /* mayload maystore attdialect */, 262190 /* mem:m */, %stack.0, 1, $noreg, 0, $noreg, 262190 /* mem:m */, %stack.0, 1, $noreg, 0, $noreg, 12 /* clobber */, implicit-def dead early-clobber $ax, 12 /* clobber */, implicit-def dead early-clobber $cx, 12 /* clobber */, implicit-def dead early-clobber $dx, 12 /* clobber */, implicit-def dead early-clobber $si, 12 /* clobber */, implicit-def dead early-clobber $di, 12 /* clobber */, implicit-def dead early-clobber $bx, 12 /* clobber */, implicit-def dead early-clobber $bp :: (load store (s32) on %stack.0)
|
||||
; CHECK-NEXT: INLINEASM &"# $0 $1", mayload maystore attdialect, mem:m, %stack.0, 1, $noreg, 0, $noreg, mem:m, %stack.0, 1, $noreg, 0, $noreg, clobber, implicit-def dead early-clobber $ax, clobber, implicit-def dead early-clobber $cx, clobber, implicit-def dead early-clobber $dx, clobber, implicit-def dead early-clobber $si, clobber, implicit-def dead early-clobber $di, clobber, implicit-def dead early-clobber $bx, clobber, implicit-def dead early-clobber $bp :: (load store (s32) on %stack.0)
|
||||
; CHECK-NEXT: [[MOV32rm1:%[0-9]+]]:gr32 = MOV32rm %stack.0, 1, $noreg, 0, $noreg :: (load (s32) from %stack.0)
|
||||
; CHECK-NEXT: MOV32mr %fixed-stack.0, 1, $noreg, 0, $noreg, [[MOV32rm1]] :: (store (s32) into %ir.2, align 16)
|
||||
; CHECK-NEXT: $eax = COPY [[MOV32rm1]]
|
||||
|
||||
@@ -3,10 +3,10 @@
|
||||
# Avoid crash/assert when using an emptystring in an INLINEASM.
|
||||
# CHECK-LABEL: name: emptystring
|
||||
# CHECK: bb.0:
|
||||
# CHECK: INLINEASM &"", 1
|
||||
# CHECK: INLINEASM &"", sideeffect attdialect
|
||||
# CHECK: RET 0
|
||||
name: emptystring
|
||||
body: |
|
||||
bb.0:
|
||||
INLINEASM &"", 1
|
||||
INLINEASM &"", sideeffect attdialect
|
||||
RET 0
|
||||
|
||||
@@ -81,7 +81,7 @@ body: |
|
||||
; MM: $zero = SLL_MM $zero, 0
|
||||
; MM: }
|
||||
; MM: bb.2.if.then:
|
||||
; MM: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MM: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MM: $v0 = LI16_MM 0
|
||||
; MM: JRC16_MM undef $ra, implicit killed $v0
|
||||
; MM: bb.3.return:
|
||||
@@ -110,7 +110,7 @@ body: |
|
||||
; PIC: $sp = ADDiu $sp, 8
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: $v0 = LI16_MM 0
|
||||
; PIC: JRC16_MM undef $ra, implicit killed $v0
|
||||
; PIC: bb.4.return:
|
||||
@@ -179,7 +179,7 @@ body: |
|
||||
; MM: $v0 = LI16_MM 1
|
||||
; MM: JRC16_MM undef $ra, implicit killed $v0
|
||||
; MM: bb.2.if.then:
|
||||
; MM: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MM: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MM: $v0 = LI16_MM 0
|
||||
; MM: JRC16_MM undef $ra, implicit killed $v0
|
||||
; PIC-LABEL: name: b
|
||||
@@ -193,7 +193,7 @@ body: |
|
||||
; PIC: $v0 = LI16_MM 1
|
||||
; PIC: JRC16_MM undef $ra, implicit killed $v0
|
||||
; PIC: bb.2.if.then:
|
||||
; PIC: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: $v0 = LI16_MM 0
|
||||
; PIC: JRC16_MM undef $ra, implicit killed $v0
|
||||
bb.0.entry:
|
||||
|
||||
@@ -77,7 +77,7 @@ body: |
|
||||
; MM: successors: %bb.3(0x80000000)
|
||||
; MM: BC_MMR6 %bb.3
|
||||
; MM: bb.2.if.then:
|
||||
; MM: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MM: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MM: $v0 = LI16_MM 0
|
||||
; MM: JRC16_MM undef $ra, implicit $v0
|
||||
; MM: bb.3.return:
|
||||
@@ -102,7 +102,7 @@ body: |
|
||||
; PIC: $sp = ADDiu $sp, 8
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: $v0 = LI16_MM 0
|
||||
; PIC: JRC16_MM undef $ra, implicit $v0
|
||||
; PIC: bb.4.return:
|
||||
@@ -169,7 +169,7 @@ body: |
|
||||
; MM: successors: %bb.3(0x80000000)
|
||||
; MM: BC_MMR6 %bb.3
|
||||
; MM: bb.2.if.then:
|
||||
; MM: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MM: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MM: $v0 = LI16_MM 0
|
||||
; MM: JRC16_MM undef $ra, implicit $v0
|
||||
; MM: bb.3.return:
|
||||
@@ -194,7 +194,7 @@ body: |
|
||||
; PIC: $sp = ADDiu $sp, 8
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: $v0 = LI16_MM 0
|
||||
; PIC: JRC16_MM undef $ra, implicit $v0
|
||||
; PIC: bb.4.return:
|
||||
|
||||
@@ -80,7 +80,7 @@ body: |
|
||||
; MIPS: $zero = SLL $zero, 0
|
||||
; MIPS: }
|
||||
; MIPS: bb.2.if.then:
|
||||
; MIPS: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MIPS: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MIPS: PseudoReturn undef $ra, implicit killed $v0 {
|
||||
; MIPS: $v0 = ADDiu $zero, 0
|
||||
; MIPS: }
|
||||
@@ -111,7 +111,7 @@ body: |
|
||||
; PIC: $sp = ADDiu $sp, 8
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn undef $ra, implicit killed $v0 {
|
||||
; PIC: $v0 = ADDiu $zero, 0
|
||||
; PIC: }
|
||||
@@ -184,7 +184,7 @@ body: |
|
||||
; MIPS: $zero = SLL $zero, 0
|
||||
; MIPS: }
|
||||
; MIPS: bb.2.if.then:
|
||||
; MIPS: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MIPS: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MIPS: PseudoReturn undef $ra, implicit killed $v0 {
|
||||
; MIPS: $v0 = ADDiu $zero, 0
|
||||
; MIPS: }
|
||||
@@ -215,7 +215,7 @@ body: |
|
||||
; PIC: $sp = ADDiu $sp, 8
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn undef $ra, implicit killed $v0 {
|
||||
; PIC: $v0 = ADDiu $zero, 0
|
||||
; PIC: }
|
||||
|
||||
@@ -80,7 +80,7 @@ body: |
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.if.then:
|
||||
; R6: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; R6: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; R6: PseudoReturn undef $ra, implicit killed $v0 {
|
||||
; R6: $v0 = ADDiu $zero, 0
|
||||
; R6: }
|
||||
@@ -109,7 +109,7 @@ body: |
|
||||
; PIC: $sp = ADDiu $sp, 8
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn undef $ra, implicit killed $v0 {
|
||||
; PIC: $v0 = ADDiu $zero, 0
|
||||
; PIC: }
|
||||
@@ -180,7 +180,7 @@ body: |
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.if.then:
|
||||
; R6: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; R6: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; R6: PseudoReturn undef $ra, implicit killed $v0 {
|
||||
; R6: $v0 = ADDiu $zero, 0
|
||||
; R6: }
|
||||
@@ -209,7 +209,7 @@ body: |
|
||||
; PIC: $sp = ADDiu $sp, 8
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 310680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn undef $ra, implicit killed $v0 {
|
||||
; PIC: $v0 = ADDiu $zero, 0
|
||||
; PIC: }
|
||||
|
||||
@@ -141,7 +141,7 @@ body: |
|
||||
; MM: }
|
||||
; MM: bb.2.iftrue:
|
||||
; MM: successors: %bb.3(0x80000000)
|
||||
; MM: INLINEASM &".space 131068", 1
|
||||
; MM: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MM: bb.3.tail:
|
||||
; MM: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BEQ_MM
|
||||
@@ -166,7 +166,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -179,7 +179,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -234,7 +234,7 @@ body: |
|
||||
; MM: }
|
||||
; MM: bb.2.iftrue:
|
||||
; MM: successors: %bb.3(0x80000000)
|
||||
; MM: INLINEASM &".space 131068", 1
|
||||
; MM: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MM: bb.3.tail:
|
||||
; MM: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BGEZ_MM
|
||||
@@ -261,7 +261,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -274,7 +274,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -329,7 +329,7 @@ body: |
|
||||
; MM: }
|
||||
; MM: bb.2.iftrue:
|
||||
; MM: successors: %bb.3(0x80000000)
|
||||
; MM: INLINEASM &".space 131068", 1
|
||||
; MM: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MM: bb.3.tail:
|
||||
; MM: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BGTZ_MM
|
||||
@@ -356,7 +356,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -369,7 +369,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -424,7 +424,7 @@ body: |
|
||||
; MM: }
|
||||
; MM: bb.2.iftrue:
|
||||
; MM: successors: %bb.3(0x80000000)
|
||||
; MM: INLINEASM &".space 131068", 1
|
||||
; MM: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MM: bb.3.tail:
|
||||
; MM: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BLEZ_MM
|
||||
@@ -451,7 +451,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -464,7 +464,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -519,7 +519,7 @@ body: |
|
||||
; MM: }
|
||||
; MM: bb.2.iftrue:
|
||||
; MM: successors: %bb.3(0x80000000)
|
||||
; MM: INLINEASM &".space 131068", 1
|
||||
; MM: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MM: bb.3.tail:
|
||||
; MM: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BLTZ_MM
|
||||
@@ -546,7 +546,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -559,7 +559,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -612,7 +612,7 @@ body: |
|
||||
; MM: }
|
||||
; MM: bb.2.iftrue:
|
||||
; MM: successors: %bb.3(0x80000000)
|
||||
; MM: INLINEASM &".space 131068", 1
|
||||
; MM: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MM: bb.3.tail:
|
||||
; MM: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BNE_MM
|
||||
@@ -637,7 +637,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -650,7 +650,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -705,7 +705,7 @@ body: |
|
||||
; MM: }
|
||||
; MM: bb.2.iftrue:
|
||||
; MM: successors: %bb.3(0x80000000)
|
||||
; MM: INLINEASM &".space 131068", 1
|
||||
; MM: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MM: bb.3.tail:
|
||||
; MM: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BEQZ16_MM
|
||||
@@ -732,7 +732,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -745,7 +745,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -800,7 +800,7 @@ body: |
|
||||
; MM: }
|
||||
; MM: bb.2.iftrue:
|
||||
; MM: successors: %bb.3(0x80000000)
|
||||
; MM: INLINEASM &".space 131068", 1
|
||||
; MM: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MM: bb.3.tail:
|
||||
; MM: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BNEZ16_MM
|
||||
@@ -827,7 +827,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -840,7 +840,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
|
||||
@@ -183,7 +183,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 131068", 1
|
||||
; MMR6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BEQC_MMR6
|
||||
@@ -206,7 +206,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -219,7 +219,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -270,7 +270,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 131068", 1
|
||||
; MMR6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BNEC_MMR6
|
||||
@@ -293,7 +293,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -306,7 +306,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -357,7 +357,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 131068", 1
|
||||
; MMR6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BGEC_MMR6
|
||||
@@ -380,7 +380,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -393,7 +393,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -444,7 +444,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 131068", 1
|
||||
; MMR6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BGEUC_MMR6
|
||||
@@ -467,7 +467,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -480,7 +480,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -531,7 +531,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 131068", 1
|
||||
; MMR6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BGEZC_MMR6
|
||||
@@ -554,7 +554,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -567,7 +567,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -618,7 +618,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 131068", 1
|
||||
; MMR6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BGTZC_MMR6
|
||||
@@ -641,7 +641,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -654,7 +654,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -705,7 +705,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 131068", 1
|
||||
; MMR6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BLEZC_MMR6
|
||||
@@ -728,7 +728,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -741,7 +741,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -792,7 +792,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 131068", 1
|
||||
; MMR6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BLTC_MMR6
|
||||
@@ -815,7 +815,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -828,7 +828,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -879,7 +879,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 131068", 1
|
||||
; MMR6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BLTUC_MMR6
|
||||
@@ -902,7 +902,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -915,7 +915,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -966,7 +966,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 131068", 1
|
||||
; MMR6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BLTZC_MMR6
|
||||
@@ -989,7 +989,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -1002,7 +1002,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -1053,7 +1053,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 8388608", 1
|
||||
; MMR6: INLINEASM &".space 8388608", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BEQZC_MMR6
|
||||
@@ -1076,7 +1076,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 8388608", 1
|
||||
; PIC: INLINEASM &".space 8388608", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -1089,7 +1089,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 8388608", 1
|
||||
INLINEASM &".space 8388608", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -1140,7 +1140,7 @@ body: |
|
||||
; MMR6: BC_MMR6 %bb.3
|
||||
; MMR6: bb.2.iftrue:
|
||||
; MMR6: successors: %bb.3(0x80000000)
|
||||
; MMR6: INLINEASM &".space 8388608", 1
|
||||
; MMR6: INLINEASM &".space 8388608", sideeffect attdialect
|
||||
; MMR6: bb.3.tail:
|
||||
; MMR6: JRC16_MM undef $ra
|
||||
; PIC-LABEL: name: expand_BNEZC_MMR6
|
||||
@@ -1163,7 +1163,7 @@ body: |
|
||||
; PIC: JIC_MMR6 $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 8388608", 1
|
||||
; PIC: INLINEASM &".space 8388608", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JRC16_MM undef $ra
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -1176,7 +1176,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 8388608", 1
|
||||
INLINEASM &".space 8388608", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
|
||||
@@ -125,7 +125,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 131068", 1
|
||||
; MIPS64: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -156,7 +156,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -171,7 +171,7 @@ body: |
|
||||
BEQ64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -227,7 +227,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 131068", 1
|
||||
; MIPS64: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -258,7 +258,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -273,7 +273,7 @@ body: |
|
||||
BNE64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -329,7 +329,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 131068", 1
|
||||
; MIPS64: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -360,7 +360,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -375,7 +375,7 @@ body: |
|
||||
BGEZ64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -431,7 +431,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 131068", 1
|
||||
; MIPS64: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -462,7 +462,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -477,7 +477,7 @@ body: |
|
||||
BGTZ64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -533,7 +533,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 131068", 1
|
||||
; MIPS64: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -564,7 +564,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -579,7 +579,7 @@ body: |
|
||||
BLEZ64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -635,7 +635,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 131068", 1
|
||||
; MIPS64: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -666,7 +666,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -681,7 +681,7 @@ body: |
|
||||
BLTZ64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
|
||||
@@ -190,7 +190,7 @@ body: |
|
||||
; MIPS64: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||||
; MIPS64: BNEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
; MIPS64: bb.1.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -203,7 +203,7 @@ body: |
|
||||
; PIC: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||||
; PIC: BNEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
; PIC: bb.1.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -218,7 +218,7 @@ body: |
|
||||
BNEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -267,7 +267,7 @@ body: |
|
||||
; MIPS64: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||||
; MIPS64: BEQZC64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
; MIPS64: bb.1.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -280,7 +280,7 @@ body: |
|
||||
; PIC: successors: %bb.1(0x40000000), %bb.2(0x40000000)
|
||||
; PIC: BEQZC64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
; PIC: bb.1.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -295,7 +295,7 @@ body: |
|
||||
BEQZC64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -349,7 +349,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -378,7 +378,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -393,7 +393,7 @@ body: |
|
||||
BNEC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -447,7 +447,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -476,7 +476,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -491,7 +491,7 @@ body: |
|
||||
BEQC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -545,7 +545,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -574,7 +574,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -589,7 +589,7 @@ body: |
|
||||
BLTC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -643,7 +643,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -672,7 +672,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -687,7 +687,7 @@ body: |
|
||||
BLTUC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -741,7 +741,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -770,7 +770,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -785,7 +785,7 @@ body: |
|
||||
BGEC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -839,7 +839,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -868,7 +868,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -883,7 +883,7 @@ body: |
|
||||
BGEUC64 killed renamable $a0_64, $zero_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -937,7 +937,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -966,7 +966,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -981,7 +981,7 @@ body: |
|
||||
BLEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -1035,7 +1035,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -1064,7 +1064,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -1079,7 +1079,7 @@ body: |
|
||||
BLTZC64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -1133,7 +1133,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -1162,7 +1162,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -1177,7 +1177,7 @@ body: |
|
||||
BGEZC64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
@@ -1231,7 +1231,7 @@ body: |
|
||||
; MIPS64: $zero = SLL $zero, 0
|
||||
; MIPS64: }
|
||||
; MIPS64: bb.2.iftrue:
|
||||
; MIPS64: INLINEASM &".space 831068", 1
|
||||
; MIPS64: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; MIPS64: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; MIPS64: $v0_64 = DADDiu $zero_64, 1
|
||||
; MIPS64: }
|
||||
@@ -1260,7 +1260,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: INLINEASM &".space 831068", 1
|
||||
; PIC: INLINEASM &".space 831068", sideeffect attdialect
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0_64 {
|
||||
; PIC: $v0_64 = DADDiu $zero_64, 1
|
||||
; PIC: }
|
||||
@@ -1275,7 +1275,7 @@ body: |
|
||||
BGTZC64 killed renamable $a0_64, %bb.2, implicit-def $at
|
||||
|
||||
bb.1.iftrue:
|
||||
INLINEASM &".space 831068", 1
|
||||
INLINEASM &".space 831068", sideeffect attdialect
|
||||
$v0_64 = DADDiu $zero_64, 1
|
||||
PseudoReturn64 undef $ra_64, implicit killed $v0_64
|
||||
|
||||
|
||||
@@ -183,7 +183,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 131068", 1
|
||||
; R6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BEQC
|
||||
@@ -206,7 +206,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -219,7 +219,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -270,7 +270,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 131068", 1
|
||||
; R6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BNEC
|
||||
@@ -293,7 +293,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -306,7 +306,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -357,7 +357,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 131068", 1
|
||||
; R6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BGEC
|
||||
@@ -380,7 +380,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -393,7 +393,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -444,7 +444,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 131068", 1
|
||||
; R6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BGEUC
|
||||
@@ -467,7 +467,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -480,7 +480,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -531,7 +531,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 131068", 1
|
||||
; R6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BGEZC
|
||||
@@ -554,7 +554,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -567,7 +567,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -618,7 +618,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 131068", 1
|
||||
; R6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BGTZC
|
||||
@@ -641,7 +641,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -654,7 +654,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -705,7 +705,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 131068", 1
|
||||
; R6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BLEZC
|
||||
@@ -728,7 +728,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -741,7 +741,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -792,7 +792,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 131068", 1
|
||||
; R6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BLTC
|
||||
@@ -815,7 +815,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -828,7 +828,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -879,7 +879,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 131068", 1
|
||||
; R6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BLTUC
|
||||
@@ -902,7 +902,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -915,7 +915,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -966,7 +966,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 131068", 1
|
||||
; R6: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BLTZC
|
||||
@@ -989,7 +989,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -1002,7 +1002,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -1053,7 +1053,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 8388608", 1
|
||||
; R6: INLINEASM &".space 8388608", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BEQZC
|
||||
@@ -1076,7 +1076,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 8388608", 1
|
||||
; PIC: INLINEASM &".space 8388608", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -1089,7 +1089,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 8388608", 1
|
||||
INLINEASM &".space 8388608", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -1140,7 +1140,7 @@ body: |
|
||||
; R6: BC %bb.3
|
||||
; R6: bb.2.iftrue:
|
||||
; R6: successors: %bb.3(0x80000000)
|
||||
; R6: INLINEASM &".space 8388608", 1
|
||||
; R6: INLINEASM &".space 8388608", sideeffect attdialect
|
||||
; R6: bb.3.tail:
|
||||
; R6: JIC undef $ra, 0, implicit-def $at
|
||||
; PIC-LABEL: name: expand_BNEZC
|
||||
@@ -1163,7 +1163,7 @@ body: |
|
||||
; PIC: JIC $at, 0, implicit-def $at
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 8388608", 1
|
||||
; PIC: INLINEASM &".space 8388608", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: JIC undef $ra, 0, implicit-def $at
|
||||
bb.0 (%ir-block.0):
|
||||
@@ -1176,7 +1176,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 8388608", 1
|
||||
INLINEASM &".space 8388608", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
|
||||
@@ -121,7 +121,7 @@ body: |
|
||||
; MIPS: }
|
||||
; MIPS: bb.2.iftrue:
|
||||
; MIPS: successors: %bb.3(0x80000000)
|
||||
; MIPS: INLINEASM &".space 131068", 1
|
||||
; MIPS: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS: bb.3.tail:
|
||||
; MIPS: PseudoReturn undef $ra {
|
||||
; MIPS: $zero = SLL $zero, 0
|
||||
@@ -150,7 +150,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: PseudoReturn undef $ra {
|
||||
; PIC: $zero = SLL $zero, 0
|
||||
@@ -165,7 +165,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -220,7 +220,7 @@ body: |
|
||||
; MIPS: }
|
||||
; MIPS: bb.2.iftrue:
|
||||
; MIPS: successors: %bb.3(0x80000000)
|
||||
; MIPS: INLINEASM &".space 131068", 1
|
||||
; MIPS: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS: bb.3.tail:
|
||||
; MIPS: PseudoReturn undef $ra {
|
||||
; MIPS: $zero = SLL $zero, 0
|
||||
@@ -249,7 +249,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: PseudoReturn undef $ra {
|
||||
; PIC: $zero = SLL $zero, 0
|
||||
@@ -264,7 +264,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -319,7 +319,7 @@ body: |
|
||||
; MIPS: }
|
||||
; MIPS: bb.2.iftrue:
|
||||
; MIPS: successors: %bb.3(0x80000000)
|
||||
; MIPS: INLINEASM &".space 131068", 1
|
||||
; MIPS: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS: bb.3.tail:
|
||||
; MIPS: PseudoReturn undef $ra {
|
||||
; MIPS: $zero = SLL $zero, 0
|
||||
@@ -348,7 +348,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: PseudoReturn undef $ra {
|
||||
; PIC: $zero = SLL $zero, 0
|
||||
@@ -363,7 +363,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -418,7 +418,7 @@ body: |
|
||||
; MIPS: }
|
||||
; MIPS: bb.2.iftrue:
|
||||
; MIPS: successors: %bb.3(0x80000000)
|
||||
; MIPS: INLINEASM &".space 131068", 1
|
||||
; MIPS: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS: bb.3.tail:
|
||||
; MIPS: PseudoReturn undef $ra {
|
||||
; MIPS: $zero = SLL $zero, 0
|
||||
@@ -447,7 +447,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: PseudoReturn undef $ra {
|
||||
; PIC: $zero = SLL $zero, 0
|
||||
@@ -462,7 +462,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -517,7 +517,7 @@ body: |
|
||||
; MIPS: }
|
||||
; MIPS: bb.2.iftrue:
|
||||
; MIPS: successors: %bb.3(0x80000000)
|
||||
; MIPS: INLINEASM &".space 131068", 1
|
||||
; MIPS: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS: bb.3.tail:
|
||||
; MIPS: PseudoReturn undef $ra {
|
||||
; MIPS: $zero = SLL $zero, 0
|
||||
@@ -546,7 +546,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: PseudoReturn undef $ra {
|
||||
; PIC: $zero = SLL $zero, 0
|
||||
@@ -561,7 +561,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
@@ -616,7 +616,7 @@ body: |
|
||||
; MIPS: }
|
||||
; MIPS: bb.2.iftrue:
|
||||
; MIPS: successors: %bb.3(0x80000000)
|
||||
; MIPS: INLINEASM &".space 131068", 1
|
||||
; MIPS: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; MIPS: bb.3.tail:
|
||||
; MIPS: PseudoReturn undef $ra {
|
||||
; MIPS: $zero = SLL $zero, 0
|
||||
@@ -645,7 +645,7 @@ body: |
|
||||
; PIC: }
|
||||
; PIC: bb.3.iftrue:
|
||||
; PIC: successors: %bb.4(0x80000000)
|
||||
; PIC: INLINEASM &".space 131068", 1
|
||||
; PIC: INLINEASM &".space 131068", sideeffect attdialect
|
||||
; PIC: bb.4.tail:
|
||||
; PIC: PseudoReturn undef $ra {
|
||||
; PIC: $zero = SLL $zero, 0
|
||||
@@ -660,7 +660,7 @@ body: |
|
||||
bb.1.iftrue:
|
||||
successors: %bb.2(0x80000000)
|
||||
|
||||
INLINEASM &".space 131068", 1
|
||||
INLINEASM &".space 131068", sideeffect attdialect
|
||||
|
||||
bb.2.tail:
|
||||
PseudoReturn undef $ra
|
||||
|
||||
@@ -271,7 +271,7 @@ body: |
|
||||
; MSA: $zero = SLL $zero, 0
|
||||
; MSA: }
|
||||
; MSA: bb.2.if.then:
|
||||
; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MSA: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; MSA: renamable $v0 = ADDiu $zero, 1
|
||||
; MSA: }
|
||||
@@ -307,7 +307,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; PIC: renamable $v0 = ADDiu $zero, 1
|
||||
; PIC: }
|
||||
@@ -387,7 +387,7 @@ body: |
|
||||
; MSA: $zero = SLL $zero, 0
|
||||
; MSA: }
|
||||
; MSA: bb.2.if.then:
|
||||
; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MSA: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; MSA: renamable $v0 = ADDiu $zero, 1
|
||||
; MSA: }
|
||||
@@ -422,7 +422,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; PIC: renamable $v0 = ADDiu $zero, 1
|
||||
; PIC: }
|
||||
@@ -501,7 +501,7 @@ body: |
|
||||
; MSA: $zero = SLL $zero, 0
|
||||
; MSA: }
|
||||
; MSA: bb.2.if.then:
|
||||
; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MSA: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; MSA: renamable $v0 = ADDiu $zero, 1
|
||||
; MSA: }
|
||||
@@ -536,7 +536,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; PIC: renamable $v0 = ADDiu $zero, 1
|
||||
; PIC: }
|
||||
@@ -614,7 +614,7 @@ body: |
|
||||
; MSA: $zero = SLL $zero, 0
|
||||
; MSA: }
|
||||
; MSA: bb.2.if.then:
|
||||
; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MSA: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; MSA: renamable $v0 = ADDiu $zero, 1
|
||||
; MSA: }
|
||||
@@ -648,7 +648,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; PIC: renamable $v0 = ADDiu $zero, 1
|
||||
; PIC: }
|
||||
@@ -725,7 +725,7 @@ body: |
|
||||
; MSA: $zero = SLL $zero, 0
|
||||
; MSA: }
|
||||
; MSA: bb.2.if.then:
|
||||
; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MSA: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; MSA: renamable $v0 = ADDiu $zero, 1
|
||||
; MSA: }
|
||||
@@ -759,7 +759,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; PIC: renamable $v0 = ADDiu $zero, 1
|
||||
; PIC: }
|
||||
@@ -838,7 +838,7 @@ body: |
|
||||
; MSA: $zero = SLL $zero, 0
|
||||
; MSA: }
|
||||
; MSA: bb.2.if.then:
|
||||
; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MSA: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; MSA: renamable $v0 = ADDiu $zero, 1
|
||||
; MSA: }
|
||||
@@ -874,7 +874,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; PIC: renamable $v0 = ADDiu $zero, 1
|
||||
; PIC: }
|
||||
@@ -954,7 +954,7 @@ body: |
|
||||
; MSA: $zero = SLL $zero, 0
|
||||
; MSA: }
|
||||
; MSA: bb.2.if.then:
|
||||
; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MSA: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; MSA: renamable $v0 = ADDiu $zero, 1
|
||||
; MSA: }
|
||||
@@ -989,7 +989,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; PIC: renamable $v0 = ADDiu $zero, 1
|
||||
; PIC: }
|
||||
@@ -1068,7 +1068,7 @@ body: |
|
||||
; MSA: $zero = SLL $zero, 0
|
||||
; MSA: }
|
||||
; MSA: bb.2.if.then:
|
||||
; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MSA: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; MSA: renamable $v0 = ADDiu $zero, 1
|
||||
; MSA: }
|
||||
@@ -1103,7 +1103,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; PIC: renamable $v0 = ADDiu $zero, 1
|
||||
; PIC: }
|
||||
@@ -1181,7 +1181,7 @@ body: |
|
||||
; MSA: $zero = SLL $zero, 0
|
||||
; MSA: }
|
||||
; MSA: bb.2.if.then:
|
||||
; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MSA: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; MSA: renamable $v0 = ADDiu $zero, 1
|
||||
; MSA: }
|
||||
@@ -1215,7 +1215,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; PIC: renamable $v0 = ADDiu $zero, 1
|
||||
; PIC: }
|
||||
@@ -1292,7 +1292,7 @@ body: |
|
||||
; MSA: $zero = SLL $zero, 0
|
||||
; MSA: }
|
||||
; MSA: bb.2.if.then:
|
||||
; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; MSA: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; MSA: renamable $v0 = ADDiu $zero, 1
|
||||
; MSA: }
|
||||
@@ -1326,7 +1326,7 @@ body: |
|
||||
; PIC: $sp_64 = DADDiu $sp_64, 16
|
||||
; PIC: }
|
||||
; PIC: bb.3.if.then:
|
||||
; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at
|
||||
; PIC: INLINEASM &".space 810680", sideeffect attdialect, clobber, implicit-def dead early-clobber $at
|
||||
; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {
|
||||
; PIC: renamable $v0 = ADDiu $zero, 1
|
||||
; PIC: }
|
||||
|
||||
@@ -39,25 +39,25 @@ define i32 @jump_table(i32 %a) {
|
||||
; 32SMALL-MIR-NEXT: bb.2.sw.bb:
|
||||
; 32SMALL-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 32SMALL-MIR-NEXT: {{ $}}
|
||||
; 32SMALL-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 32SMALL-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 32SMALL-MIR-NEXT: B %bb.6
|
||||
; 32SMALL-MIR-NEXT: {{ $}}
|
||||
; 32SMALL-MIR-NEXT: bb.3.sw.bb1:
|
||||
; 32SMALL-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 32SMALL-MIR-NEXT: {{ $}}
|
||||
; 32SMALL-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 32SMALL-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 32SMALL-MIR-NEXT: B %bb.6
|
||||
; 32SMALL-MIR-NEXT: {{ $}}
|
||||
; 32SMALL-MIR-NEXT: bb.4.sw.bb2:
|
||||
; 32SMALL-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 32SMALL-MIR-NEXT: {{ $}}
|
||||
; 32SMALL-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 32SMALL-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 32SMALL-MIR-NEXT: B %bb.6
|
||||
; 32SMALL-MIR-NEXT: {{ $}}
|
||||
; 32SMALL-MIR-NEXT: bb.5.sw.bb3:
|
||||
; 32SMALL-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 32SMALL-MIR-NEXT: {{ $}}
|
||||
; 32SMALL-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 32SMALL-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 32SMALL-MIR-NEXT: {{ $}}
|
||||
; 32SMALL-MIR-NEXT: bb.6.sw.epilog:
|
||||
; 32SMALL-MIR-NEXT: $r3 = LI 0
|
||||
@@ -87,25 +87,25 @@ define i32 @jump_table(i32 %a) {
|
||||
; 32LARGE-MIR-NEXT: bb.2.sw.bb:
|
||||
; 32LARGE-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 32LARGE-MIR-NEXT: {{ $}}
|
||||
; 32LARGE-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 32LARGE-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 32LARGE-MIR-NEXT: B %bb.6
|
||||
; 32LARGE-MIR-NEXT: {{ $}}
|
||||
; 32LARGE-MIR-NEXT: bb.3.sw.bb1:
|
||||
; 32LARGE-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 32LARGE-MIR-NEXT: {{ $}}
|
||||
; 32LARGE-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 32LARGE-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 32LARGE-MIR-NEXT: B %bb.6
|
||||
; 32LARGE-MIR-NEXT: {{ $}}
|
||||
; 32LARGE-MIR-NEXT: bb.4.sw.bb2:
|
||||
; 32LARGE-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 32LARGE-MIR-NEXT: {{ $}}
|
||||
; 32LARGE-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 32LARGE-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 32LARGE-MIR-NEXT: B %bb.6
|
||||
; 32LARGE-MIR-NEXT: {{ $}}
|
||||
; 32LARGE-MIR-NEXT: bb.5.sw.bb3:
|
||||
; 32LARGE-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 32LARGE-MIR-NEXT: {{ $}}
|
||||
; 32LARGE-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 32LARGE-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 32LARGE-MIR-NEXT: {{ $}}
|
||||
; 32LARGE-MIR-NEXT: bb.6.sw.epilog:
|
||||
; 32LARGE-MIR-NEXT: $r3 = LI 0
|
||||
@@ -134,25 +134,25 @@ define i32 @jump_table(i32 %a) {
|
||||
; 64SMALL-MIR-NEXT: bb.2.sw.bb:
|
||||
; 64SMALL-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 64SMALL-MIR-NEXT: {{ $}}
|
||||
; 64SMALL-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 64SMALL-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 64SMALL-MIR-NEXT: B %bb.6
|
||||
; 64SMALL-MIR-NEXT: {{ $}}
|
||||
; 64SMALL-MIR-NEXT: bb.3.sw.bb1:
|
||||
; 64SMALL-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 64SMALL-MIR-NEXT: {{ $}}
|
||||
; 64SMALL-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 64SMALL-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 64SMALL-MIR-NEXT: B %bb.6
|
||||
; 64SMALL-MIR-NEXT: {{ $}}
|
||||
; 64SMALL-MIR-NEXT: bb.4.sw.bb2:
|
||||
; 64SMALL-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 64SMALL-MIR-NEXT: {{ $}}
|
||||
; 64SMALL-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 64SMALL-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 64SMALL-MIR-NEXT: B %bb.6
|
||||
; 64SMALL-MIR-NEXT: {{ $}}
|
||||
; 64SMALL-MIR-NEXT: bb.5.sw.bb3:
|
||||
; 64SMALL-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 64SMALL-MIR-NEXT: {{ $}}
|
||||
; 64SMALL-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 64SMALL-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 64SMALL-MIR-NEXT: {{ $}}
|
||||
; 64SMALL-MIR-NEXT: bb.6.sw.epilog:
|
||||
; 64SMALL-MIR-NEXT: $x3 = LI8 0
|
||||
@@ -182,25 +182,25 @@ define i32 @jump_table(i32 %a) {
|
||||
; 64LARGE-MIR-NEXT: bb.2.sw.bb:
|
||||
; 64LARGE-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 64LARGE-MIR-NEXT: {{ $}}
|
||||
; 64LARGE-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 64LARGE-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 64LARGE-MIR-NEXT: B %bb.6
|
||||
; 64LARGE-MIR-NEXT: {{ $}}
|
||||
; 64LARGE-MIR-NEXT: bb.3.sw.bb1:
|
||||
; 64LARGE-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 64LARGE-MIR-NEXT: {{ $}}
|
||||
; 64LARGE-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 64LARGE-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 64LARGE-MIR-NEXT: B %bb.6
|
||||
; 64LARGE-MIR-NEXT: {{ $}}
|
||||
; 64LARGE-MIR-NEXT: bb.4.sw.bb2:
|
||||
; 64LARGE-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 64LARGE-MIR-NEXT: {{ $}}
|
||||
; 64LARGE-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 64LARGE-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 64LARGE-MIR-NEXT: B %bb.6
|
||||
; 64LARGE-MIR-NEXT: {{ $}}
|
||||
; 64LARGE-MIR-NEXT: bb.5.sw.bb3:
|
||||
; 64LARGE-MIR-NEXT: successors: %bb.6(0x80000000)
|
||||
; 64LARGE-MIR-NEXT: {{ $}}
|
||||
; 64LARGE-MIR-NEXT: INLINEASM &"", 1 /* sideeffect attdialect */
|
||||
; 64LARGE-MIR-NEXT: INLINEASM &"", sideeffect attdialect
|
||||
; 64LARGE-MIR-NEXT: {{ $}}
|
||||
; 64LARGE-MIR-NEXT: bb.6.sw.epilog:
|
||||
; 64LARGE-MIR-NEXT: $x3 = LI8 0
|
||||
|
||||
@@ -18,11 +18,11 @@ body: |
|
||||
BCC 76, killed renamable $cr0, %bb.1
|
||||
bb.2:
|
||||
renamable $r3 = LI 2
|
||||
INLINEASM &".space 32760", 1
|
||||
INLINEASM &".space 32760", sideeffect attdialect
|
||||
BLR implicit $lr, implicit $rm, implicit killed $r3
|
||||
bb.1:
|
||||
renamable $r3 = LI 1
|
||||
INLINEASM &".space 32760", 1
|
||||
INLINEASM &".space 32760", sideeffect attdialect
|
||||
BLR implicit $lr, implicit $rm, implicit killed $r3
|
||||
|
||||
# CHECK-LABEL: .print_program_counter:
|
||||
|
||||
@@ -58,12 +58,12 @@ body: |
|
||||
BCC 76, killed renamable $cr0, %bb.1
|
||||
bb.2:
|
||||
renamable $x3 = LI8 2
|
||||
INLINEASM &".space 32744", 1
|
||||
INLINEASM &".space 32744", sideeffect attdialect
|
||||
renamable $x3 = PADDI8 $x3, 13
|
||||
BLR8 implicit $lr8, implicit $rm, implicit killed $x3
|
||||
bb.1:
|
||||
renamable $x3 = LI8 1
|
||||
INLINEASM &".space 32744", 1
|
||||
INLINEASM &".space 32744", sideeffect attdialect
|
||||
renamable $x3 = PADDI8 $x3, 21
|
||||
BLR8 implicit $lr8, implicit $rm, implicit killed $x3
|
||||
|
||||
|
||||
@@ -10,7 +10,7 @@ define void @strncpy_from_kernel_nofault_count() {
|
||||
; CHECK: bb.0.entry:
|
||||
; CHECK-NEXT: successors: %bb.1(0x80000000), %bb.3(0x00000000)
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM_BR &"", 0 /* attdialect */, 131082 /* regdef:GPRC */, def %1, 13 /* imm */, %bb.3
|
||||
; CHECK-NEXT: INLINEASM_BR &"", attdialect, regdef:GPRC, def %1, imm, %bb.3
|
||||
; CHECK-NEXT: [[COPY:%[0-9]+]]:gprc = COPY %1
|
||||
; CHECK-NEXT: B %bb.1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
|
||||
@@ -44,7 +44,7 @@ body: |
|
||||
|
||||
bb.1:
|
||||
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $ctr
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $ctr
|
||||
%1:crbitrc = DecreaseCTRloop 1, implicit-def dead $ctr, implicit $ctr
|
||||
BC killed %1:crbitrc, %bb.1
|
||||
B %bb.2
|
||||
@@ -220,7 +220,7 @@ tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0.entry:
|
||||
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $ctr
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $ctr
|
||||
%0:gprc = LI 2048
|
||||
; CHECK-NOT: MTCTRloop
|
||||
; CHECK-NOT: BDNZ
|
||||
@@ -305,7 +305,7 @@ body: |
|
||||
; CHECK: CMPLWI
|
||||
; CHECK: BC
|
||||
MTCTRloop killed %0:gprc, implicit-def dead $ctr
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $ctr
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $ctr
|
||||
|
||||
bb.1:
|
||||
|
||||
@@ -339,7 +339,7 @@ body: |
|
||||
B %bb.2
|
||||
|
||||
bb.2:
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $ctr
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $ctr
|
||||
|
||||
BLR implicit $lr, implicit $rm
|
||||
...
|
||||
|
||||
@@ -46,7 +46,7 @@ body: |
|
||||
|
||||
bb.1:
|
||||
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $ctr8
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $ctr8
|
||||
%1:crbitrc = DecreaseCTR8loop 1, implicit-def dead $ctr8, implicit $ctr8
|
||||
BC killed %1:crbitrc, %bb.1
|
||||
B %bb.2
|
||||
@@ -222,7 +222,7 @@ tracksRegLiveness: true
|
||||
body: |
|
||||
bb.0.entry:
|
||||
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $ctr8
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $ctr8
|
||||
%0:g8rc = LI8 2048
|
||||
; CHECK-NOT: MTCTR8loop
|
||||
; CHECK-NOT: BDNZ8
|
||||
@@ -307,7 +307,7 @@ body: |
|
||||
; CHECK: CMPLDI
|
||||
; CHECK: BC
|
||||
MTCTR8loop killed %0:g8rc, implicit-def dead $ctr8
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $ctr8
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $ctr8
|
||||
|
||||
bb.1:
|
||||
|
||||
@@ -341,7 +341,7 @@ body: |
|
||||
B %bb.2
|
||||
|
||||
bb.2:
|
||||
INLINEASM &"", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def early-clobber $ctr8
|
||||
INLINEASM &"", sideeffect attdialect, clobber, implicit-def early-clobber $ctr8
|
||||
|
||||
BLR8 implicit $lr8, implicit $rm
|
||||
...
|
||||
|
||||
@@ -88,7 +88,7 @@ body: |
|
||||
; CHECK-NEXT: successors: %bb.4(0x7c000000), %bb.5(0x04000000)
|
||||
; CHECK-NEXT: liveins: $r4, $x3
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM &"add $0, $1, $2", 0 /* attdialect */, 131082 /* regdef:GPRC */, def renamable $r4, 131081 /* reguse:GPRC */, renamable $r3, 131081 /* reguse:GPRC */, killed renamable $r4, 12 /* clobber */, implicit-def dead early-clobber $r14, 12 /* clobber */, implicit-def dead early-clobber $r15, 12 /* clobber */, implicit-def dead early-clobber $r16, 12 /* clobber */, implicit-def dead early-clobber $r17, 12 /* clobber */, implicit-def dead early-clobber $r18, 12 /* clobber */, implicit-def dead early-clobber $r19, 12 /* clobber */, implicit-def dead early-clobber $r20, 12 /* clobber */, implicit-def dead early-clobber $r21, 12 /* clobber */, implicit-def dead early-clobber $r22, 12 /* clobber */, implicit-def dead early-clobber $r23, 12 /* clobber */, implicit-def dead early-clobber $r24, 12 /* clobber */, implicit-def dead early-clobber $r25, 12 /* clobber */, implicit-def dead early-clobber $r26, 12 /* clobber */, implicit-def dead early-clobber $r27, 12 /* clobber */, implicit-def dead early-clobber $r28, 12 /* clobber */, implicit-def dead early-clobber $r29, 12 /* clobber */, implicit-def dead early-clobber $r30, 12 /* clobber */, implicit-def dead early-clobber $r31
|
||||
; CHECK-NEXT: INLINEASM &"add $0, $1, $2", attdialect, regdef:GPRC, def renamable $r4, reguse:GPRC, renamable $r3, reguse:GPRC, killed renamable $r4, clobber, implicit-def dead early-clobber $r14, clobber, implicit-def dead early-clobber $r15, clobber, implicit-def dead early-clobber $r16, clobber, implicit-def dead early-clobber $r17, clobber, implicit-def dead early-clobber $r18, clobber, implicit-def dead early-clobber $r19, clobber, implicit-def dead early-clobber $r20, clobber, implicit-def dead early-clobber $r21, clobber, implicit-def dead early-clobber $r22, clobber, implicit-def dead early-clobber $r23, clobber, implicit-def dead early-clobber $r24, clobber, implicit-def dead early-clobber $r25, clobber, implicit-def dead early-clobber $r26, clobber, implicit-def dead early-clobber $r27, clobber, implicit-def dead early-clobber $r28, clobber, implicit-def dead early-clobber $r29, clobber, implicit-def dead early-clobber $r30, clobber, implicit-def dead early-clobber $r31
|
||||
; CHECK-NEXT: BDNZ8 %bb.4, implicit-def dead $ctr8, implicit $ctr8
|
||||
; CHECK-NEXT: B %bb.5
|
||||
; CHECK-NEXT: {{ $}}
|
||||
|
||||
@@ -21,7 +21,7 @@ body: |
|
||||
; CHECK-NEXT: successors: %bb.2(0x80000000)
|
||||
; CHECK-NEXT: liveins: $x1
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: INLINEASM &".space 4096", 1 /* sideeffect attdialect */
|
||||
; CHECK-NEXT: INLINEASM &".space 4096", sideeffect attdialect
|
||||
; CHECK-NEXT: BGE $x1, $x0, %bb.2
|
||||
; CHECK-NEXT: {{ $}}
|
||||
; CHECK-NEXT: bb.2:
|
||||
@@ -32,7 +32,7 @@ body: |
|
||||
PseudoBR %bb.3
|
||||
bb.1:
|
||||
liveins: $x1
|
||||
INLINEASM &".space 4096", 1
|
||||
INLINEASM &".space 4096", sideeffect attdialect
|
||||
BGE $x1, $x0, %bb.3
|
||||
bb.3:
|
||||
PseudoRET
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user