a84ae9c2dd
The usual path for lowering immediates in AArch64 is to generate a MOVi32imm or MOVi64imm pseudo instruction, that can be moved / rematerialized around as required, being expanded into one or multiple instructions after register allocation. The code for the MachineCombiner was generating MOVN/ORR/MOVZ directly. This converts them to use the pseudos, allowing the generated immediates to be materialized if required. The code is hopefully simpler as a result, and the Sub and Add patterns have been combined to reduce duplication.
148 lines
5.0 KiB
YAML
148 lines
5.0 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-combiner -verify-machineinstrs -o - %s | FileCheck %s
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---
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name: madd_addwi
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $w0, $w1
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; CHECK-LABEL: name: madd_addwi
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = nsw MOVi32imm 79
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; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32common = nsw MADDWrrr [[COPY1]], [[COPY]], [[MOVi32imm]]
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; CHECK-NEXT: $w0 = COPY [[MADDWrrr]]
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:gpr32 = COPY $w0
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%1:gpr32 = COPY $w1
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%2:gpr32common = nsw MADDWrrr %1:gpr32, %0:gpr32, $wzr
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%3:gpr32sp = nsw ADDWri killed %2:gpr32common, 79, 0
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$w0 = COPY %3:gpr32sp
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RET_ReallyLR implicit $w0
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...
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---
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name: madd_addxi
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x0, $x1
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; CHECK-LABEL: name: madd_addxi
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; CHECK: liveins: $x0, $x1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[MOVi64imm:%[0-9]+]]:gpr64 = nsw MOVi64imm 79
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; CHECK-NEXT: [[MADDXrrr:%[0-9]+]]:gpr64common = nsw MADDXrrr [[COPY1]], [[COPY]], [[MOVi64imm]]
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; CHECK-NEXT: $x0 = COPY [[MADDXrrr]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:gpr64 = COPY $x0
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%1:gpr64 = COPY $x1
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%2:gpr64common = nsw MADDXrrr %1:gpr64, %0:gpr64, $xzr
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%3:gpr64sp = nsw ADDXri killed %2:gpr64common, 79, 0
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$x0 = COPY %3:gpr64sp
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RET_ReallyLR implicit $x0
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...
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---
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name: madd_subwi
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $w0, $w1
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; CHECK-LABEL: name: madd_subwi
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = nsw MOVi32imm -1
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; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32 = nsw MADDWrrr [[COPY1]], [[COPY]], [[MOVi32imm]]
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; CHECK-NEXT: $w0 = COPY [[MADDWrrr]]
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:gpr32 = COPY $w0
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%1:gpr32 = COPY $w1
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%2:gpr32common = nsw MADDWrrr %1:gpr32, %0:gpr32, $wzr
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%3:gpr32 = nsw SUBSWri killed %2:gpr32common, 1, 0, implicit-def dead $nzcv
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$w0 = COPY %3:gpr32
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RET_ReallyLR implicit $w0
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...
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---
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name: madd_subxi
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x0, $x1
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; CHECK-LABEL: name: madd_subxi
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; CHECK: liveins: $x0, $x1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[MOVi64imm:%[0-9]+]]:gpr64 = nsw MOVi64imm -1
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; CHECK-NEXT: [[MADDXrrr:%[0-9]+]]:gpr64 = nsw MADDXrrr [[COPY1]], [[COPY]], [[MOVi64imm]]
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; CHECK-NEXT: $x0 = COPY [[MADDXrrr]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:gpr64 = COPY $x0
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%1:gpr64 = COPY $x1
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%2:gpr64common = nsw MADDXrrr %1:gpr64, %0:gpr64, $xzr
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%3:gpr64 = nsw SUBSXri killed %2:gpr64common, 1, 0, implicit-def dead $nzcv
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$x0 = COPY %3:gpr64
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RET_ReallyLR implicit $x0
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...
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---
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name: madd_addorwi
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $w0, $w1
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; CHECK-LABEL: name: madd_addorwi
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; CHECK: liveins: $w0, $w1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
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; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = nsw MOVi32imm 16773120
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; CHECK-NEXT: [[MADDWrrr:%[0-9]+]]:gpr32common = nsw MADDWrrr [[COPY1]], [[COPY]], [[MOVi32imm]]
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; CHECK-NEXT: $w0 = COPY [[MADDWrrr]]
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:gpr32 = COPY $w0
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%1:gpr32 = COPY $w1
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%2:gpr32common = nsw MADDWrrr %1:gpr32, %0:gpr32, $wzr
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%3:gpr32sp = nsw ADDWri killed %2:gpr32common, 4095, 12
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$w0 = COPY %3:gpr32sp
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RET_ReallyLR implicit $w0
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...
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---
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name: madd_addorxi
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alignment: 4
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $x0, $x1
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; CHECK-LABEL: name: madd_addorxi
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; CHECK: liveins: $x0, $x1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
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; CHECK-NEXT: [[MOVi64imm:%[0-9]+]]:gpr64 = nsw MOVi64imm 16773120
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; CHECK-NEXT: [[MADDXrrr:%[0-9]+]]:gpr64common = nsw MADDXrrr [[COPY1]], [[COPY]], [[MOVi64imm]]
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; CHECK-NEXT: $x0 = COPY [[MADDXrrr]]
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; CHECK-NEXT: RET_ReallyLR implicit $x0
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%0:gpr64 = COPY $x0
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%1:gpr64 = COPY $x1
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%2:gpr64common = nsw MADDXrrr %1:gpr64, %0:gpr64, $xzr
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%3:gpr64sp = nsw ADDXri killed %2:gpr64common, 4095, 12
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$x0 = COPY %3:gpr64sp
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RET_ReallyLR implicit $x0
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...
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