89a4bcf023
Replace the single `cir.binop` operation (dispatched via a `BinOpKind` enum) with nine distinct ops — `cir.add`, `cir.sub`, `cir.mul`, `cir.div`, `cir.rem`, `cir.and`, `cir.or`, `cir.xor`, and `cir.max` — each with precise type constraints and only the attributes it needs (nsw/nuw/sat on add/sub via `BinaryOverflowOp`). A new `BinaryOpInterface` provides uniform `getLhs`/`getRhs`/`getResult` access for passes and analyses. The monolithic switch-based CIRToLLVMBinOpLowering is replaced by per-op patterns generated through the existing CIRLowering.inc TableGen infrastructure, with shared dispatch factored into two helpers: `lowerSaturatableArithOp` for add/sub and `lowerIntFPBinaryOp` for div/rem.
52 lines
2.3 KiB
C++
52 lines
2.3 KiB
C++
// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-cir %s -o %t.cir
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// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
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// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-llvm %s -o %t-cir.ll
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// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM
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// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -emit-llvm %s -o %t.ll
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// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG
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template <typename T> void summable(T a) {
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if (requires { a + a; }) {
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T b = a + a;
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}
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}
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// CIR: %[[A_ADDR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["a", init]
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// CIR: cir.store %[[ARG_A:.*]], %[[A_ADDR]] : !s32i, !cir.ptr<!s32i>
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// CIR: cir.scope {
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// CIR: %[[CONST_TRUE:.*]] = cir.const #true
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// CIR: cir.if %[[CONST_TRUE]] {
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// CIR: %[[B_ADDR:.*]] = cir.alloca !s32i, !cir.ptr<!s32i>, ["b", init]
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// CIR: %[[TMP_A_1:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!s32i>, !s32i
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// CIR: %[[TMP_A_2:.*]] = cir.load {{.*}} %[[A_ADDR]] : !cir.ptr<!s32i>, !s32i
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// CIR: %[[RESULT:.*]] = cir.add nsw %[[TMP_A_1]], %[[TMP_A_2]] : !s32i
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// CIR: cir.store {{.*}} %[[RESULT]], %[[B_ADDR]] : !s32i, !cir.ptr<!s32i>
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// CIR: }
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// CIR: }
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// LLVM: %[[B_ADDR:.*]] = alloca i32, i64 1, align 4
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// LLVM: %[[A_ADDR:.*]] = alloca i32, i64 1, align 4
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// LLVM: store i32 %[[ARG_A:.*]], ptr %[[A_ADDR]], align 4
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// LLVM: br label %[[IF_COND:.*]]
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// LLVM: [[IF_COND]]:
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// LLVM: br i1 true, label %[[IF_THEN:.*]], label %[[IF_END:.*]]
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// LLVM: [[IF_THEN]]:
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// LLVM: %[[TMP_A_1:.*]] = load i32, ptr %[[A_ADDR]], align 4
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// LLVM: %[[TMP_A_2:.*]] = load i32, ptr %[[A_ADDR]], align 4
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// LLVM: %[[RESULT:.*]] = add nsw i32 %[[TMP_A_1]], %[[TMP_A_2]]
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// LLVM: store i32 %[[RESULT]], ptr %[[B_ADDR]], align 4
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// LLVM: br label %[[IF_END]]
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// LLVM: [[IF_END]]:
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// LLVM: br label %[[RET:.*]]
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// OGCG: %[[A_ADDR:.*]] = alloca i32, align 4
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// OGCG: %[[B_ADDR:.*]] = alloca i32, align 4
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// OGCG: store i32 %[[ARG_A:.*]], ptr %[[A_ADDR]], align 4
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// OGCG: %[[TMP_A_1:.*]] = load i32, ptr %[[A_ADDR]], align 4
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// OGCG: %[[TMP_A_2:.*]] = load i32, ptr %[[A_ADDR]], align 4
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// OGCG: %[[RESULT:.*]] = add nsw i32 %[[TMP_A_1]], %[[TMP_A_2]]
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// OGCG: store i32 %[[RESULT]], ptr %[[B_ADDR]], align 4
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void call_function_with_requires_expr() { summable(1); }
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