94d4cb5f7b
Similar to what I did for return types in #181052, this patch adds support for 4 of the function attributes on arguments (noundef, nonnull, dereferenceable, align). The logic for these is all pretty similar (though SLIGHTLY different enough from eachother unfortunately), so they are being submitted together. This handles 'this' and normal arguments.
184 lines
8.3 KiB
C++
184 lines
8.3 KiB
C++
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -mconstructor-aliases -fno-rtti -fclangir -emit-cir %s -o %t.cir
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// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -mconstructor-aliases -fno-rtti -fclangir -emit-llvm %s -o %t-cir.ll
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// RUN: FileCheck --check-prefix=LLVM --input-file=%t-cir.ll %s
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// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -mconstructor-aliases -fno-rtti -emit-llvm %s -o %t.ll
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// RUN: FileCheck --check-prefix=OGCG --input-file=%t.ll %s
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// Note: This test is using -fno-rtti so that we can delay implemntation of that handling.
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// When rtti handling for vtables is implemented, that option should be removed.
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class Mother {
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public:
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virtual void MotherKey();
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void simple() { }
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virtual void MotherNonKey() {}
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};
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class Father {
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public:
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virtual void FatherKey();
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};
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class Child : public Mother, public Father {
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public:
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Child();
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void MotherKey() override;
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};
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void Mother::MotherKey() {}
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void Father::FatherKey() {}
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void Child::MotherKey() {}
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// CIR-DAG: [[MOTHER_VTABLE_TYPE:.*]] = !cir.record<struct {!cir.array<!cir.ptr<!u8i> x 4>}>
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// CIR-DAG: [[FATHER_VTABLE_TYPE:.*]] = !cir.record<struct {!cir.array<!cir.ptr<!u8i> x 3>}>
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// CIR-DAG: [[CHILD_VTABLE_TYPE:.*]] = !cir.record<struct {!cir.array<!cir.ptr<!u8i> x 4>, !cir.array<!cir.ptr<!u8i> x 3>}>
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// CIR-DAG: !rec_Father = !cir.record<class "Father" {!cir.vptr}
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// CIR-DAG: !rec_Mother = !cir.record<class "Mother" {!cir.vptr}
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// CIR-DAG: !rec_Child = !cir.record<class "Child" {!rec_Mother, !rec_Father}
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// Child vtable
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// CIR: cir.global "private" external @_ZTV5Child = #cir.vtable<{
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// CIR-SAME: #cir.const_array<[
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// CIR-SAME: #cir.ptr<null> : !cir.ptr<!u8i>,
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// CIR-SAME: #cir.ptr<null> : !cir.ptr<!u8i>,
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// CIR-SAME: #cir.global_view<@_ZN5Child9MotherKeyEv> : !cir.ptr<!u8i>,
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// CIR-SAME: #cir.global_view<@_ZN6Mother12MotherNonKeyEv> : !cir.ptr<!u8i>
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// CIR-SAME: ]> : !cir.array<!cir.ptr<!u8i> x 4>,
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// CIR-SAME: #cir.const_array<[
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// CIR-SAME: #cir.ptr<-8 : i64> : !cir.ptr<!u8i>,
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// CIR-SAME: #cir.ptr<null> : !cir.ptr<!u8i>,
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// CIR-SAME: #cir.global_view<@_ZN6Father9FatherKeyEv> : !cir.ptr<!u8i>
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// CIR-SAME: ]> : !cir.array<!cir.ptr<!u8i> x 3>
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// CIR-SAME: }> : [[CHILD_VTABLE_TYPE]]
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// LLVM: @_ZTV5Child = global { [4 x ptr], [3 x ptr] } {
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// LLVM-SAME: [4 x ptr] [
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// LLVM-SAME: ptr null,
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// LLVM-SAME: ptr null,
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// LLVM-SAME: ptr @_ZN5Child9MotherKeyEv,
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// LLVM-SAME: ptr @_ZN6Mother12MotherNonKeyEv
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// LLVM-SAME: ],
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// LLVM-SAME: [3 x ptr] [
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// LLVM-SAME: ptr inttoptr (i64 -8 to ptr),
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// LLVM-SAME: ptr null,
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// LLVM-SAME: ptr @_ZN6Father9FatherKeyEv
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// LLVM-SAME: ]
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// LLVM-SAME: }
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// OGCG: @_ZTV5Child = unnamed_addr constant { [4 x ptr], [3 x ptr] } {
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// OGCG-SAME: [4 x ptr] [
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// OGCG-SAME: ptr null,
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// OGCG-SAME: ptr null,
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// OGCG-SAME: ptr @_ZN5Child9MotherKeyEv,
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// OGCG-SAME: ptr @_ZN6Mother12MotherNonKeyEv
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// OGCG-SAME: ],
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// OGCG-SAME: [3 x ptr] [
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// OGCG-SAME: ptr inttoptr (i64 -8 to ptr),
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// OGCG-SAME: ptr null,
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// OGCG-SAME: ptr @_ZN6Father9FatherKeyEv
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// OGCG-SAME: ]
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// OGCG-SAME: }
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// Mother vtable
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// CIR: cir.global "private" external @_ZTV6Mother = #cir.vtable<{
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// CIR-SAME: #cir.const_array<[
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// CIR-SAME: #cir.ptr<null> : !cir.ptr<!u8i>,
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// CIR-SAME: #cir.ptr<null> : !cir.ptr<!u8i>,
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// CIR-SAME: #cir.global_view<@_ZN6Mother9MotherKeyEv> : !cir.ptr<!u8i>,
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// CIR-SAME: #cir.global_view<@_ZN6Mother12MotherNonKeyEv> : !cir.ptr<!u8i>
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// CIR-SAME: ]> : !cir.array<!cir.ptr<!u8i> x 4>
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// CIR-SAME: }> : [[MOTHER_VTABLE_TYPE]]
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// LLVM: @_ZTV6Mother = global { [4 x ptr] } {
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// LLVM-SAME: [4 x ptr] [
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// LLVM-SAME: ptr null,
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// LLVM-SAME: ptr null,
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// LLVM-SAME: ptr @_ZN6Mother9MotherKeyEv,
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// LLVM-SAME: ptr @_ZN6Mother12MotherNonKeyEv
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// LLVM-SAME: ]
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// LLVM-SAME: }
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// OGCG: @_ZTV6Mother = unnamed_addr constant { [4 x ptr] } {
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// OGCG-SAME: [4 x ptr] [
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// OGCG-SAME: ptr null,
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// OGCG-SAME: ptr null,
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// OGCG-SAME: ptr @_ZN6Mother9MotherKeyEv,
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// OGCG-SAME: ptr @_ZN6Mother12MotherNonKeyEv
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// OGCG-SAME: ]
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// OGCG-SAME: }
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// Father vtable
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// CIR: cir.global "private" external @_ZTV6Father = #cir.vtable<{
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// CIR-SAME: #cir.const_array<[
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// CIR-SAME: #cir.ptr<null> : !cir.ptr<!u8i>,
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// CIR-SAME: #cir.ptr<null> : !cir.ptr<!u8i>,
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// CIR-SAME: #cir.global_view<@_ZN6Father9FatherKeyEv> : !cir.ptr<!u8i>
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// CIR-SAME: ]> : !cir.array<!cir.ptr<!u8i> x 3>
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// CIR-SAME: }> : [[FATHER_VTABLE_TYPE]]
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// LLVM: @_ZTV6Father = global { [3 x ptr] } {
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// LLVM-SAME: [3 x ptr] [
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// LLVM-SAME: ptr null,
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// LLVM-SAME: ptr null,
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// LLVM-SAME: ptr @_ZN6Father9FatherKeyEv
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// LLVM-SAME: ]
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// LLVM-SAME: }
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// OGCG: @_ZTV6Father = unnamed_addr constant { [3 x ptr] } {
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// OGCG-SAME: [3 x ptr] [
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// OGCG-SAME: ptr null,
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// OGCG-SAME: ptr null,
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// OGCG-SAME: ptr @_ZN6Father9FatherKeyEv
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// OGCG-SAME: ]
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// OGCG-SAME: }
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Child::Child() {}
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// CIR: cir.func {{.*}} @_ZN5ChildC2Ev(%[[THIS_ARG:.*]]: !cir.ptr<!rec_Child>
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// CIR: %[[THIS_ADDR:.*]] = cir.alloca {{.*}} ["this", init]
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// CIR: cir.store %[[THIS_ARG]], %[[THIS_ADDR]]
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// CIR: %[[THIS:.*]] = cir.load %[[THIS_ADDR]]
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// CIR: %[[MOTHER_BASE:.*]] = cir.base_class_addr %[[THIS]] : !cir.ptr<!rec_Child> nonnull [0] -> !cir.ptr<!rec_Mother>
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// CIR: cir.call @_ZN6MotherC2Ev(%[[MOTHER_BASE]]) nothrow : (!cir.ptr<!rec_Mother> {{.*}}) -> ()
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// CIR: %[[FATHER_BASE:.*]] = cir.base_class_addr %[[THIS]] : !cir.ptr<!rec_Child> nonnull [8] -> !cir.ptr<!rec_Father>
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// CIR: cir.call @_ZN6FatherC2Ev(%[[FATHER_BASE]]) nothrow : (!cir.ptr<!rec_Father> {{.*}}) -> ()
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// CIR: %[[CHILD_VPTR:.*]] = cir.vtable.address_point(@_ZTV5Child, address_point = <index = 0, offset = 2>) : !cir.vptr
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// CIR: %[[CHILD_VPTR_ADDR:.*]] = cir.vtable.get_vptr %[[THIS]] : !cir.ptr<!rec_Child> -> !cir.ptr<!cir.vptr>
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// CIR: cir.store{{.*}} %[[CHILD_VPTR]], %[[CHILD_VPTR_ADDR]] : !cir.vptr, !cir.ptr<!cir.vptr>
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// CIR: %[[FATHER_IN_CHILD_VPTR:.*]] = cir.vtable.address_point(@_ZTV5Child, address_point = <index = 1, offset = 2>) : !cir.vptr
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// CIR: %[[FATHER_BASE:.*]] = cir.base_class_addr %[[THIS]] : !cir.ptr<!rec_Child> nonnull [8] -> !cir.ptr<!rec_Father>
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// CIR: %[[FATHER_IN_CHILD_VPTR_ADDR:.*]] = cir.vtable.get_vptr %[[FATHER_BASE]] : !cir.ptr<!rec_Father> -> !cir.ptr<!cir.vptr>
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// CIR: cir.store{{.*}} %[[FATHER_IN_CHILD_VPTR]], %[[FATHER_IN_CHILD_VPTR_ADDR]] : !cir.vptr, !cir.ptr<!cir.vptr>
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// CIR: cir.return
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// The GEP instructions are different between LLVM and OGCG, but they calculate the same addresses.
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// LLVM: define{{.*}} void @_ZN5ChildC2Ev(ptr{{.*}} %[[THIS_ARG:.*]])
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// LLVM: %[[THIS_ADDR:.*]] = alloca ptr
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// LLVM: store ptr %[[THIS_ARG]], ptr %[[THIS_ADDR]]
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// LLVM: %[[THIS:.*]] = load ptr, ptr %[[THIS_ADDR]]
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// LLVM: call void @_ZN6MotherC2Ev(ptr{{.*}} %[[THIS]])
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// LLVM: %[[FATHER_BASE:.*]] = getelementptr{{.*}} i8, ptr %[[THIS]], i32 8
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// LLVM: call void @_ZN6FatherC2Ev(ptr{{.*}} %[[FATHER_BASE]])
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// LLVM: store ptr getelementptr inbounds nuw (i8, ptr @_ZTV5Child, i64 16), ptr %[[THIS]]
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// LLVM: %[[FATHER_BASE:.*]] = getelementptr{{.*}} i8, ptr %[[THIS]], i32 8
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// LLVM: store ptr getelementptr inbounds nuw (i8, ptr @_ZTV5Child, i64 48), ptr %[[FATHER_BASE]]
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// LLVM: ret void
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// OGCG: define{{.*}} void @_ZN5ChildC2Ev(ptr{{.*}} %[[THIS_ARG:.*]])
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// OGCG: %[[THIS_ADDR:.*]] = alloca ptr
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// OGCG: store ptr %[[THIS_ARG]], ptr %[[THIS_ADDR]]
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// OGCG: %[[THIS:.*]] = load ptr, ptr %[[THIS_ADDR]]
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// OGCG: call void @_ZN6MotherC2Ev(ptr {{.*}} %[[THIS]])
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// OGCG: %[[FATHER_BASE:.*]] = getelementptr{{.*}} i8, ptr %[[THIS]], i64 8
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// OGCG: call void @_ZN6FatherC2Ev(ptr{{.*}} %[[FATHER_BASE]])
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// OGCG: store ptr getelementptr inbounds inrange(-16, 16) ({ [4 x ptr], [3 x ptr] }, ptr @_ZTV5Child, i32 0, i32 0, i32 2), ptr %[[THIS]]
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// OGCG: %[[FATHER_BASE:.*]] = getelementptr{{.*}} i8, ptr %[[THIS]], i64 8
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// OGCG: store ptr getelementptr inbounds inrange(-16, 8) ({ [4 x ptr], [3 x ptr] }, ptr @_ZTV5Child, i32 0, i32 1, i32 2), ptr %[[FATHER_BASE]]
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// OGCG: ret void
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