fcc61927ad
Struct member accesses via GetMemberOp are always inbounds and cannot unsigned-wrap, matching LLVM's IRBuilder::CreateStructGEP behavior.
100 lines
6.4 KiB
C++
100 lines
6.4 KiB
C++
// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-cir %s -o %t.cir
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// RUN: FileCheck --input-file=%t.cir %s -check-prefix=CIR
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// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -fclangir -emit-llvm %s -o %t-cir.ll
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// RUN: FileCheck --input-file=%t-cir.ll %s -check-prefix=LLVM
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// RUN: %clang_cc1 -std=c++20 -triple x86_64-unknown-linux-gnu -Wno-unused-value -emit-llvm %s -o %t.ll
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// RUN: FileCheck --input-file=%t.ll %s -check-prefix=OGCG
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namespace std {
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template <typename T> class initializer_list {
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const T *data;
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__SIZE_TYPE__ size;
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public:
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initializer_list();
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};
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} // namespace std
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struct Vector {
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Vector(std::initializer_list<int>);
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~Vector();
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};
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void init_vec_using_initalizer_list() {
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Vector vec = {0, 1, 2};
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}
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// CIR: %[[VEC_ADDR:.*]] = cir.alloca !rec_Vector, !cir.ptr<!rec_Vector>, ["vec", init]
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// CIR: %[[AGG_ADDR:.*]] = cir.alloca !rec_std3A3Ainitializer_list3Cint3E, !cir.ptr<!rec_std3A3Ainitializer_list3Cint3E>, ["agg.tmp0"]
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// CIR: %[[INIT_LIST_ADDR:.*]] = cir.alloca !cir.array<!s32i x 3>, !cir.ptr<!cir.array<!s32i x 3>>, ["ref.tmp0"]
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// CIR: %[[INIT_LIST_PTR:.*]] = cir.cast array_to_ptrdecay %[[INIT_LIST_ADDR]] : !cir.ptr<!cir.array<!s32i x 3>> -> !cir.ptr<!s32i>
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// CIR: %[[CONST_S32_0:.*]] = cir.const #cir.int<0> : !s32i
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// CIR: cir.store {{.*}} %[[CONST_S32_0]], %[[INIT_LIST_PTR]] : !s32i, !cir.ptr<!s32i>
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// CIR: %[[CONST_S64_1:.*]] = cir.const #cir.int<1> : !s64i
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// CIR: %[[ELEM_1_PTR:.*]] = cir.ptr_stride %[[INIT_LIST_PTR]], %[[CONST_S64_1]] : (!cir.ptr<!s32i>, !s64i) -> !cir.ptr<!s32i>
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// CIR: %[[CONST_S32_1:.*]] = cir.const #cir.int<1> : !s32i
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// CIR: cir.store {{.*}} %[[CONST_S32_1]], %[[ELEM_1_PTR]] : !s32i, !cir.ptr<!s32i>
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// CIR: %[[CONST_S64_2:.*]] = cir.const #cir.int<2> : !s64i
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// CIR: %[[ELEM_2_PTR:.*]] = cir.ptr_stride %[[INIT_LIST_PTR]], %[[CONST_S64_2]] : (!cir.ptr<!s32i>, !s64i) -> !cir.ptr<!s32i>
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// CIR: %[[CONST_S32_2:.*]] = cir.const #cir.int<2> : !s32i
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// CIR: cir.store {{.*}} %[[CONST_S32_2]], %[[ELEM_2_PTR]] : !s32i, !cir.ptr<!s32i>
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// CIR: %[[DATA_PTR:.*]] = cir.get_member %[[AGG_ADDR]][0] {name = "data"} : !cir.ptr<!rec_std3A3Ainitializer_list3Cint3E> -> !cir.ptr<!cir.ptr<!s32i>>
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// CIR: %[[DATA_ARR_PTR:.*]] = cir.cast bitcast %[[DATA_PTR]] : !cir.ptr<!cir.ptr<!s32i>> -> !cir.ptr<!cir.ptr<!cir.array<!s32i x 3>>>
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// CIR: cir.store {{.*}} %[[INIT_LIST_ADDR]], %[[DATA_ARR_PTR]] : !cir.ptr<!cir.array<!s32i x 3>>, !cir.ptr<!cir.ptr<!cir.array<!s32i x 3>>>
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// CIR: %[[CONST_U64_3:.*]] = cir.const #cir.int<3> : !u64i
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// CIR: %[[SIZE_PTR:.*]] = cir.get_member %[[AGG_ADDR]][1] {name = "size"} : !cir.ptr<!rec_std3A3Ainitializer_list3Cint3E> -> !cir.ptr<!u64i>
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// CIR: cir.store {{.*}} %[[CONST_U64_3]], %[[SIZE_PTR]] : !u64i, !cir.ptr<!u64i>
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// CIR: %[[TMP_AGG:.*]] = cir.load {{.*}} %[[AGG_ADDR]] : !cir.ptr<!rec_std3A3Ainitializer_list3Cint3E>, !rec_std3A3Ainitializer_list3Cint3E
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// CIR: cir.call @_ZN6VectorC1ESt16initializer_listIiE(%[[VEC_ADDR]], %[[TMP_AGG]]) : (!cir.ptr<!rec_Vector> {llvm.align = 1 : i64, llvm.dereferenceable = 1 : i64, llvm.nonnull, llvm.noundef}, !rec_std3A3Ainitializer_list3Cint3E) -> ()
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// CIR: cir.cleanup.scope {
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// CIR: cir.yield
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// CIR: } cleanup normal {
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// CIR: cir.call @_ZN6VectorD1Ev(%[[VEC_ADDR]]) nothrow : (!cir.ptr<!rec_Vector> {llvm.align = 1 : i64, llvm.dereferenceable = 1 : i64, llvm.nonnull, llvm.noundef}) -> ()
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// CIR: cir.yield
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// CIR: }
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// LLVM: %[[VEC_ADDR:.*]] = alloca %struct.Vector, i64 1, align 1
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// LLVM: %[[AGG_ADDR:.*]] = alloca %"class.std::initializer_list<int>", i64 1, align 8
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// LLVM: %[[INIT_LIST_ADDR:.*]] = alloca [3 x i32], i64 1, align 4
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// LLVM: %[[INIT_LIST_PTR:.*]] = getelementptr i32, ptr %[[INIT_LIST_ADDR]], i32 0
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// LLVM: store i32 0, ptr %[[INIT_LIST_PTR]], align 4
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// LLVM: %[[ELEM_1_PTR:.*]] = getelementptr i32, ptr %[[INIT_LIST_PTR]], i64 1
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// LLVM: store i32 1, ptr %[[ELEM_1_PTR]], align 4
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// LLVM: %[[ELEM_2_PTR:.*]] = getelementptr i32, ptr %[[INIT_LIST_PTR]], i64 2
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// LLVM: store i32 2, ptr %[[ELEM_2_PTR]], align 4
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// LLVM: %[[DATA_PTR:.*]] = getelementptr inbounds nuw %"class.std::initializer_list<int>", ptr %[[AGG_ADDR]], i32 0, i32 0
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// LLVM: store ptr %[[INIT_LIST_ADDR]], ptr %[[DATA_PTR]], align 8
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// LLVM: %[[SIZE_PTR:.*]] = getelementptr inbounds nuw %"class.std::initializer_list<int>", ptr %[[AGG_ADDR]], i32 0, i32 1
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// LLVM: store i64 3, ptr %[[SIZE_PTR]], align 8
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// LLVM: %[[TMP_AGG:.*]] = load %"class.std::initializer_list<int>", ptr %[[AGG_ADDR]], align 8
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// LLVM: call void @_ZN6VectorC1ESt16initializer_listIiE(ptr noundef nonnull align 1 dereferenceable(1) %[[VEC_ADDR]], %"class.std::initializer_list<int>" %[[TMP_AGG]])
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// LLVM: br label %[[SCOPE_CONT:.*]]
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// LLVM: [[SCOPE_CONT]]:
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// LLVM: br label %[[CLEANUP_START:.*]]
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// LLVM: [[CLEANUP_START]]:
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// LLVM: call void @_ZN6VectorD1Ev(ptr noundef nonnull align 1 dereferenceable(1) %[[VEC_ADDR]])
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// LLVM: br label %[[CLEANUP_CONT:.*]]
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// LLVM: [[CLEANUP_CONT]]:
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// LLVM: br label %[[DONE:.*]]
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// LLVM: [[DONE]]:
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// LLVM: ret void
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// OGCG: %[[VEC_ADDR:.*]] = alloca %struct.Vector, align 1
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// OGCG: %[[AGG_ADDR:.*]] = alloca %"class.std::initializer_list", align 8
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// OGCG: %[[INIT_LIST_ADDR:.*]] = alloca [3 x i32], align 4
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// OGCG: store i32 0, ptr %[[INIT_LIST_ADDR]], align 4
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// OGCG: %[[ELEM_1_PTR:.*]] = getelementptr inbounds i32, ptr %[[INIT_LIST_ADDR]], i64 1
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// OGCG: store i32 1, ptr %[[ELEM_1_PTR]], align 4
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// OGCG: %[[ELEM_2_PTR:.*]] = getelementptr inbounds i32, ptr %[[INIT_LIST_ADDR]], i64 2
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// OGCG: store i32 2, ptr %[[ELEM_2_PTR]], align 4
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// OGCG: %[[DATA_PTR:.*]] = getelementptr inbounds nuw %"class.std::initializer_list", ptr %[[AGG_ADDR]], i32 0, i32 0
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// OGCG: store ptr %ref.tmp, ptr %[[DATA_PTR]], align 8
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// OGCG: %[[SIZE_PTR:.*]] = getelementptr inbounds nuw %"class.std::initializer_list", ptr %[[AGG_ADDR]], i32 0, i32 1
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// OGCG: store i64 3, ptr %[[SIZE_PTR]], align 8
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// OGCG: %[[DATA_PTR:.*]] = getelementptr inbounds nuw { ptr, i64 }, ptr %[[AGG_ADDR]], i32 0, i32 0
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// OGCG: %[[TMP_DATA:.*]] = load ptr, ptr %[[DATA_PTR]], align 8
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// OGCG: %[[SIZE_PTR:.*]] = getelementptr inbounds nuw { ptr, i64 }, ptr %[[AGG_ADDR]], i32 0, i32 1
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// OGCG: %[[TMP_SIZE:.*]] = load i64, ptr %[[SIZE_PTR]], align 8
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// OGCG: call void @_ZN6VectorC1ESt16initializer_listIiE(ptr noundef nonnull align 1 dereferenceable(1) %[[VEC_ADDR]], ptr %[[TMP_DATA]], i64 %[[TMP_SIZE]])
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// OGCG: call void @_ZN6VectorD1Ev(ptr noundef nonnull align 1 dereferenceable(1) %[[VEC_ADDR]])
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