[X86] Add basic ISD::VECREDUCE_AND/OR/XOR handling (#195063)
Custom lower ISD::VECREDUCE_AND/OR/XOR using vector logic ops Handling of any_of/all_of/parity patterns will happen later once we start dismantling combinePredicateReduction()
This commit is contained in:
Simon Pilgrim
@@ -1159,6 +1159,9 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setOperationAction(ISD::SMIN, VT, VT == MVT::v8i16 ? Legal : Custom);
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setOperationAction(ISD::UMAX, VT, VT == MVT::v16i8 ? Legal : Custom);
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setOperationAction(ISD::UMIN, VT, VT == MVT::v16i8 ? Legal : Custom);
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setOperationAction(ISD::VECREDUCE_AND, VT, Custom);
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setOperationAction(ISD::VECREDUCE_OR, VT, Custom);
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setOperationAction(ISD::VECREDUCE_XOR, VT, Custom);
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}
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// SSE2 can use basic vector unrolling.
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@@ -1552,6 +1555,9 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setOperationAction(ISD::SRA, VT, Custom);
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setOperationAction(ISD::ABDS, VT, Custom);
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setOperationAction(ISD::ABDU, VT, Custom);
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setOperationAction(ISD::VECREDUCE_AND, VT, Custom);
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setOperationAction(ISD::VECREDUCE_OR, VT, Custom);
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setOperationAction(ISD::VECREDUCE_XOR, VT, Custom);
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if (VT == MVT::v4i64) continue;
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setOperationAction(ISD::ROTL, VT, Custom);
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setOperationAction(ISD::ROTR, VT, Custom);
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@@ -2021,6 +2027,9 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM,
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setOperationAction(ISD::ABDS, VT, Custom);
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setOperationAction(ISD::ABDU, VT, Custom);
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setOperationAction(ISD::BITREVERSE, VT, Custom);
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setOperationAction(ISD::VECREDUCE_AND, VT, Custom);
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setOperationAction(ISD::VECREDUCE_OR, VT, Custom);
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setOperationAction(ISD::VECREDUCE_XOR, VT, Custom);
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// The condition codes aren't legal in SSE/AVX and under AVX512 we use
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// setcc all the way to isel and prefer SETGT in some isel patterns.
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@@ -29648,6 +29657,43 @@ static SDValue LowerCTTZ(SDValue Op, const X86Subtarget &Subtarget,
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return DAG.getNode(X86ISD::CMOV, dl, VT, Ops);
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}
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// Generic x86 vector reduction expansion.
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static SDValue LowerVECREDUCE(SDValue Op, const X86Subtarget &Subtarget,
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SelectionDAG &DAG) {
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ISD::NodeType BinOp = ISD::getVecReduceBaseOpcode(Op.getOpcode());
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assert(DAG.getTargetLoweringInfo().isBinOp(BinOp) &&
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"Only binops expected to be used by reductions");
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EVT ExtractVT = Op.getValueType();
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SDValue Src = Op.getOperand(0);
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EVT SrcVT = Src.getValueType();
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EVT SrcSVT = SrcVT.getScalarType();
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SDLoc DL(Op);
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if (SrcSVT != ExtractVT || (SrcVT.getSizeInBits() % 128) != 0)
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return SDValue();
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// Split vector down to 128-bits, performing bin to lo/hi subvectors.
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while (SrcVT.getSizeInBits() > 128) {
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SDValue Lo, Hi;
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std::tie(Lo, Hi) = splitVector(Src, DAG, DL);
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SrcVT = Lo.getValueType();
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Src = DAG.getNode(BinOp, DL, SrcVT, Lo, Hi);
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}
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assert(SrcVT.is128BitVector() && "Unexpected value type");
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// Expand 128-bit shuffle tree + reduction binops.
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unsigned NumSrcElts = SrcVT.getVectorNumElements();
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for (unsigned NumElts = NumSrcElts; NumElts != 1; NumElts /= 2) {
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SmallVector<int, 16> Mask(NumSrcElts, -1);
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std::iota(Mask.begin(), Mask.begin() + (NumElts / 2), NumElts / 2);
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SDValue Upper =
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DAG.getVectorShuffle(SrcVT, DL, Src, DAG.getUNDEF(SrcVT), Mask);
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Src = DAG.getNode(BinOp, DL, SrcVT, Src, Upper);
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}
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return DAG.getExtractVectorElt(DL, ExtractVT, Src, 0);
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}
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static SDValue lowerAddSub(SDValue Op, SelectionDAG &DAG,
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const X86Subtarget &Subtarget) {
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MVT VT = Op.getSimpleValueType();
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@@ -34480,6 +34526,9 @@ SDValue X86TargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
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case ISD::VECREDUCE_SMIN:
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case ISD::VECREDUCE_UMAX:
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case ISD::VECREDUCE_UMIN: return LowerMINMAX_REDUCE(Op, Subtarget, DAG);
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case ISD::VECREDUCE_AND:
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case ISD::VECREDUCE_OR:
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case ISD::VECREDUCE_XOR: return LowerVECREDUCE(Op, Subtarget, DAG);
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case ISD::FMINIMUM:
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case ISD::FMAXIMUM:
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case ISD::FMINIMUMNUM:
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@@ -8,35 +8,30 @@
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define i32 @extract_last_active_v4i32(<4 x i32> %a, <4 x i1> %c) {
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; CHECK-LABEL: extract_last_active_v4i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[3,3,3,3]
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; CHECK-NEXT: movd %xmm2, %eax
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
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; CHECK-NEXT: movd %xmm2, %ecx
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; CHECK-NEXT: movd %xmm1, %edx
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
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; CHECK-NEXT: movd %xmm2, %esi
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; CHECK-NEXT: por %xmm1, %xmm2
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; CHECK-NEXT: pslld $31, %xmm1
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; CHECK-NEXT: psrad $31, %xmm1
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; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
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; CHECK-NEXT: movd %xmm0, %edi
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
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; CHECK-NEXT: movd %xmm0, %r8d
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; CHECK-NEXT: cmpl %edi, %r8d
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; CHECK-NEXT: cmoval %r8d, %edi
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[3,3,3,3]
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; CHECK-NEXT: movd %xmm0, %r8d
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; CHECK-NEXT: cmpl %r8d, %edi
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; CHECK-NEXT: cmovbel %r8d, %edi
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; CHECK-NEXT: orl %edx, %esi
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; CHECK-NEXT: orl %eax, %ecx
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; CHECK-NEXT: orl %esi, %ecx
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,1,1]
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; CHECK-NEXT: por %xmm2, %xmm0
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; CHECK-NEXT: movd %xmm0, %ecx
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; CHECK-NEXT: andb $1, %cl
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpb $1, %cl
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; CHECK-NEXT: sbbl %eax, %eax
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; CHECK-NEXT: orl -24(%rsp,%rdi,4), %eax
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
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; CHECK-NEXT: movd %xmm0, %ecx
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
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; CHECK-NEXT: movd %xmm0, %edx
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; CHECK-NEXT: cmpl %ecx, %edx
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; CHECK-NEXT: cmoval %edx, %ecx
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[3,3,3,3]
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; CHECK-NEXT: movd %xmm0, %edx
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; CHECK-NEXT: cmpl %edx, %ecx
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; CHECK-NEXT: cmovbel %edx, %ecx
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; CHECK-NEXT: orl -24(%rsp,%rcx,4), %eax
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; CHECK-NEXT: retq
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%res = call i32 @llvm.experimental.vector.extract.last.active.v4i32(<4 x i32> %a, <4 x i1> %c, i32 -1)
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ret i32 %res
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@@ -70,11 +65,10 @@ define i32 @extract_last_active_v2i32(<2 x i32> %a, <2 x i1> %c) {
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; CHECK-LABEL: extract_last_active_v2i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
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; CHECK-NEXT: movq %xmm1, %rax
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; CHECK-NEXT: por %xmm1, %xmm2
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; CHECK-NEXT: psllq $63, %xmm1
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; CHECK-NEXT: movq %xmm2, %rcx
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; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: orl %eax, %ecx
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; CHECK-NEXT: movq %xmm2, %rcx
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; CHECK-NEXT: andb $1, %cl
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpb $1, %cl
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@@ -94,28 +88,31 @@ define i32 @extract_last_active_v2i32(<2 x i32> %a, <2 x i1> %c) {
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define i32 @extract_last_active_v3i32(<3 x i32> %a, <3 x i1> %c) {
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; CHECK-LABEL: extract_last_active_v3i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movd %edx, %xmm0
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; CHECK-NEXT: movd %esi, %xmm1
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; CHECK-NEXT: shufps {{.*#+}} xmm1 = xmm1[1,0],xmm0[0,1]
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; CHECK-NEXT: pslld $31, %xmm1
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; CHECK-NEXT: psrad $31, %xmm1
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
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; CHECK-NEXT: movd %edi, %xmm2
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; CHECK-NEXT: movdqa %xmm2, %xmm3
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; CHECK-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
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; CHECK-NEXT: movd %edx, %xmm4
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; CHECK-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0]
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; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: pslld $31, %xmm3
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; CHECK-NEXT: psrad $31, %xmm3
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm3[2,3,2,3]
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; CHECK-NEXT: movd %xmm0, %ecx
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,1,1]
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: cmpl %ecx, %eax
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; CHECK-NEXT: cmoval %eax, %ecx
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm1[3,3,3,3]
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; CHECK-NEXT: movd %xmm0, %eax
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; CHECK-NEXT: cmpl %eax, %ecx
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; CHECK-NEXT: cmovbel %eax, %ecx
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; CHECK-NEXT: orl %esi, %edi
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; CHECK-NEXT: orl %edx, %edi
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; CHECK-NEXT: andb $1, %dil
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpb $1, %dil
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; CHECK-NEXT: cmpl $0, %ecx
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; CHECK-NEXT: cmovbel %eax, %ecx
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; CHECK-NEXT: por %xmm4, %xmm2
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; CHECK-NEXT: por %xmm1, %xmm2
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; CHECK-NEXT: movd %xmm2, %edx
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; CHECK-NEXT: andb $1, %dl
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; CHECK-NEXT: cmpb $1, %dl
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; CHECK-NEXT: sbbl %eax, %eax
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; CHECK-NEXT: orl -24(%rsp,%rcx,4), %eax
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; CHECK-NEXT: retq
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@@ -127,21 +124,18 @@ define i32 @extract_last_active_v3i32(<3 x i32> %a, <3 x i1> %c) {
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define i32 @extract_last_active_v8i32(<8 x i32> %a, <8 x i1> %c) {
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; CHECK-LABEL: extract_last_active_v8i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm3 = xmm2[2,3,2,3]
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; CHECK-NEXT: por %xmm2, %xmm3
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; CHECK-NEXT: psllw $15, %xmm2
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; CHECK-NEXT: psraw $15, %xmm2
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; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
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; CHECK-NEXT: psubusw %xmm2, %xmm0
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; CHECK-NEXT: paddw %xmm2, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
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; CHECK-NEXT: psubusw %xmm0, %xmm1
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; CHECK-NEXT: paddw %xmm0, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: psrld $16, %xmm0
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; CHECK-NEXT: psubusw %xmm1, %xmm0
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; CHECK-NEXT: paddw %xmm1, %xmm0
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; CHECK-NEXT: movd %xmm0, %ecx
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,1,1,1]
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; CHECK-NEXT: por %xmm3, %xmm0
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; CHECK-NEXT: movdqa %xmm0, %xmm1
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; CHECK-NEXT: psrld $16, %xmm1
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; CHECK-NEXT: por %xmm0, %xmm1
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; CHECK-NEXT: movd %xmm1, %ecx
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; CHECK-NEXT: andb $1, %cl
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpb $1, %cl
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@@ -169,31 +163,18 @@ define i32 @extract_last_active_v8i32(<8 x i32> %a, <8 x i1> %c) {
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define i32 @extract_last_active_v16i32(<16 x i32> %a, <16 x i1> %c) {
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; CHECK-LABEL: extract_last_active_v16i32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pshufd {{.*#+}} xmm5 = xmm4[2,3,2,3]
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; CHECK-NEXT: por %xmm4, %xmm5
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; CHECK-NEXT: psllw $7, %xmm4
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; CHECK-NEXT: pxor %xmm5, %xmm5
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; CHECK-NEXT: pcmpgtb %xmm4, %xmm5
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; CHECK-NEXT: pxor %xmm6, %xmm6
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; CHECK-NEXT: pcmpgtb %xmm4, %xmm6
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; CHECK-NEXT: movaps %xmm3, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm2, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm5[2,3,2,3]
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; CHECK-NEXT: pmaxub %xmm5, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
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; CHECK-NEXT: pmaxub %xmm0, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: psrld $16, %xmm0
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; CHECK-NEXT: pmaxub %xmm1, %xmm0
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; CHECK-NEXT: movdqa %xmm0, %xmm1
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; CHECK-NEXT: psrlw $8, %xmm1
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; CHECK-NEXT: pmaxub %xmm0, %xmm1
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; CHECK-NEXT: movd %xmm1, %ecx
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; CHECK-NEXT: andb $1, %cl
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpb $1, %cl
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; CHECK-NEXT: sbbl %eax, %eax
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm5[2,3,2,3]
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; CHECK-NEXT: pmaxub %xmm5, %xmm0
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; CHECK-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm6[2,3,2,3]
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; CHECK-NEXT: pmaxub %xmm6, %xmm0
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; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
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; CHECK-NEXT: pmaxub %xmm0, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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@@ -204,6 +185,19 @@ define i32 @extract_last_active_v16i32(<16 x i32> %a, <16 x i1> %c) {
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; CHECK-NEXT: pmaxub %xmm0, %xmm1
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; CHECK-NEXT: movd %xmm1, %ecx
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; CHECK-NEXT: andl $15, %ecx
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm5[1,1,1,1]
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; CHECK-NEXT: por %xmm5, %xmm0
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; CHECK-NEXT: movdqa %xmm0, %xmm1
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; CHECK-NEXT: psrld $16, %xmm1
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; CHECK-NEXT: por %xmm0, %xmm1
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; CHECK-NEXT: movdqa %xmm1, %xmm0
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; CHECK-NEXT: psrlw $8, %xmm0
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; CHECK-NEXT: por %xmm1, %xmm0
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; CHECK-NEXT: movd %xmm0, %edx
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; CHECK-NEXT: andb $1, %dl
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: cmpb $1, %dl
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; CHECK-NEXT: sbbl %eax, %eax
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; CHECK-NEXT: orl -72(%rsp,%rcx,4), %eax
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; CHECK-NEXT: retq
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%res = call i32 @llvm.experimental.vector.extract.last.active.v16i32(<16 x i32> %a, <16 x i1> %c, i32 -1)
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@@ -239,9 +233,6 @@ define i8 @extract_last_active_split(<32 x i8> %data, <32 x i8> %mask, i8 %passt
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; CHECK-NEXT: por %xmm3, %xmm4
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; CHECK-NEXT: pxor %xmm5, %xmm5
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; CHECK-NEXT: pcmpeqb %xmm5, %xmm3
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; CHECK-NEXT: pcmpeqd %xmm6, %xmm6
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; CHECK-NEXT: movdqa %xmm3, %xmm7
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; CHECK-NEXT: pxor %xmm6, %xmm7
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; CHECK-NEXT: pcmpeqb %xmm5, %xmm2
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; CHECK-NEXT: movaps %xmm1, -{{[0-9]+}}(%rsp)
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; CHECK-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp)
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@@ -258,6 +249,7 @@ define i8 @extract_last_active_split(<32 x i8> %data, <32 x i8> %mask, i8 %passt
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; CHECK-NEXT: psrlw $8, %xmm2
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; CHECK-NEXT: pmaxub %xmm1, %xmm2
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; CHECK-NEXT: movd %xmm2, %eax
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; CHECK-NEXT: pmovmskb %xmm3, %ecx
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; CHECK-NEXT: pandn %xmm0, %xmm3
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; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm3[2,3,2,3]
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; CHECK-NEXT: pmaxub %xmm3, %xmm0
|
||||
@@ -269,37 +261,15 @@ define i8 @extract_last_active_split(<32 x i8> %data, <32 x i8> %mask, i8 %passt
|
||||
; CHECK-NEXT: movdqa %xmm0, %xmm1
|
||||
; CHECK-NEXT: psrlw $8, %xmm1
|
||||
; CHECK-NEXT: pmaxub %xmm0, %xmm1
|
||||
; CHECK-NEXT: movd %xmm1, %ecx
|
||||
; CHECK-NEXT: addl $16, %ecx
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm7[2,3,2,3]
|
||||
; CHECK-NEXT: pmaxub %xmm7, %xmm0
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
|
||||
; CHECK-NEXT: pmaxub %xmm0, %xmm1
|
||||
; CHECK-NEXT: movdqa %xmm1, %xmm0
|
||||
; CHECK-NEXT: psrld $16, %xmm0
|
||||
; CHECK-NEXT: pmaxub %xmm1, %xmm0
|
||||
; CHECK-NEXT: movdqa %xmm0, %xmm1
|
||||
; CHECK-NEXT: psrlw $8, %xmm1
|
||||
; CHECK-NEXT: pmaxub %xmm0, %xmm1
|
||||
; CHECK-NEXT: movd %xmm1, %edx
|
||||
; CHECK-NEXT: testb $1, %dl
|
||||
; CHECK-NEXT: cmoveq %rax, %rcx
|
||||
; CHECK-NEXT: andl $31, %ecx
|
||||
; CHECK-NEXT: movzbl -40(%rsp,%rcx), %eax
|
||||
; CHECK-NEXT: addl $16, %edx
|
||||
; CHECK-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
|
||||
; CHECK-NEXT: cmoveq %rax, %rdx
|
||||
; CHECK-NEXT: andl $31, %edx
|
||||
; CHECK-NEXT: movzbl -40(%rsp,%rdx), %eax
|
||||
; CHECK-NEXT: pcmpeqb %xmm5, %xmm4
|
||||
; CHECK-NEXT: pxor %xmm6, %xmm4
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm0 = xmm4[2,3,2,3]
|
||||
; CHECK-NEXT: pmaxub %xmm4, %xmm0
|
||||
; CHECK-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
|
||||
; CHECK-NEXT: pmaxub %xmm0, %xmm1
|
||||
; CHECK-NEXT: movdqa %xmm1, %xmm0
|
||||
; CHECK-NEXT: psrld $16, %xmm0
|
||||
; CHECK-NEXT: pmaxub %xmm1, %xmm0
|
||||
; CHECK-NEXT: movdqa %xmm0, %xmm1
|
||||
; CHECK-NEXT: psrlw $8, %xmm1
|
||||
; CHECK-NEXT: pmaxub %xmm0, %xmm1
|
||||
; CHECK-NEXT: movd %xmm1, %ecx
|
||||
; CHECK-NEXT: testb $1, %cl
|
||||
; CHECK-NEXT: pmovmskb %xmm4, %ecx
|
||||
; CHECK-NEXT: cmpl $65535, %ecx # imm = 0xFFFF
|
||||
; CHECK-NEXT: cmovel %edi, %eax
|
||||
; CHECK-NEXT: # kill: def $al killed $al killed $eax
|
||||
; CHECK-NEXT: retq
|
||||
|
||||
@@ -1146,56 +1146,35 @@ define zeroext i1 @PR44781(ptr %0) {
|
||||
}
|
||||
|
||||
define i32 @mask_v3i1(<3 x i32> %a, <3 x i32> %b) {
|
||||
; SSE2-LABEL: mask_v3i1:
|
||||
; SSE2: # %bb.0:
|
||||
; SSE2-NEXT: pcmpeqd %xmm1, %xmm0
|
||||
; SSE2-NEXT: pcmpeqd %xmm1, %xmm1
|
||||
; SSE2-NEXT: pxor %xmm0, %xmm1
|
||||
; SSE2-NEXT: movd %xmm1, %eax
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
|
||||
; SSE2-NEXT: movd %xmm0, %ecx
|
||||
; SSE2-NEXT: orl %eax, %ecx
|
||||
; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
|
||||
; SSE2-NEXT: movd %xmm0, %eax
|
||||
; SSE2-NEXT: orl %ecx, %eax
|
||||
; SSE2-NEXT: testb $1, %al
|
||||
; SSE2-NEXT: je .LBB30_2
|
||||
; SSE2-NEXT: # %bb.1:
|
||||
; SSE2-NEXT: xorl %eax, %eax
|
||||
; SSE2-NEXT: retq
|
||||
; SSE2-NEXT: .LBB30_2:
|
||||
; SSE2-NEXT: movl $1, %eax
|
||||
; SSE2-NEXT: retq
|
||||
;
|
||||
; SSE41-LABEL: mask_v3i1:
|
||||
; SSE41: # %bb.0:
|
||||
; SSE41-NEXT: pcmpeqd %xmm1, %xmm0
|
||||
; SSE41-NEXT: pcmpeqd %xmm1, %xmm1
|
||||
; SSE41-NEXT: pxor %xmm0, %xmm1
|
||||
; SSE41-NEXT: pextrd $1, %xmm1, %eax
|
||||
; SSE41-NEXT: movd %xmm1, %ecx
|
||||
; SSE41-NEXT: orl %eax, %ecx
|
||||
; SSE41-NEXT: pextrd $2, %xmm1, %eax
|
||||
; SSE41-NEXT: orl %ecx, %eax
|
||||
; SSE41-NEXT: testb $1, %al
|
||||
; SSE41-NEXT: je .LBB30_2
|
||||
; SSE41-NEXT: # %bb.1:
|
||||
; SSE41-NEXT: xorl %eax, %eax
|
||||
; SSE41-NEXT: retq
|
||||
; SSE41-NEXT: .LBB30_2:
|
||||
; SSE41-NEXT: movl $1, %eax
|
||||
; SSE41-NEXT: retq
|
||||
; SSE-LABEL: mask_v3i1:
|
||||
; SSE: # %bb.0:
|
||||
; SSE-NEXT: pcmpeqd %xmm1, %xmm0
|
||||
; SSE-NEXT: pcmpeqd %xmm1, %xmm1
|
||||
; SSE-NEXT: pxor %xmm0, %xmm1
|
||||
; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
|
||||
; SSE-NEXT: por %xmm1, %xmm0
|
||||
; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
|
||||
; SSE-NEXT: por %xmm0, %xmm1
|
||||
; SSE-NEXT: movd %xmm1, %eax
|
||||
; SSE-NEXT: testb $1, %al
|
||||
; SSE-NEXT: je .LBB30_2
|
||||
; SSE-NEXT: # %bb.1:
|
||||
; SSE-NEXT: xorl %eax, %eax
|
||||
; SSE-NEXT: retq
|
||||
; SSE-NEXT: .LBB30_2:
|
||||
; SSE-NEXT: movl $1, %eax
|
||||
; SSE-NEXT: retq
|
||||
;
|
||||
; AVX1OR2-LABEL: mask_v3i1:
|
||||
; AVX1OR2: # %bb.0:
|
||||
; AVX1OR2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
|
||||
; AVX1OR2-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
|
||||
; AVX1OR2-NEXT: vpxor %xmm1, %xmm0, %xmm0
|
||||
; AVX1OR2-NEXT: vpextrd $1, %xmm0, %eax
|
||||
; AVX1OR2-NEXT: vmovd %xmm0, %ecx
|
||||
; AVX1OR2-NEXT: orl %eax, %ecx
|
||||
; AVX1OR2-NEXT: vpextrd $2, %xmm0, %eax
|
||||
; AVX1OR2-NEXT: orl %ecx, %eax
|
||||
; AVX1OR2-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
|
||||
; AVX1OR2-NEXT: vpor %xmm1, %xmm0, %xmm1
|
||||
; AVX1OR2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
|
||||
; AVX1OR2-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX1OR2-NEXT: vmovd %xmm0, %eax
|
||||
; AVX1OR2-NEXT: testb $1, %al
|
||||
; AVX1OR2-NEXT: je .LBB30_2
|
||||
; AVX1OR2-NEXT: # %bb.1:
|
||||
|
||||
Reference in New Issue
Block a user