Files
llvm-project/llvm/test/CodeGen/PowerPC/loop-comment.ll
zhijian lin 36cb33bbca support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)
The patch add branch hint for AtomicExpandImpl::expandAtomicCmpXchg, For
example: in PowerPC, it support branch hint as

```
loop:
    lwarx r6,0,r3   #  load and reserve
    cmpw r4,r6      #1st 2 operands equal? bne- exit  #skip if not
    bne- exit       #skip if not
    stwcx. r5,0,r3  #store new value if still res’ved bne- loop #loop if lost reservation
    bne- loop #loop if lost reservation
exit:
    mr  r4,r6       #return value from storage
```

`-`  hints not taken,
`+` hints taken,
2025-09-02 09:33:28 -04:00

23 lines
765 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=powerpc64le-linux-gnu < %s | FileCheck %s -check-prefix=PPC64LE
define void @test(ptr %ptr, i8 %cmp, i8 %val) {
; PPC64LE-LABEL: test:
; PPC64LE: # %bb.0:
; PPC64LE-NEXT: clrlwi 5, 5, 24
; PPC64LE-NEXT: clrlwi 4, 4, 24
; PPC64LE-NEXT: .LBB0_1: # %cmpxchg.start
; PPC64LE-NEXT: #
; PPC64LE-NEXT: lbarx 6, 0, 3
; PPC64LE-NEXT: cmplw 6, 4
; PPC64LE-NEXT: bnelr- 0
; PPC64LE-NEXT: # %bb.2: # %cmpxchg.fencedstore
; PPC64LE-NEXT: #
; PPC64LE-NEXT: stbcx. 5, 0, 3
; PPC64LE-NEXT: bne- 0, .LBB0_1
; PPC64LE-NEXT: # %bb.3: # %cmpxchg.end
; PPC64LE-NEXT: blr
%res = cmpxchg ptr %ptr, i8 %cmp, i8 %val monotonic monotonic
ret void
}