78ff5b55fd
Since we can now build the DeviceRTL with SPIR-V, redo the `XFAIL/UNSUPPORTED` specifications for the tests we see passing/failing on the Level Zero backend with the DeviceRTL being used. The tests marked `UNSUPPORTED` hang or sporadically fail and those are tracked in https://github.com/llvm/llvm-project/issues/182119. This change will allow us to enable CI testing with the DeviceRTL. Here are the full test results with this change applied, running only the `spirv64-intel` `check-offload` tests: ``` Total Discovered Tests: 453 Unsupported : 206 (45.47%) Passed : 141 (31.13%) Expectedly Failed: 106 (23.40%) ``` 31% is not a bad start. --------- Signed-off-by: Nick Sarnie <nick.sarnie@intel.com>
42 lines
764 B
C++
42 lines
764 B
C++
// RUN: %libomptarget-compilexx-run-and-check-generic
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// REQUIRES: gpu
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#include <cassert>
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#include <iostream>
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int main(int argc, char *argv[]) {
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constexpr const int num_threads = 64, N = 128;
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int array[num_threads] = {0};
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#pragma omp parallel for
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for (int i = 0; i < num_threads; ++i) {
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int tmp[N];
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for (int j = 0; j < N; ++j) {
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tmp[j] = i;
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}
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#pragma omp target teams distribute parallel for map(tofrom : tmp)
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for (int j = 0; j < N; ++j) {
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tmp[j] += j;
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}
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for (int j = 0; j < N; ++j) {
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array[i] += tmp[j];
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}
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}
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// Verify
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for (int i = 0; i < num_threads; ++i) {
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const int ref = (0 + N - 1) * N / 2 + i * N;
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assert(array[i] == ref);
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}
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std::cout << "PASS\n";
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return 0;
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}
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// CHECK: PASS
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