44753d8646
Use concrete `I32` (default) and `I64` (clock64, globaltimer) instead of generic `LLVM_Type` for special-register op results. The dialect verifier now rejects mismatches up-front, and the Python op-binding generator emits the inferred-result form, so callers can write `nvvm.ThreadIdXOp()` with no arguments. Strict tightening: no valid existing IR is rejected.
393 lines
17 KiB
Python
393 lines
17 KiB
Python
# RUN: %PYTHON %s | FileCheck %s
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# This is just a smoke test that the dialect is functional.
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from mlir.ir import *
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from mlir.dialects import nvvm
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from mlir.dialects import llvm
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from mlir.dialects import func
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import mlir.extras.types as T
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from mlir.dialects import arith
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def constructAndPrintInModule(f):
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print("\nTEST:", f.__name__)
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with Context(), Location.unknown():
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module = Module.create()
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with InsertionPoint(module.body):
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f()
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print(module)
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module.operation.verify()
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return f
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# CHECK-LABEL: testSmoke
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@constructAndPrintInModule
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def testSmoke():
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i64 = IntegerType.get_signless(64)
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mat64f32_t = Type.parse(
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"!llvm.struct<(f32, f32, f32, f32, f32, f32, f32, f32, f32, f32, f32, f32, f32, f32, f32, f32)>"
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)
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shape_attr = Attribute.parse("#nvvm.shape<m = 64, n = 32, k = 16>")
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# CHECK-LABEL: func @wgmma_f32_f16_f16(%arg0: i64, %arg1: i64)
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@func.FuncOp.from_py_func(i64, i64)
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def wgmma_f32_f16_f16(desc_a, desc_b):
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# CHECK: nvvm.cp.async.wait.group 5
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nvvm.CpAsyncWaitGroupOp(5)
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# CHECK: %0 = llvm.mlir.undef : [[MAT_T:.*]]
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result = llvm.UndefOp(mat64f32_t)
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# CHECK: %1 = nvvm.wgmma.mma_async %arg0, %arg1, %0, <m = 64, n = 32, k = 16>, D[<f32>, <zero>], A[<f16>, <neg>, <col>], B[<f16>, <neg>, <col>] : [[MAT_T]] -> [[MAT_T]]
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result1 = nvvm.WgmmaMmaAsyncOp(
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results_=mat64f32_t,
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inouts=result,
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descriptorA=desc_a,
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descriptorB=desc_b,
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shape=shape_attr,
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typeA=nvvm.WGMMATypes.f16,
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typeB=nvvm.WGMMATypes.f16,
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typeD=nvvm.WGMMATypes.f32,
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scaleD=nvvm.WGMMAScaleOut.zero,
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scaleA=nvvm.WGMMAScaleIn.neg,
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scaleB=nvvm.WGMMAScaleIn.neg,
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layoutA=nvvm.MMALayout.col,
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layoutB=nvvm.MMALayout.col,
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)
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# CHECK-LABEL: TEST: test_inline_ptx
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# CHECK-LABEL: func.func @my_inline_ptx(
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# CHECK-SAME: %[[arg0:[a-zA-Z0-9_]+]]: f32, %[[arg1:[a-zA-Z0-9_]+]]: f32, %[[arg2:[a-zA-Z0-9_]+]]: i32, %[[arg3:[a-zA-Z0-9_]+]]: i32)
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# CHECK: %[[S0:.+]]:2 = nvvm.inline_ptx
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# CHECK-SAME: ro(%[[arg0]], %[[arg1]] : f32, f32) rw(%[[arg2]], %[[arg3]] : i32, i32) -> f32, f32
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# CHECK: %[[S1:.+]] = arith.addf %[[arg0]], %[[arg1]] : f32
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# CHECK: %[[S2:.+]] = arith.addi %[[arg2]], %[[arg3]] : i32
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# CHECK: %[[S3:.+]] = arith.addf %[[S0]]#0, %[[S0]]#1 : f32
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@constructAndPrintInModule
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def test_inline_ptx():
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i32 = T.i32()
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f32 = T.f32()
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@func.FuncOp.from_py_func(f32, f32, i32, i32)
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def my_inline_ptx(a, b, c, d):
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ptx = r"""
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{
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.reg .pred p;
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setp.ge.s32 p, {$r0}, {$r1};
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selp.s32 {$r0}, {$r0}, {$r1}, p;
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selp.s32 {$r1}, {$r0}, {$r1}, p;
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selp.s32 {$rw0}, {$r0}, {$r1}, p;
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selp.s32 {$rw1}, {$r0}, {$r1}, p;
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}
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"""
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wo0, wo1 = nvvm.inline_ptx(
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read_only_args=[a, b],
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read_write_args=[c, d],
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write_only_args=[f32, f32],
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ptx_code=ptx,
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)
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arith.addf(a, b)
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arith.addi(c, d)
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arith.addf(wo0, wo1)
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@constructAndPrintInModule
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def test_mbarrier_arrive():
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ptr_shared = llvm.PointerType.get(3)
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ptr_cluster = llvm.PointerType.get(7)
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i32 = T.i32()
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@func.FuncOp.from_py_func(ptr_shared, ptr_cluster, i32)
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def mbarrier_arrive_ops(barrier_shared, barrier_cluster, txcount):
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token = nvvm.mbarrier_arrive(barrier_shared)
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nvvm.mbarrier_arrive(barrier_cluster)
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token2 = nvvm.mbarrier_arrive_drop(barrier_shared)
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nvvm.mbarrier_arrive_drop(barrier_cluster)
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token3 = nvvm.mbarrier_arrive_expect_tx(barrier_shared, txcount)
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nvvm.mbarrier_arrive_expect_tx(barrier_cluster, txcount)
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token4 = nvvm.mbarrier_arrive_drop_expect_tx(barrier_shared, txcount)
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nvvm.mbarrier_arrive_drop_expect_tx(barrier_cluster, txcount)
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# CHECK-LABEL: func.func @mbarrier_arrive_ops(
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# CHECK-SAME: %[[SHARED:.*]]: !llvm.ptr<3>, %[[CLUSTER:.*]]: !llvm.ptr<7>, %[[TXCOUNT:.*]]: i32)
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# CHECK: %{{.*}} = nvvm.mbarrier.arrive %[[SHARED]] : !llvm.ptr<3> -> i64
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# CHECK-NEXT: nvvm.mbarrier.arrive %[[CLUSTER]] : !llvm.ptr<7>{{$}}
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# CHECK-NEXT: %{{.*}} = nvvm.mbarrier.arrive_drop %[[SHARED]] : !llvm.ptr<3> -> i64
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# CHECK-NEXT: nvvm.mbarrier.arrive_drop %[[CLUSTER]] : !llvm.ptr<7>{{$}}
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# CHECK-NEXT: %{{.*}} = nvvm.mbarrier.arrive.expect_tx %[[SHARED]], %[[TXCOUNT]] : !llvm.ptr<3>, i32 -> i64
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# CHECK-NEXT: nvvm.mbarrier.arrive.expect_tx %[[CLUSTER]], %[[TXCOUNT]] : !llvm.ptr<7>, i32{{$}}
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# CHECK-NEXT: %{{.*}} = nvvm.mbarrier.arrive_drop.expect_tx %[[SHARED]], %[[TXCOUNT]] : !llvm.ptr<3>, i32 -> i64
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# CHECK-NEXT: nvvm.mbarrier.arrive_drop.expect_tx %[[CLUSTER]], %[[TXCOUNT]] : !llvm.ptr<7>, i32{{$}}
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@constructAndPrintInModule
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def test_barriers():
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i32 = T.i32()
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f32 = T.f32()
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@func.FuncOp.from_py_func(i32, i32, f32)
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def barriers(mask, vi32, vf32):
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c0 = arith.constant(T.i32(), 0)
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cffff = arith.constant(T.i32(), 0xFFFF)
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nvvm.barrier(
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barrier_id=c0,
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number_of_threads=cffff,
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)
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pred = arith.constant(T.i32(), 1)
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for reduction in (
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nvvm.BarrierReduction.AND,
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nvvm.BarrierReduction.OR,
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nvvm.BarrierReduction.POPC,
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):
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pred = nvvm.barrier(
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reduction_op=reduction,
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reduction_predicate=pred,
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)
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nvvm.barrier0()
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nvvm.bar_warp_sync(mask)
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nvvm.cluster_arrive()
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nvvm.cluster_arrive(aligned=True)
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nvvm.cluster_arrive_relaxed()
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nvvm.cluster_arrive_relaxed(aligned=True)
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nvvm.cluster_wait()
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nvvm.cluster_wait(aligned=True)
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nvvm.fence_mbarrier_init()
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nvvm.bar_warp_sync(mask)
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return pred
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# CHECK-LABEL: func.func @barriers(
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# CHECK: %[[ARG0:.*]]: i32, %[[ARG1:.*]]: i32, %[[ARG2:.*]]: f32) -> i32 {
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# CHECK: %[[CONSTANT_0:.*]] = arith.constant 0 : i32
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# CHECK: %[[CONSTANT_1:.*]] = arith.constant 65535 : i32
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# CHECK: nvvm.barrier id = %[[CONSTANT_0]] number_of_threads = %[[CONSTANT_1]]
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# CHECK: %[[PRED:.*]] = arith.constant 1 : i32
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# CHECK: %[[BARRIER_1:.*]] = nvvm.barrier #nvvm.reduction<and> %[[PRED]] -> i32
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# CHECK: %[[BARRIER_2:.*]] = nvvm.barrier #nvvm.reduction<or> %[[BARRIER_1]] -> i32
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# CHECK: %[[BARRIER_3:.*]] = nvvm.barrier #nvvm.reduction<popc> %[[BARRIER_2]] -> i32
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# CHECK: nvvm.barrier0
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# CHECK: nvvm.bar.warp.sync %[[ARG0]] : i32
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# CHECK: nvvm.cluster.arrive
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# CHECK: nvvm.cluster.arrive {aligned}
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# CHECK: nvvm.cluster.arrive.relaxed
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# CHECK: nvvm.cluster.arrive.relaxed {aligned}
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# CHECK: nvvm.cluster.wait
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# CHECK: nvvm.cluster.wait {aligned}
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# CHECK: nvvm.fence.mbarrier.init
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# CHECK: nvvm.bar.warp.sync %[[ARG0]] : i32
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# CHECK: return %[[BARRIER_3]] : i32
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@constructAndPrintInModule
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def test_vote_sync_infer_type():
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i1 = IntegerType.get_signless(1)
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i32 = T.i32()
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@func.FuncOp.from_py_func(i32, i1)
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def vote_sync_ops(mask, pred):
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ballot_res = nvvm.vote_sync(mask, pred, nvvm.VoteSyncKind.ballot)
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any_res = nvvm.vote_sync(mask, pred, nvvm.VoteSyncKind.any)
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all_res = nvvm.vote_sync(mask, pred, nvvm.VoteSyncKind.all)
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uni_res = nvvm.vote_sync(mask, pred, nvvm.VoteSyncKind.uni)
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return ballot_res
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# CHECK-LABEL: func.func @vote_sync_ops(
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# CHECK-SAME: %[[MASK:.*]]: i32, %[[PRED:.*]]: i1) -> i32 {
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# CHECK: %[[BALLOT:.*]] = nvvm.vote.sync ballot %[[MASK]], %[[PRED]] -> i32
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# CHECK: %[[ANY:.*]] = nvvm.vote.sync any %[[MASK]], %[[PRED]] -> i1
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# CHECK: %[[ALL:.*]] = nvvm.vote.sync all %[[MASK]], %[[PRED]] -> i1
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# CHECK: %[[UNI:.*]] = nvvm.vote.sync uni %[[MASK]], %[[PRED]] -> i1
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# CHECK: return %[[BALLOT]] : i32
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@constructAndPrintInModule
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def test_clusterlaunchcontrol_query_cancel_infer_type():
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i128 = IntegerType.get_signless(128)
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@func.FuncOp.from_py_func(i128)
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def query_cancel_ops(response):
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is_canceled = nvvm.clusterlaunchcontrol_query_cancel(
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nvvm.ClusterLaunchControlQueryType.IS_CANCELED,
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response,
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)
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cta_x = nvvm.clusterlaunchcontrol_query_cancel(
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nvvm.ClusterLaunchControlQueryType.GET_FIRST_CTA_ID_X,
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response,
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)
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return cta_x
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# CHECK-LABEL: func.func @query_cancel_ops(
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# CHECK-SAME: %[[RESPONSE:.*]]: i128) -> i32 {
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# CHECK: %{{.*}} = nvvm.clusterlaunchcontrol.query.cancel query = is_canceled, %[[RESPONSE]] : i1
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# CHECK: %[[CTA_X:.*]] = nvvm.clusterlaunchcontrol.query.cancel query = get_first_cta_id_x, %[[RESPONSE]] : i32
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# CHECK: return %[[CTA_X]] : i32
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@constructAndPrintInModule
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def test_match_sync_infer_type():
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i32 = T.i32()
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i64 = IntegerType.get_signless(64)
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@func.FuncOp.from_py_func(i32, i32, i64)
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def match_sync_ops(mask, i32val, i64val):
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any_result = nvvm.match_sync(mask, i32val, nvvm.MatchSyncKind.any)
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all_result = nvvm.match_sync(mask, i32val, nvvm.MatchSyncKind.all)
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return any_result
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# CHECK-LABEL: func.func @match_sync_ops(
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# CHECK-SAME: %[[MASK:.*]]: i32, %[[I32VAL:.*]]: i32, %[[I64VAL:.*]]: i64) -> i32 {
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# CHECK: %[[ANY:.*]] = nvvm.match.sync any %[[MASK]], %[[I32VAL]] : i32 -> i32
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# CHECK: %[[ALL:.*]] = nvvm.match.sync all %[[MASK]], %[[I32VAL]] : i32 -> !llvm.struct<(i32, i1)>
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# CHECK: return %[[ANY]] : i32
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@constructAndPrintInModule
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def test_shfl_sync_infer_type():
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i32 = T.i32()
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f32 = T.f32()
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@func.FuncOp.from_py_func(i32, i32, f32, i32, i32)
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def shfl_sync_ops(mask, i32val, f32val, offset, clamp):
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i32_result = nvvm.shfl_sync(mask, i32val, offset, clamp, nvvm.ShflKind.bfly)
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f32_result = nvvm.shfl_sync(mask, f32val, offset, clamp, nvvm.ShflKind.bfly)
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struct_result = nvvm.shfl_sync(
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mask,
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i32val,
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offset,
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clamp,
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nvvm.ShflKind.bfly,
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return_value_and_is_valid=True,
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)
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return i32_result
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# CHECK-LABEL: func.func @shfl_sync_ops(
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# CHECK-SAME: %[[MASK:.*]]: i32, %[[I32VAL:.*]]: i32, %[[F32VAL:.*]]: f32, %[[OFF:.*]]: i32, %[[CLAMP:.*]]: i32) -> i32 {
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# CHECK: %[[I32R:.*]] = nvvm.shfl.sync bfly %[[MASK]], %[[I32VAL]], %[[OFF]], %[[CLAMP]] : i32 -> i32
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# CHECK: %[[F32R:.*]] = nvvm.shfl.sync bfly %[[MASK]], %[[F32VAL]], %[[OFF]], %[[CLAMP]] : f32 -> f32
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# CHECK: %[[STRUCT:.*]] = nvvm.shfl.sync bfly %[[MASK]], %[[I32VAL]], %[[OFF]], %[[CLAMP]] {return_value_and_is_valid} : i32 -> !llvm.struct<(i32, i1)>
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# CHECK: return %[[I32R]] : i32
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@constructAndPrintInModule
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def test_ldmatrix_infer_type():
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ptr_shared = llvm.PointerType.get(3)
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shape_8x8 = Attribute.parse("#nvvm.ld_st_matrix_shape<m = 8, n = 8>")
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elt_b16 = Attribute.parse("#nvvm.ld_st_matrix_elt_type<b16>")
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@func.FuncOp.from_py_func(ptr_shared)
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def ldmatrix_ops(ptr):
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r1 = nvvm.ldmatrix(
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ptr,
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num=1,
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layout=nvvm.MMALayout.row,
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shape=shape_8x8,
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elt_type=elt_b16,
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)
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r4 = nvvm.ldmatrix(
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ptr,
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num=4,
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layout=nvvm.MMALayout.row,
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shape=shape_8x8,
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elt_type=elt_b16,
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)
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return r1
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# CHECK-LABEL: func.func @ldmatrix_ops(
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# CHECK-SAME: %[[PTR:.*]]: !llvm.ptr<3>) -> i32 {
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# CHECK: %[[R1:.*]] = nvvm.ldmatrix %[[PTR]] {{.*}}num = 1{{.*}} : (!llvm.ptr<3>) -> i32
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# CHECK: %[[R4:.*]] = nvvm.ldmatrix %[[PTR]] {{.*}}num = 4{{.*}} : (!llvm.ptr<3>) -> !llvm.struct<(i32, i32, i32, i32)>
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# CHECK: return %[[R1]] : i32
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@constructAndPrintInModule
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def test_reductions():
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i32 = T.i32()
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f32 = T.f32()
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@func.FuncOp.from_py_func(i32, i32, f32)
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def reductions(mask, vi32, vf32):
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for abs in (True, False):
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for nan in (True, False):
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for kind in (
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nvvm.ReductionKind.AND,
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nvvm.ReductionKind.MAX,
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nvvm.ReductionKind.MIN,
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nvvm.ReductionKind.OR,
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nvvm.ReductionKind.UMAX,
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nvvm.ReductionKind.UMIN,
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nvvm.ReductionKind.XOR,
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):
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nvvm.redux_sync(vi32, kind, vi32)
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for kind in (
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nvvm.ReductionKind.FMIN,
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nvvm.ReductionKind.FMAX,
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):
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nvvm.redux_sync(vf32, kind, vi32, abs=abs, nan=nan)
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# CHECK-LABEL: func.func @reductions(
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# CHECK: %[[ARG0:.*]]: i32, %[[ARG1:.*]]: i32, %[[ARG2:.*]]: f32) {
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# CHECK: %[[REDUX_0:.*]] = nvvm.redux.sync and %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_1:.*]] = nvvm.redux.sync max %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_2:.*]] = nvvm.redux.sync min %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_3:.*]] = nvvm.redux.sync or %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_4:.*]] = nvvm.redux.sync umax %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_5:.*]] = nvvm.redux.sync umin %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_6:.*]] = nvvm.redux.sync xor %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_7:.*]] = nvvm.redux.sync fmin %[[ARG2]], %[[ARG1]] {abs = true, nan = true} : f32 -> f32
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# CHECK: %[[REDUX_8:.*]] = nvvm.redux.sync fmax %[[ARG2]], %[[ARG1]] {abs = true, nan = true} : f32 -> f32
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# CHECK: %[[REDUX_9:.*]] = nvvm.redux.sync and %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_10:.*]] = nvvm.redux.sync max %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_11:.*]] = nvvm.redux.sync min %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_12:.*]] = nvvm.redux.sync or %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_13:.*]] = nvvm.redux.sync umax %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_14:.*]] = nvvm.redux.sync umin %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_15:.*]] = nvvm.redux.sync xor %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_16:.*]] = nvvm.redux.sync fmin %[[ARG2]], %[[ARG1]] {abs = true} : f32 -> f32
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# CHECK: %[[REDUX_17:.*]] = nvvm.redux.sync fmax %[[ARG2]], %[[ARG1]] {abs = true} : f32 -> f32
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# CHECK: %[[REDUX_18:.*]] = nvvm.redux.sync and %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_19:.*]] = nvvm.redux.sync max %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_20:.*]] = nvvm.redux.sync min %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_21:.*]] = nvvm.redux.sync or %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_22:.*]] = nvvm.redux.sync umax %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_23:.*]] = nvvm.redux.sync umin %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_24:.*]] = nvvm.redux.sync xor %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_25:.*]] = nvvm.redux.sync fmin %[[ARG2]], %[[ARG1]] {nan = true} : f32 -> f32
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# CHECK: %[[REDUX_26:.*]] = nvvm.redux.sync fmax %[[ARG2]], %[[ARG1]] {nan = true} : f32 -> f32
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# CHECK: %[[REDUX_27:.*]] = nvvm.redux.sync and %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_28:.*]] = nvvm.redux.sync max %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_29:.*]] = nvvm.redux.sync min %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_30:.*]] = nvvm.redux.sync or %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_31:.*]] = nvvm.redux.sync umax %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_32:.*]] = nvvm.redux.sync umin %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_33:.*]] = nvvm.redux.sync xor %[[ARG1]], %[[ARG1]] : i32 -> i32
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# CHECK: %[[REDUX_34:.*]] = nvvm.redux.sync fmin %[[ARG2]], %[[ARG1]] : f32 -> f32
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# CHECK: %[[REDUX_35:.*]] = nvvm.redux.sync fmax %[[ARG2]], %[[ARG1]] : f32 -> f32
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# CHECK: return
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# CHECK: }
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# CHECK-LABEL: TEST: testSpecialRegisterInferredResults
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@constructAndPrintInModule
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def testSpecialRegisterInferredResults():
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# CHECK: %{{.*}} = nvvm.read.ptx.sreg.tid.x : i32
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nvvm.ThreadIdXOp()
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# CHECK: %{{.*}} = nvvm.read.ptx.sreg.clock : i32
|
|
nvvm.ClockOp()
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|
# CHECK: %{{.*}} = nvvm.read.ptx.sreg.clock64 : i64
|
|
nvvm.Clock64Op()
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# CHECK: %{{.*}} = nvvm.read.ptx.sreg.globaltimer : i64
|
|
nvvm.GlobalTimerOp()
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