fddc2c05b8
When >1 predecessors of BB are identical, try to merge them into ONE. --- Here is a simplified example (`sink` and `bb*`s share the same predecessor `entry`, hindering the existing uncond br folding to optimize such a case): ```diff - entry: - switch to %br1, %br2, %br3, %sink - bb1: - br label %sink - bb2: - br label %sink - bb3: - br label %sink - sink: - %ret = phi i8 [ 0, %bb1 ], [ 0, %bb2 ], [ 0, %bb3 ], [ -1, %entry ] + entry: + switch to %br1, %sink + bb1: + br label %sink + sink: + %ret = phi i8 [ 0, %bb1 ], [ -1, %entry ] ``` Actually, `simplifyDuplicateSwitchArms` did similar things in a very limited scope (only for switch arms), this patch generalizes its logic to handle any BB with >1 identical predecessors. --- This PR lands the [discussion](https://github.com/dtcxzyw/llvm-opt-benchmark/pull/3033#discussion_r2506973226), i.e., "merge identical predecessor bottom to up", and implements the suggestion of https://github.com/llvm/llvm-project/pull/114262#issuecomment-2448140669. - IR diff: https://github.com/dtcxzyw/llvm-opt-benchmark/pull/3537 - CompTime Impact: https://github.com/dtcxzyw/llvm-opt-benchmark/pull/3538
109 lines
4.1 KiB
LLVM
109 lines
4.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 -sink-common-insts -S | FileCheck %s -check-prefix=SIMPLIFY-CFG
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define i8 @test_duplicate_preds_merging(i8 %v1, i8 %v2) {
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; SIMPLIFY-CFG-LABEL: @test_duplicate_preds_merging(
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; SIMPLIFY-CFG-NEXT: entry:
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; SIMPLIFY-CFG-NEXT: switch i8 [[V1:%.*]], label [[EXIT:%.*]] [
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; SIMPLIFY-CFG-NEXT: i8 0, label [[THEN:%.*]]
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; SIMPLIFY-CFG-NEXT: i8 1, label [[ELSE:%.*]]
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; SIMPLIFY-CFG-NEXT: ]
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; SIMPLIFY-CFG: then:
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; SIMPLIFY-CFG-NEXT: switch i8 [[V2:%.*]], label [[EXIT]] [
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; SIMPLIFY-CFG-NEXT: i8 0, label [[ELSE]]
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; SIMPLIFY-CFG-NEXT: i8 1, label [[SWITCH_CASE_1:%.*]]
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; SIMPLIFY-CFG-NEXT: i8 2, label [[SWITCH_CASE_1]]
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; SIMPLIFY-CFG-NEXT: ]
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; SIMPLIFY-CFG: switch.case.1:
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; SIMPLIFY-CFG-NEXT: br label [[EXIT]]
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; SIMPLIFY-CFG: else:
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; SIMPLIFY-CFG-NEXT: br label [[EXIT]]
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; SIMPLIFY-CFG: exit:
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; SIMPLIFY-CFG-NEXT: [[RET:%.*]] = phi i8 [ 0, [[ELSE]] ], [ 2, [[THEN]] ], [ 1, [[SWITCH_CASE_1]] ], [ 3, [[ENTRY:%.*]] ]
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; SIMPLIFY-CFG-NEXT: ret i8 [[RET]]
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;
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entry:
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switch i8 %v1, label %exit [
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i8 0, label %then
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i8 1, label %else
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]
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then: ; preds = %entry
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switch i8 %v2, label %exit [
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i8 0, label %switch.case.0
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i8 1, label %switch.case.1
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i8 2, label %switch.case.2
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]
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switch.case.0: ; preds = %then
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br label %exit
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switch.case.1: ; preds = %then
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br label %exit
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switch.case.2: ; preds = %then
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br label %exit
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else: ; preds = %entry
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br label %exit
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exit: ; preds = %else, %switch.case.2, %switch.case.1, %switch.case.0, %then, %entry
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%ret = phi i8 [ 0, %else ], [ 0, %switch.case.0 ], [ 1, %switch.case.1 ], [ 1, %switch.case.2 ], [ 2, %then ], [ 3, %entry ]
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ret i8 %ret
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}
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define i8 @test_no_merge_address_taken(i8 %v1, i8 %v2, ptr %p) {
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; SIMPLIFY-CFG-LABEL: @test_no_merge_address_taken(
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; SIMPLIFY-CFG-NEXT: entry:
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; SIMPLIFY-CFG-NEXT: store ptr blockaddress(@test_no_merge_address_taken, [[SWITCH_CASE_0:%.*]]), ptr [[P:%.*]], align 8
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; SIMPLIFY-CFG-NEXT: switch i8 [[V1:%.*]], label [[EXIT:%.*]] [
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; SIMPLIFY-CFG-NEXT: i8 0, label [[THEN:%.*]]
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; SIMPLIFY-CFG-NEXT: i8 1, label [[ELSE:%.*]]
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; SIMPLIFY-CFG-NEXT: ]
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; SIMPLIFY-CFG: then:
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; SIMPLIFY-CFG-NEXT: switch i8 [[V2:%.*]], label [[EXIT]] [
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; SIMPLIFY-CFG-NEXT: i8 0, label [[SWITCH_CASE_0]]
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; SIMPLIFY-CFG-NEXT: i8 1, label [[SWITCH_CASE_1:%.*]]
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; SIMPLIFY-CFG-NEXT: i8 2, label [[SWITCH_CASE_1]]
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; SIMPLIFY-CFG-NEXT: ]
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; SIMPLIFY-CFG: switch.case.0:
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; SIMPLIFY-CFG-NEXT: br label [[EXIT]]
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; SIMPLIFY-CFG: switch.case.1:
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; SIMPLIFY-CFG-NEXT: br label [[EXIT]]
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; SIMPLIFY-CFG: else:
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; SIMPLIFY-CFG-NEXT: br label [[EXIT]]
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; SIMPLIFY-CFG: exit:
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; SIMPLIFY-CFG-NEXT: [[RET:%.*]] = phi i8 [ 0, [[ELSE]] ], [ 0, [[SWITCH_CASE_0]] ], [ 1, [[SWITCH_CASE_1]] ], [ 3, [[ENTRY:%.*]] ], [ 2, [[THEN]] ]
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; SIMPLIFY-CFG-NEXT: ret i8 [[RET]]
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;
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entry:
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store ptr blockaddress(@test_no_merge_address_taken, %switch.case.0), ptr %p
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switch i8 %v1, label %exit [
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i8 0, label %then
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i8 1, label %else
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]
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then: ; preds = %entry
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switch i8 %v2, label %exit [
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i8 0, label %switch.case.0
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i8 1, label %switch.case.1
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i8 2, label %switch.case.2
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]
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switch.case.0: ; preds = %then
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br label %exit
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switch.case.1: ; preds = %then
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br label %exit
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switch.case.2: ; preds = %then
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br label %exit
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else: ; preds = %entry
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br label %exit
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exit: ; preds = %else, %switch.case.2, %switch.case.1, %switch.case.0, %then, %entry
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%ret = phi i8 [ 0, %else ], [ 0, %switch.case.0 ], [ 1, %switch.case.1 ], [ 1, %switch.case.2 ], [ 2, %then ], [ 3, %entry ]
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ret i8 %ret
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}
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