6ecbc0c96e
Canonicalize GEP source element types from `%T` to `[sizeof(%T) x i8]`. This is intended to flush out any remaining places that rely on GEP element types, as part of the `ptradd` migration. The impact of this change is expected to be fairly minimal (we might enable a few more hoist/sink style folds that depend on equal GEP types).
62 lines
2.5 KiB
LLVM
62 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
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; REQUIRES: riscv-registered-target
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; RUN: opt -p 'lto<O3>' -mtriple riscv64 -mattr=+v -S < %s | FileCheck %s
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; Test that BlockFrequencyInfo is invalidated after loop passes, so it's
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; accurate whenever LoopVectorize uses it. LoopVectorizer requires that
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; innermost loop headers have a greater than or equal to frequency than any
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; block it dominates.
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define void @f(i1 %x) !prof !0 {
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; CHECK-LABEL: define void @f(
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; CHECK-SAME: i1 [[X:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {{.*}}{
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: [[DOTSCALAR:%.*]] = xor i1 [[X]], true
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; CHECK-NEXT: [[TMP1:%.*]] = insertelement <vscale x 2 x i1> poison, i1 [[DOTSCALAR]], i64 0
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; CHECK-NEXT: [[TMP2:%.*]] = shufflevector <vscale x 2 x i1> [[TMP1]], <vscale x 2 x i1> poison, <vscale x 2 x i32> zeroinitializer
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[EVL_BASED_IV:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_EVL_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[AVL:%.*]] = phi i64 [ 65, %[[ENTRY]] ], [ [[AVL_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.experimental.get.vector.length.i64(i64 [[AVL]], i32 2, i1 true)
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr [8 x i8], ptr null, i64 [[EVL_BASED_IV]]
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; CHECK-NEXT: call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> poison, ptr align 8 [[TMP4]], <vscale x 2 x i1> [[TMP2]], i32 [[TMP3]])
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; CHECK-NEXT: call void @llvm.vp.store.nxv2i64.p0(<vscale x 2 x i64> poison, ptr align 8 [[TMP4]], <vscale x 2 x i1> [[TMP2]], i32 [[TMP3]])
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; CHECK-NEXT: [[TMP5:%.*]] = zext nneg i32 [[TMP3]] to i64
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; CHECK-NEXT: [[INDEX_EVL_NEXT]] = add nuw i64 [[EVL_BASED_IV]], [[TMP5]]
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; CHECK-NEXT: [[AVL_NEXT]] = sub nuw nsw i64 [[AVL]], [[TMP5]]
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; CHECK-NEXT: [[TMP6:%.*]] = icmp eq i64 [[AVL_NEXT]], 0
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; CHECK-NEXT: br i1 [[TMP6]], label %[[EXIT:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP1:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ %iv.next, %latch ], [ 0, %entry ]
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%gep = getelementptr i64, ptr null, i64 %iv
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br label %foo
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foo:
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%phi = phi i1 [ false, %loop ], [ true, %baz ]
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br i1 %x, label %baz, label %bar
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bar:
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store i64 0, ptr %gep
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br label %baz
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baz:
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br i1 %phi, label %latch, label %foo
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latch:
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%iv.next = add i64 %iv, 1
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%ec = icmp eq i64 %iv, 64
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br i1 %ec, label %exit, label %loop
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exit:
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ret void
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}
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!0 = !{!"function_entry_count", i64 1}
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