1d9775f684
The canonical form preferred by instcombine is to use 64-bit values for the index when it is a constant. We should try to do the same where possible in the loop vectoriser as this reduces churn in the compiler. It also makes other work easier, such as removing extra unnecessary passes on the RUN line in the test directory which I plan to do afterwards.
141 lines
9.0 KiB
LLVM
141 lines
9.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals none --version 6
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; RUN: opt -S -pass-remarks=loop-vectorize -passes=loop-vectorize -enable-vplan-native-path -force-target-supports-scalable-vectors < %s 2>&1 | FileCheck %s
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; RUN: opt -S -pass-remarks=loop-vectorize -passes=loop-vectorize -enable-vplan-native-path < %s 2>&1 | FileCheck %s -check-prefix=NO_SCALABLE_VECS
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; Test if the vplan-native-path successfully vectorizes a loop using scalable
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; vectors if the target supports scalable vectors and rejects vectorization
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; if a scalable VF is requested but not supported by the target.
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; CHECK: remark: <unknown>:0:0: vectorized outer loop (vectorization width: vscale x 4, interleaved count: 1)
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; NO_SCALABLE_VECS: remark: <unknown>:0:0: loop not vectorized: the scalable user-specified vectorization width for outer-loop vectorization cannot be used because the target does not support scalable vectors.
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@A = external global [1024 x float], align 4
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@B = external global [512 x float], align 4
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define void @foo() {
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; CHECK-LABEL: define void @foo() {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP1:%.*]] = shl nuw i64 [[TMP0]], 2
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; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP1]]
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; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
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; CHECK: [[VECTOR_PH]]:
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; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.vscale.i64()
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; CHECK-NEXT: [[TMP3:%.*]] = shl nuw i64 [[TMP2]], 2
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; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP3]]
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; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 1024, [[N_MOD_VF]]
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; CHECK-NEXT: [[TMP4:%.*]] = call <vscale x 4 x i64> @llvm.stepvector.nxv4i64()
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; CHECK-NEXT: [[DOTSPLATINSERT:%.*]] = insertelement <vscale x 4 x i64> poison, i64 [[TMP3]], i64 0
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; CHECK-NEXT: [[DOTSPLAT:%.*]] = shufflevector <vscale x 4 x i64> [[DOTSPLATINSERT]], <vscale x 4 x i64> poison, <vscale x 4 x i32> zeroinitializer
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[OUTER_LOOP_LATCH4:.*]] ]
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; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 4 x i64> [ [[TMP4]], %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[OUTER_LOOP_LATCH4]] ]
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; CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [1024 x float], ptr @A, i64 0, <vscale x 4 x i64> [[VEC_IND]]
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; CHECK-NEXT: [[WIDE_MASKED_GATHER:%.*]] = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0(<vscale x 4 x ptr> align 4 [[TMP10]], <vscale x 4 x i1> splat (i1 true), <vscale x 4 x float> poison)
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; CHECK-NEXT: br label %[[INNER_LOOP1:.*]]
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; CHECK: [[INNER_LOOP1]]:
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; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <vscale x 4 x i64> [ zeroinitializer, %[[VECTOR_BODY]] ], [ [[TMP13:%.*]], %[[INNER_LOOP1]] ]
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; CHECK-NEXT: [[VEC_PHI2:%.*]] = phi <vscale x 4 x float> [ [[WIDE_MASKED_GATHER]], %[[VECTOR_BODY]] ], [ [[TMP12:%.*]], %[[INNER_LOOP1]] ]
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; CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [512 x float], ptr @B, i64 0, <vscale x 4 x i64> [[VEC_PHI]]
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; CHECK-NEXT: [[WIDE_MASKED_GATHER3:%.*]] = call <vscale x 4 x float> @llvm.masked.gather.nxv4f32.nxv4p0(<vscale x 4 x ptr> align 4 [[TMP11]], <vscale x 4 x i1> splat (i1 true), <vscale x 4 x float> poison)
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; CHECK-NEXT: [[TMP12]] = fmul <vscale x 4 x float> [[VEC_PHI2]], [[WIDE_MASKED_GATHER3]]
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; CHECK-NEXT: [[TMP13]] = add nuw nsw <vscale x 4 x i64> [[VEC_PHI]], splat (i64 1)
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; CHECK-NEXT: [[TMP14:%.*]] = icmp eq <vscale x 4 x i64> [[TMP13]], splat (i64 512)
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; CHECK-NEXT: [[TMP15:%.*]] = extractelement <vscale x 4 x i1> [[TMP14]], i64 0
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; CHECK-NEXT: br i1 [[TMP15]], label %[[OUTER_LOOP_LATCH4]], label %[[INNER_LOOP1]]
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; CHECK: [[OUTER_LOOP_LATCH4]]:
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; CHECK-NEXT: call void @llvm.masked.scatter.nxv4f32.nxv4p0(<vscale x 4 x float> [[TMP12]], <vscale x 4 x ptr> align 4 [[TMP10]], <vscale x 4 x i1> splat (i1 true))
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP3]]
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; CHECK-NEXT: [[VEC_IND_NEXT]] = add nuw nsw <vscale x 4 x i64> [[VEC_IND]], [[DOTSPLAT]]
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; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
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; CHECK-NEXT: br i1 [[TMP20]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[MIDDLE_BLOCK]]:
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; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]]
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; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
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; CHECK: [[SCALAR_PH]]:
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; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
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; CHECK-NEXT: br label %[[OUTER_LOOP:.*]]
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; CHECK: [[OUTER_LOOP]]:
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; CHECK-NEXT: [[I:%.*]] = phi i64 [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ], [ [[I_NEXT:%.*]], %[[OUTER_LOOP_LATCH:.*]] ]
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; CHECK-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [1024 x float], ptr @A, i64 0, i64 [[I]]
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; CHECK-NEXT: [[X_START:%.*]] = load float, ptr [[ARRAYIDX1]], align 4
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; CHECK-NEXT: br label %[[INNER_LOOP:.*]]
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; CHECK: [[INNER_LOOP]]:
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; CHECK-NEXT: [[J:%.*]] = phi i64 [ 0, %[[OUTER_LOOP]] ], [ [[J_NEXT:%.*]], %[[INNER_LOOP]] ]
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; CHECK-NEXT: [[X:%.*]] = phi float [ [[X_START]], %[[OUTER_LOOP]] ], [ [[X_NEXT:%.*]], %[[INNER_LOOP]] ]
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; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [512 x float], ptr @B, i64 0, i64 [[J]]
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; CHECK-NEXT: [[B:%.*]] = load float, ptr [[ARRAYIDX2]], align 4
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; CHECK-NEXT: [[X_NEXT]] = fmul float [[X]], [[B]]
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; CHECK-NEXT: [[J_NEXT]] = add nuw nsw i64 [[J]], 1
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; CHECK-NEXT: [[INNER_EXITCOND:%.*]] = icmp eq i64 [[J_NEXT]], 512
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; CHECK-NEXT: br i1 [[INNER_EXITCOND]], label %[[OUTER_LOOP_LATCH]], label %[[INNER_LOOP]]
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; CHECK: [[OUTER_LOOP_LATCH]]:
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; CHECK-NEXT: [[X_NEXT_LCSSA:%.*]] = phi float [ [[X_NEXT]], %[[INNER_LOOP]] ]
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; CHECK-NEXT: store float [[X_NEXT_LCSSA]], ptr [[ARRAYIDX1]], align 4
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; CHECK-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
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; CHECK-NEXT: [[OUTER_EXITCOND:%.*]] = icmp eq i64 [[I_NEXT]], 1024
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; CHECK-NEXT: br i1 [[OUTER_EXITCOND]], label %[[EXIT]], label %[[OUTER_LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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; NO_SCALABLE_VECS-LABEL: define void @foo() {
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; NO_SCALABLE_VECS-NEXT: [[ENTRY:.*]]:
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; NO_SCALABLE_VECS-NEXT: br label %[[OUTER_LOOP:.*]]
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; NO_SCALABLE_VECS: [[OUTER_LOOP]]:
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; NO_SCALABLE_VECS-NEXT: [[I:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[I_NEXT:%.*]], %[[OUTER_LOOP_LATCH:.*]] ]
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; NO_SCALABLE_VECS-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [1024 x float], ptr @A, i64 0, i64 [[I]]
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; NO_SCALABLE_VECS-NEXT: [[X_START:%.*]] = load float, ptr [[ARRAYIDX1]], align 4
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; NO_SCALABLE_VECS-NEXT: br label %[[INNER_LOOP:.*]]
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; NO_SCALABLE_VECS: [[INNER_LOOP]]:
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; NO_SCALABLE_VECS-NEXT: [[J:%.*]] = phi i64 [ 0, %[[OUTER_LOOP]] ], [ [[J_NEXT:%.*]], %[[INNER_LOOP]] ]
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; NO_SCALABLE_VECS-NEXT: [[X:%.*]] = phi float [ [[X_START]], %[[OUTER_LOOP]] ], [ [[X_NEXT:%.*]], %[[INNER_LOOP]] ]
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; NO_SCALABLE_VECS-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [512 x float], ptr @B, i64 0, i64 [[J]]
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; NO_SCALABLE_VECS-NEXT: [[B:%.*]] = load float, ptr [[ARRAYIDX2]], align 4
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; NO_SCALABLE_VECS-NEXT: [[X_NEXT]] = fmul float [[X]], [[B]]
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; NO_SCALABLE_VECS-NEXT: [[J_NEXT]] = add nuw nsw i64 [[J]], 1
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; NO_SCALABLE_VECS-NEXT: [[INNER_EXITCOND:%.*]] = icmp eq i64 [[J_NEXT]], 512
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; NO_SCALABLE_VECS-NEXT: br i1 [[INNER_EXITCOND]], label %[[OUTER_LOOP_LATCH]], label %[[INNER_LOOP]]
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; NO_SCALABLE_VECS: [[OUTER_LOOP_LATCH]]:
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; NO_SCALABLE_VECS-NEXT: [[X_NEXT_LCSSA:%.*]] = phi float [ [[X_NEXT]], %[[INNER_LOOP]] ]
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; NO_SCALABLE_VECS-NEXT: store float [[X_NEXT_LCSSA]], ptr [[ARRAYIDX1]], align 4
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; NO_SCALABLE_VECS-NEXT: [[I_NEXT]] = add nuw nsw i64 [[I]], 1
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; NO_SCALABLE_VECS-NEXT: [[OUTER_EXITCOND:%.*]] = icmp eq i64 [[I_NEXT]], 1024
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; NO_SCALABLE_VECS-NEXT: br i1 [[OUTER_EXITCOND]], label %[[EXIT:.*]], label %[[OUTER_LOOP]], !llvm.loop [[LOOP0:![0-9]+]]
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; NO_SCALABLE_VECS: [[EXIT]]:
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; NO_SCALABLE_VECS-NEXT: ret void
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;
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entry:
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br label %outer_loop
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outer_loop:
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%i = phi i64 [ 0, %entry ], [ %i.next, %outer_loop_latch ]
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%arrayidx1 = getelementptr inbounds [1024 x float], ptr @A, i64 0, i64 %i
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%x.start = load float, ptr %arrayidx1, align 4
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br label %inner_loop
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inner_loop:
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%j = phi i64 [ 0, %outer_loop ], [ %j.next, %inner_loop ]
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%x = phi float [ %x.start, %outer_loop ], [ %x.next, %inner_loop ]
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%arrayidx2 = getelementptr inbounds [512 x float], ptr @B, i64 0, i64 %j
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%b = load float, ptr %arrayidx2, align 4
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%x.next = fmul float %x, %b
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%j.next = add nuw nsw i64 %j, 1
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%inner_exitcond = icmp eq i64 %j.next, 512
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br i1 %inner_exitcond, label %outer_loop_latch, label %inner_loop
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outer_loop_latch:
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store float %x.next, ptr %arrayidx1, align 4
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%i.next = add nuw nsw i64 %i, 1
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%outer_exitcond = icmp eq i64 %i.next, 1024
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br i1 %outer_exitcond, label %exit, label %outer_loop, !llvm.loop !1
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exit:
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ret void
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}
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!1 = distinct !{!1, !2, !3, !4}
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!2 = !{!"llvm.loop.vectorize.enable", i1 true}
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!3 = !{!"llvm.loop.vectorize.scalable.enable", i1 true}
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!4 = !{!"llvm.loop.vectorize.width", i32 4}
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