3d893f3e23
The instsimplify pass was only giving minor incidental improvements that aren't essential to what is being tested.
85 lines
3.6 KiB
LLVM
85 lines
3.6 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S -passes=loop-vectorize,simplifycfg -force-vector-interleave=1 -force-vector-width=4 -simplifycfg-require-and-preserve-domtree=1 < %s | FileCheck %s
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; Note: -passes=simplifycfg -simplifycfg-require-and-preserve-domtree=1 remove the (now dead) original loop, making
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; it easy to test that the llvm.loop.unroll.disable hint is still present.
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define void @scalar_loop_dead_after_vectorization(ptr nocapture %b) {
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; CHECK-LABEL: define void @scalar_loop_dead_after_vectorization(
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; CHECK-SAME: ptr captures(none) [[B:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]
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; CHECK-NEXT: store <4 x i32> splat (i32 1), ptr [[TMP0]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 16
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; CHECK-NEXT: br i1 [[TMP1]], label %[[EXIT:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%arrayidx = getelementptr inbounds i32, ptr %b, i64 %iv
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store i32 1, ptr %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%ec = icmp eq i64 %iv.next, 16
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br i1 %ec, label %exit, label %loop, !llvm.loop !0
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exit:
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ret void
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}
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define void @scalar_loop_not_dead_after_vectorization(ptr nocapture %b) {
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; CHECK-LABEL: define void @scalar_loop_not_dead_after_vectorization(
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; CHECK-SAME: ptr captures(none) [[B:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*]]:
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; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
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; CHECK: [[VECTOR_BODY]]:
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; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[ENTRY]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[INDEX]]
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; CHECK-NEXT: store <4 x i32> splat (i32 1), ptr [[TMP0]], align 4
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; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[INDEX_NEXT]], 16
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; CHECK-NEXT: br i1 [[TMP1]], label %[[LOOP:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP4:![0-9]+]]
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; CHECK: [[LOOP]]:
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; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[LOOP]] ], [ 16, %[[VECTOR_BODY]] ]
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B]], i64 [[IV]]
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; CHECK-NEXT: store i32 1, ptr [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
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; CHECK-NEXT: [[EC:%.*]] = icmp eq i64 [[IV_NEXT]], 17
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; CHECK-NEXT: br i1 [[EC]], label %[[EXIT:.*]], label %[[LOOP]], !llvm.loop [[LOOP5:![0-9]+]]
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; CHECK: [[EXIT]]:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %loop
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loop:
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%arrayidx = getelementptr inbounds i32, ptr %b, i64 %iv
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store i32 1, ptr %arrayidx, align 4
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%iv.next = add nuw nsw i64 %iv, 1
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%ec = icmp eq i64 %iv.next, 17
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br i1 %ec, label %exit, label %loop, !llvm.loop !0
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exit:
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ret void
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}
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!0 = distinct !{!0, !1}
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!1 = !{!"llvm.loop.unroll.disable"}
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;.
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; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]], [[META3:![0-9]+]]}
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; CHECK: [[META1]] = !{!"llvm.loop.unroll.disable"}
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; CHECK: [[META2]] = !{!"llvm.loop.isvectorized", i32 1}
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; CHECK: [[META3]] = !{!"llvm.loop.unroll.runtime.disable"}
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; CHECK: [[LOOP4]] = distinct !{[[LOOP4]], [[META1]], [[META2]], [[META3]]}
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; CHECK: [[LOOP5]] = distinct !{[[LOOP5]], [[META1]], [[META2]]}
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;.
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