e6d46f16ab
This allows us to strip DerivedIVRecipe::execute, and remove the dependency on emitTransformedIndex. It allows us to benefit from existing simplifications in VPlan.
44 lines
1.4 KiB
LLVM
44 lines
1.4 KiB
LLVM
;RUN: opt < %s -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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;; Check consecutive memory access without preceding GEP instruction
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; for (int i=0; i<len; i++) {
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; *to++ = *from++;
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; }
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; CHECK-LABEL: @consecutive_no_gep(
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; CHECK: vector.body
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; CHECK: %[[index:.*]] = phi i64 [ 0, %vector.ph ]
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; CHECK: %[[offset:.*]] = shl i64 %[[index]], 2
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; CHECK: getelementptr i8, ptr %{{.*}}, i64 %[[offset]]
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; CHECK: load <4 x float>
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define void @consecutive_no_gep(ptr noalias nocapture readonly %from, ptr noalias nocapture %to, i32 %len) #0 {
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entry:
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%cmp2 = icmp sgt i32 %len, 0
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br i1 %cmp2, label %for.body.preheader, label %for.end
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for.body.preheader:
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br label %for.body
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for.body:
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%i.05 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
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%from.addr.04 = phi ptr [ %incdec.ptr, %for.body ], [ %from, %for.body.preheader ]
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%to.addr.03 = phi ptr [ %incdec.ptr1, %for.body ], [ %to, %for.body.preheader ]
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%incdec.ptr = getelementptr inbounds float, ptr %from.addr.04, i64 1
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%val = load float, ptr %from.addr.04, align 4
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%incdec.ptr1 = getelementptr inbounds float, ptr %to.addr.03, i64 1
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store float %val, ptr %to.addr.03, align 4
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%inc = add nsw i32 %i.05, 1
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%cmp = icmp slt i32 %inc, %len
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br i1 %cmp, label %for.body, label %for.end.loopexit
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for.end.loopexit:
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br label %for.end
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for.end:
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ret void
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}
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