efb57947ba
Summary: We support variadic functions in AMDGPU / NVPTX via an LLVM-IR pass. This patch applies the same handling here to support them on this target. I am unsure what the ABI should look like here, I have mostly copied the one we use for NVPTX where it's basically a struct layout with natural alignment. This wastes some space, which is why AMDGPU does not pad them. Additionally, this required allowing the SPIRV_FUNC calling convention. I'm assuming this is compatible with the C calling convention in IR, but I will need someone to confirm that for me.
11 lines
378 B
LLVM
11 lines
378 B
LLVM
; RUN: not llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-vulkan --spirv-ext=+SPV_INTEL_function_pointers < %s 2>&1 | FileCheck %s
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define void @bar() {
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entry:
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call spir_func void (i32, ...) @_Z3fooiz(i32 5, i32 3)
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ret void
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}
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; CHECK:error: {{.*}} in function bar void (): SPIR-V shaders do not support variadic functions
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declare spir_func void @_Z3fooiz(i32, ...)
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