When compiling with `-fembed-bitcode-marker`, Clang inserts a placeholder for the bitcode. This placeholder is a `[0 x i8]` array, which we cannot represent in SPIRV. For AMD flavored SPIRV, we extend the `llvm.embedded.module` global to a `zeroinitializer [1 x i8]` array. To achieve this, this patch adds a new pass, `SPIRVPrepareGlobals`, that we can use to write global variable's _non-trivial-to-lower-IR_ -> _trivial-to-lower-IR_ mappings. This is a second attempt at https://github.com/llvm/llvm-project/pull/162082, but cleaner. In the translator something similar is done for every 0-element array since https://github.com/KhronosGroup/SPIRV-LLVM-Translator/pull/2743 . But I don't think we want to do this mapping for all cases.
33 lines
2.0 KiB
LLVM
33 lines
2.0 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -mtriple=spirv-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -verify-machineinstrs -mtriple=spirv64-amd-amdhsa %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -mtriple=spirv64-amd-amdhsa %s -o - -filetype=obj | spirv-val %}
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;
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; Verify that we can lower the embedded module and cmdline.
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@llvm.embedded.module = private addrspace(1) constant [4 x i8] c"BC\C0\DE", section ".llvmbc", align 1
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@llvm.cmdline = private addrspace(1) constant [5 x i8] c"-cc1\00", section ".llvmcmd", align 1
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@llvm.compiler.used = appending addrspace(1) global [2 x ptr addrspace(4)] [ptr addrspace(4) addrspacecast (ptr addrspace(1) @llvm.embedded.module to ptr addrspace(4)), ptr addrspace(4) addrspacecast (ptr addrspace(1) @llvm.cmdline to ptr addrspace(4))], section "llvm.metadata"
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; CHECK: OpName %[[#LLVM_EMBEDDED_MODULE:]] "llvm.embedded.module"
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; CHECK: OpName %[[#LLVM_CMDLINE:]] "llvm.cmdline"
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; CHECK: OpDecorate %[[#LLVM_EMBEDDED_MODULE]] Constant
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; CHECK: OpDecorate %[[#LLVM_CMDLINE]] Constant
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; CHECK: %[[#UCHAR:]] = OpTypeInt 8 0
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; CHECK: %[[#UINT:]] = OpTypeInt 32 0
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; CHECK: %[[#FIVE:]] = OpConstant %[[#UINT]] 5
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; CHECK: %[[#UCHAR_ARR_5:]] = OpTypeArray %[[#UCHAR]] %[[#FIVE]]
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; CHECK: %[[#FOUR:]] = OpConstant %[[#UINT]] 4
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; CHECK: %[[#UCHAR_ARR_4:]] = OpTypeArray %[[#UCHAR]] %[[#FOUR]]
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; CHECK: %[[#UCHAR_ARR_5_PTR:]] = OpTypePointer CrossWorkgroup %[[#UCHAR_ARR_5]]
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; CHECK: %[[#UCHAR_ARR_4_PTR:]] = OpTypePointer CrossWorkgroup %[[#UCHAR_ARR_4]]
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; CHECK: %[[#CONST_UCHAR_ARR_4:]] = OpConstantComposite %[[#UCHAR_ARR_4]]
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; CHECK: %[[#LLVM_EMBEDDED_MODULE]] = OpVariable %[[#UCHAR_ARR_4_PTR]] CrossWorkgroup %[[#CONST_UCHAR_ARR_4]]
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; CHECK: %[[#CONST_UCHAR_ARR_5:]] = OpConstantComposite %[[#UCHAR_ARR_5]]
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; CHECK: %[[#LLVM_CMDLINE]] = OpVariable %[[#UCHAR_ARR_5_PTR]] CrossWorkgroup %[[#CONST_UCHAR_ARR_5]]
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define spir_kernel void @foo() {
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entry:
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ret void
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}
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