5e0a06b34d
Moving these into the middle-end pipeline will allow for additional optimization of the expansion result, such as CSE of redundant loads (c.f. https://godbolt.org/z/bEna4Md9r). For now, we conservatively place the passes at the end of the middle-end pipeline, so we mostly don't benefit from additional optimizations yet. The pipeline position will be moved in a future change. This builds on work done by legrosbuffle in https://reviews.llvm.org/D60318. --------- Co-authored-by: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
59 lines
2.0 KiB
LLVM
59 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: opt -passes=expand-memcmp -mtriple=powerpc64le-unknown-gnu-linux -mcpu=pwr8 -S < %s | llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-gnu-linux | FileCheck %s -check-prefix=CHECK
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define signext i32 @memcmp8(ptr nocapture readonly %buffer1, ptr nocapture readonly %buffer2) {
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; CHECK-LABEL: memcmp8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: ldbrx 3, 0, 3
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; CHECK-NEXT: ldbrx 4, 0, 4
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; CHECK-NEXT: subc 6, 4, 3
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; CHECK-NEXT: sub 5, 3, 4
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; CHECK-NEXT: subfe 3, 4, 3
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; CHECK-NEXT: subfe 3, 3, 5
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; CHECK-NEXT: extsw 3, 3
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; CHECK-NEXT: blr
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%call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 8)
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ret i32 %call
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}
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define signext i32 @memcmp4(ptr nocapture readonly %buffer1, ptr nocapture readonly %buffer2) {
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; CHECK-LABEL: memcmp4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lwbrx 3, 0, 3
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; CHECK-NEXT: lwbrx 4, 0, 4
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; CHECK-NEXT: subc 6, 4, 3
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; CHECK-NEXT: sub 5, 3, 4
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; CHECK-NEXT: subfe 3, 4, 3
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; CHECK-NEXT: subfe 3, 3, 5
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; CHECK-NEXT: extsw 3, 3
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; CHECK-NEXT: blr
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%call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 4)
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ret i32 %call
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}
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define signext i32 @memcmp2(ptr nocapture readonly %buffer1, ptr nocapture readonly %buffer2) {
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; CHECK-LABEL: memcmp2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lhbrx 3, 0, 3
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; CHECK-NEXT: lhbrx 4, 0, 4
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; CHECK-NEXT: sub 3, 3, 4
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; CHECK-NEXT: extsw 3, 3
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; CHECK-NEXT: blr
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%call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 2)
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ret i32 %call
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}
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define signext i32 @memcmp1(ptr nocapture readonly %buffer1, ptr nocapture readonly %buffer2) {
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; CHECK-LABEL: memcmp1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: lbz 3, 0(3)
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; CHECK-NEXT: lbz 4, 0(4)
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; CHECK-NEXT: sub 3, 3, 4
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; CHECK-NEXT: extsw 3, 3
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; CHECK-NEXT: blr
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%call = tail call signext i32 @memcmp(ptr %buffer1, ptr %buffer2, i64 1) #2
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ret i32 %call
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}
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declare signext i32 @memcmp(ptr, ptr, i64)
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