Files
llvm-project/llvm/test/CodeGen/PowerPC/aix-complex.ll
Simon Pilgrim 61297945ca [NFC][PowerPC] aix-complex.ll - regenerate test checks (#194576)
Makes it easier to show the diffs in the topological dag work
2026-04-28 10:09:56 +00:00

276 lines
9.1 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc-ibm-aix-xcoff < %s | \
; RUN: FileCheck --check-prefixes=CHECK,32BIT %s
; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < %s | \
; RUN: FileCheck --check-prefixes=CHECK,64BIT %s
@gcd = external global { double, double }, align 8
@gcf = external global { float, float }, align 4
@gcfp128 = external global { ppc_fp128, ppc_fp128 }, align 16
declare void @anchor(...)
define dso_local { double, double } @dblCmplxRetCallee() {
; 32BIT-LABEL: dblCmplxRetCallee:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: lwz 4, L..C0(2) # %const.0
; 32BIT-NEXT: lis 3, 16368
; 32BIT-NEXT: stw 3, -16(1)
; 32BIT-NEXT: li 3, 0
; 32BIT-NEXT: lfs 1, 0(4)
; 32BIT-NEXT: lwz 4, L..C1(2) # %const.1
; 32BIT-NEXT: lfs 2, 0(4)
; 32BIT-NEXT: stw 3, -12(1)
; 32BIT-NEXT: stw 3, -4(1)
; 32BIT-NEXT: stw 3, -8(1)
; 32BIT-NEXT: blr
;
; 64BIT-LABEL: dblCmplxRetCallee:
; 64BIT: # %bb.0: # %entry
; 64BIT-NEXT: ld 3, L..C0(2) # %const.0
; 64BIT-NEXT: lfs 1, 0(3)
; 64BIT-NEXT: ld 3, L..C1(2) # %const.1
; 64BIT-NEXT: lfs 2, 0(3)
; 64BIT-NEXT: li 3, 1023
; 64BIT-NEXT: rldic 3, 3, 52, 2
; 64BIT-NEXT: std 3, -16(1)
; 64BIT-NEXT: li 3, 0
; 64BIT-NEXT: std 3, -8(1)
; 64BIT-NEXT: blr
entry:
%retval = alloca { double, double }, align 8
%retval.realp = getelementptr inbounds { double, double }, ptr %retval, i32 0, i32 0
store double 1.000000e+00, ptr %retval.realp, align 8
%retval.imagp = getelementptr inbounds { double, double }, ptr %retval, i32 0, i32 1
store double 0.000000e+00, ptr %retval.imagp, align 8
%0 = load { double, double }, ptr %retval, align 8
ret { double, double } %0
}
define dso_local void @dblCmplxRetCaller() {
; 32BIT-LABEL: dblCmplxRetCaller:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mflr 0
; 32BIT-NEXT: stwu 1, -64(1)
; 32BIT-NEXT: stw 0, 72(1)
; 32BIT-NEXT: bl .dblCmplxRetCallee
; 32BIT-NEXT: lwz 3, L..C2(2) # @gcd
; 32BIT-NEXT: stfd 1, 0(3)
; 32BIT-NEXT: stfd 2, 8(3)
; 32BIT-NEXT: bl .anchor[PR]
; 32BIT-NEXT: nop
; 32BIT-NEXT: addi 1, 1, 64
; 32BIT-NEXT: lwz 0, 8(1)
; 32BIT-NEXT: mtlr 0
; 32BIT-NEXT: blr
;
; 64BIT-LABEL: dblCmplxRetCaller:
; 64BIT: # %bb.0: # %entry
; 64BIT-NEXT: mflr 0
; 64BIT-NEXT: stdu 1, -112(1)
; 64BIT-NEXT: std 0, 128(1)
; 64BIT-NEXT: bl .dblCmplxRetCallee
; 64BIT-NEXT: ld 3, L..C2(2) # @gcd
; 64BIT-NEXT: stfd 1, 0(3)
; 64BIT-NEXT: stfd 2, 8(3)
; 64BIT-NEXT: bl .anchor[PR]
; 64BIT-NEXT: nop
; 64BIT-NEXT: addi 1, 1, 112
; 64BIT-NEXT: ld 0, 16(1)
; 64BIT-NEXT: mtlr 0
; 64BIT-NEXT: blr
entry:
%call = call { double, double } @dblCmplxRetCallee()
%0 = extractvalue { double, double } %call, 0
%1 = extractvalue { double, double } %call, 1
store double %0, ptr @gcd, align 8
store double %1, ptr getelementptr inbounds ({ double, double }, ptr @gcd, i32 0, i32 1), align 8
call void @anchor()
ret void
}
define dso_local { float, float } @fltCmplxRetCallee() {
; 32BIT-LABEL: fltCmplxRetCallee:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: lwz 3, L..C3(2) # %const.0
; 32BIT-NEXT: lfs 1, 0(3)
; 32BIT-NEXT: lwz 3, L..C4(2) # %const.1
; 32BIT-NEXT: lfs 2, 0(3)
; 32BIT-NEXT: lis 3, 16256
; 32BIT-NEXT: stw 3, -8(1)
; 32BIT-NEXT: li 3, 0
; 32BIT-NEXT: stw 3, -4(1)
; 32BIT-NEXT: blr
;
; 64BIT-LABEL: fltCmplxRetCallee:
; 64BIT: # %bb.0: # %entry
; 64BIT-NEXT: ld 3, L..C3(2) # %const.0
; 64BIT-NEXT: lfs 1, 0(3)
; 64BIT-NEXT: ld 3, L..C4(2) # %const.1
; 64BIT-NEXT: lfs 2, 0(3)
; 64BIT-NEXT: li 3, 127
; 64BIT-NEXT: rldic 3, 3, 55, 2
; 64BIT-NEXT: std 3, -8(1)
; 64BIT-NEXT: blr
entry:
%retval = alloca { float, float }, align 4
%retval.realp = getelementptr inbounds { float, float }, ptr %retval, i32 0, i32 0
%retval.imagp = getelementptr inbounds { float, float }, ptr %retval, i32 0, i32 1
store float 1.000000e+00, ptr %retval.realp, align 4
store float 0.000000e+00, ptr %retval.imagp, align 4
%0 = load { float, float }, ptr %retval, align 4
ret { float, float } %0
}
define dso_local void @fltCmplxRetCaller() {
; 32BIT-LABEL: fltCmplxRetCaller:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mflr 0
; 32BIT-NEXT: stwu 1, -64(1)
; 32BIT-NEXT: stw 0, 72(1)
; 32BIT-NEXT: bl .fltCmplxRetCallee
; 32BIT-NEXT: lwz 3, L..C5(2) # @gcf
; 32BIT-NEXT: stfs 1, 0(3)
; 32BIT-NEXT: stfs 2, 4(3)
; 32BIT-NEXT: bl .anchor[PR]
; 32BIT-NEXT: nop
; 32BIT-NEXT: addi 1, 1, 64
; 32BIT-NEXT: lwz 0, 8(1)
; 32BIT-NEXT: mtlr 0
; 32BIT-NEXT: blr
;
; 64BIT-LABEL: fltCmplxRetCaller:
; 64BIT: # %bb.0: # %entry
; 64BIT-NEXT: mflr 0
; 64BIT-NEXT: stdu 1, -112(1)
; 64BIT-NEXT: std 0, 128(1)
; 64BIT-NEXT: bl .fltCmplxRetCallee
; 64BIT-NEXT: ld 3, L..C5(2) # @gcf
; 64BIT-NEXT: stfs 1, 0(3)
; 64BIT-NEXT: stfs 2, 4(3)
; 64BIT-NEXT: bl .anchor[PR]
; 64BIT-NEXT: nop
; 64BIT-NEXT: addi 1, 1, 112
; 64BIT-NEXT: ld 0, 16(1)
; 64BIT-NEXT: mtlr 0
; 64BIT-NEXT: blr
entry:
%call = call { float, float } @fltCmplxRetCallee()
%0 = extractvalue { float, float } %call, 0
%1 = extractvalue { float, float } %call, 1
store float %0, ptr @gcf, align 4
store float %1, ptr getelementptr inbounds ({ float, float }, ptr @gcf, i32 0, i32 1), align 4
call void @anchor()
ret void
}
define dso_local { ppc_fp128, ppc_fp128 } @fp128CmplxRetCallee() {
; 32BIT-LABEL: fp128CmplxRetCallee:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: lis 5, 32766
; 32BIT-NEXT: lis 6, 16382
; 32BIT-NEXT: li 3, -1
; 32BIT-NEXT: li 4, -2
; 32BIT-NEXT: stw 3, -44(1)
; 32BIT-NEXT: ori 5, 5, 65535
; 32BIT-NEXT: ori 6, 6, 65535
; 32BIT-NEXT: stw 3, -48(1)
; 32BIT-NEXT: stw 4, -52(1)
; 32BIT-NEXT: stw 3, -56(1)
; 32BIT-NEXT: stw 3, -36(1)
; 32BIT-NEXT: stw 5, -40(1)
; 32BIT-NEXT: stw 3, -60(1)
; 32BIT-NEXT: stw 6, -64(1)
; 32BIT-NEXT: lfd 2, -48(1)
; 32BIT-NEXT: lfd 4, -56(1)
; 32BIT-NEXT: lfd 1, -40(1)
; 32BIT-NEXT: lfd 3, -64(1)
; 32BIT-NEXT: stw 3, -28(1)
; 32BIT-NEXT: stw 3, -20(1)
; 32BIT-NEXT: stw 3, -24(1)
; 32BIT-NEXT: stw 3, -12(1)
; 32BIT-NEXT: stw 4, -4(1)
; 32BIT-NEXT: stw 3, -8(1)
; 32BIT-NEXT: stw 5, -32(1)
; 32BIT-NEXT: stw 6, -16(1)
; 32BIT-NEXT: blr
;
; 64BIT-LABEL: fp128CmplxRetCallee:
; 64BIT: # %bb.0: # %entry
; 64BIT-NEXT: li 3, -1
; 64BIT-NEXT: std 3, -24(1)
; 64BIT-NEXT: li 3, -3
; 64BIT-NEXT: rldicl 3, 3, 47, 1
; 64BIT-NEXT: std 3, -32(1)
; 64BIT-NEXT: ld 3, L..C6(2) # %const.0
; 64BIT-NEXT: lfd 1, 0(3)
; 64BIT-NEXT: ld 3, L..C7(2) # %const.1
; 64BIT-NEXT: lfd 2, 0(3)
; 64BIT-NEXT: ld 3, L..C8(2) # %const.2
; 64BIT-NEXT: lfd 3, 0(3)
; 64BIT-NEXT: ld 3, L..C9(2) # %const.3
; 64BIT-NEXT: lfd 4, 0(3)
; 64BIT-NEXT: li 3, -2
; 64BIT-NEXT: std 3, -8(1)
; 64BIT-NEXT: li 3, -5
; 64BIT-NEXT: rldicl 3, 3, 46, 2
; 64BIT-NEXT: std 3, -16(1)
; 64BIT-NEXT: blr
entry:
%retval = alloca { ppc_fp128, ppc_fp128 }, align 16
%retval.realp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, ptr %retval, i32 0, i32 0
%retval.imagp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, ptr %retval, i32 0, i32 1
store ppc_fp128 0xM7ffeffffffffffffffffffffffffffff, ptr %retval.realp, align 16
store ppc_fp128 0xM3ffefffffffffffffffffffffffffffe, ptr %retval.imagp, align 16
%0 = load { ppc_fp128, ppc_fp128 }, ptr %retval, align 16
ret { ppc_fp128, ppc_fp128 } %0
}
define dso_local void @fp128CmplxRetCaller() {
; 32BIT-LABEL: fp128CmplxRetCaller:
; 32BIT: # %bb.0: # %entry
; 32BIT-NEXT: mflr 0
; 32BIT-NEXT: stwu 1, -64(1)
; 32BIT-NEXT: stw 0, 72(1)
; 32BIT-NEXT: bl .fp128CmplxRetCallee
; 32BIT-NEXT: lwz 3, L..C6(2) # @gcfp128
; 32BIT-NEXT: stfd 2, 8(3)
; 32BIT-NEXT: stfd 1, 0(3)
; 32BIT-NEXT: stfd 4, 24(3)
; 32BIT-NEXT: stfd 3, 16(3)
; 32BIT-NEXT: bl .anchor[PR]
; 32BIT-NEXT: nop
; 32BIT-NEXT: addi 1, 1, 64
; 32BIT-NEXT: lwz 0, 8(1)
; 32BIT-NEXT: mtlr 0
; 32BIT-NEXT: blr
;
; 64BIT-LABEL: fp128CmplxRetCaller:
; 64BIT: # %bb.0: # %entry
; 64BIT-NEXT: mflr 0
; 64BIT-NEXT: stdu 1, -112(1)
; 64BIT-NEXT: std 0, 128(1)
; 64BIT-NEXT: bl .fp128CmplxRetCallee
; 64BIT-NEXT: ld 3, L..C10(2) # @gcfp128
; 64BIT-NEXT: stfd 2, 8(3)
; 64BIT-NEXT: stfd 1, 0(3)
; 64BIT-NEXT: stfd 4, 24(3)
; 64BIT-NEXT: stfd 3, 16(3)
; 64BIT-NEXT: bl .anchor[PR]
; 64BIT-NEXT: nop
; 64BIT-NEXT: addi 1, 1, 112
; 64BIT-NEXT: ld 0, 16(1)
; 64BIT-NEXT: mtlr 0
; 64BIT-NEXT: blr
entry:
%call = call { ppc_fp128, ppc_fp128 } @fp128CmplxRetCallee()
%0 = extractvalue { ppc_fp128, ppc_fp128 } %call, 0
%1 = extractvalue { ppc_fp128, ppc_fp128 } %call, 1
store ppc_fp128 %0, ptr @gcfp128, align 16
store ppc_fp128 %1, ptr getelementptr inbounds ({ ppc_fp128, ppc_fp128 }, ptr @gcfp128, i32 0, i32 1), align 16
call void @anchor()
ret void
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK: {{.*}}