Files
llvm-project/llvm/test/CodeGen/DirectX/WaveActiveBitOr.ll
Sietze Riemersma 8d0c686c55 [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (#165156)
Adds the WaveActiveBitOr intrinsic from issue #99167. This intrinsic
required a bit more work than the last intrinsics that I have done.

There are some peculiarities, which I verified with dxcompiler:
- WaveActiveBitOr only works on uint and uint64_t, no other types are
allowed
- There is no 16 bit version of WaveActiveBitOr

Followed the checklist:
- [x] Implement WaveActiveBitOr clang builtin,
- [x] Link WaveActiveBitOr clang builtin with hlsl_intrinsics.h
- [x] Add sema checks for WaveActiveBitOr to
CheckHLSLBuiltinFunctionCall in SemaChecking.cpp
- [x] Add codegen for WaveActiveBitOr to EmitHLSLBuiltinExpr in
CGBuiltin.cpp
- [x] Add codegen tests to
clang/test/CodeGenHLSL/builtins/WaveActiveBitOr.hlsl
- [x] Add sema tests to
clang/test/SemaHLSL/BuiltIns/WaveActiveBitOr-errors.hlsl
- [x] Create the int_dx_WaveActiveBitOr intrinsic in
IntrinsicsDirectX.td
- [x] Create the DXILOpMapping of int_dx_WaveActiveBitOr to 120 in
DXIL.td
- [x] Create the WaveActiveBitOr.ll and WaveActiveBitOr_errors.ll tests
in llvm/test/CodeGen/DirectX/
- [x] Create the int_spv_WaveActiveBitOr intrinsic in IntrinsicsSPIRV.td
- [x] In SPIRVInstructionSelector.cpp create the WaveActiveBitOr
lowering and map it to int_spv_WaveActiveBitOr in
SPIRVInstructionSelector::selectIntrinsic.
- [x] Create SPIR-V backend test case in
llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveActiveBitOr.ll

offload test: https://github.com/llvm/offload-test-suite/pull/487
2026-03-10 18:30:37 -04:00

20 lines
611 B
LLVM

; RUN: opt -S -scalarizer -dxil-op-lower -mtriple=dxil-pc-shadermodel6.3-compute %s | FileCheck %s
define noundef i32 @wave_bitor_simple(i32 noundef %p1) {
entry:
; CHECK: call i32 @dx.op.waveActiveBit.i32(i32 120, i32 %p1, i8 1){{$}}
%ret = call i32 @llvm.dx.wave.reduce.or.i32(i32 %p1)
ret i32 %ret
}
declare i32 @llvm.dx.wave.reduce.or.i32(i32)
define noundef i64 @wave_bitor_simple64(i64 noundef %p1) {
entry:
; CHECK: call i64 @dx.op.waveActiveBit.i64(i32 120, i64 %p1, i8 1){{$}}
%ret = call i64 @llvm.dx.wave.reduce.or.i64(i64 %p1)
ret i64 %ret
}
declare i64 @llvm.dx.wave.reduce.or.i64(i64)