03ad3d2e8f
LocalStackSlotAllocation pass disallows negative offsets with respect to a base register. The pass ends up introducing a new register for such frame references. This patch helps LocalStackSlotAlloca to additionally consider the immediate offset of an instruction, when sorting frame refs - hence, avoiding negative offsets and maximizing reuse of the existing registers.
28 lines
1.5 KiB
YAML
28 lines
1.5 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
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# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx950 -run-pass=localstackalloc -o - %s | FileCheck %s
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---
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name: issue155902
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stack:
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- { id: 0, offset: 0, size: 16384, alignment: 4 }
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- { id: 1, offset: 0, size: 16, alignment: 8 }
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- { id: 2, offset: 0, size: 8, alignment: 8 }
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body: |
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bb.0:
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; CHECK-LABEL: name: issue155902
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; CHECK: [[S_MOV_B32_:%[0-9]+]]:sreg_32_xexec_hi = S_MOV_B32 %stack.1
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; CHECK-NEXT: [[V_MOV_B:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
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; CHECK-NEXT: SCRATCH_STORE_DWORDX2_SADDR [[V_MOV_B]], [[S_MOV_B32_]], 8, 0, implicit $exec, implicit $flat_scr
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; CHECK-NEXT: SCRATCH_STORE_DWORDX2_SADDR [[V_MOV_B]], [[S_MOV_B32_]], 0, 0, implicit $exec, implicit $flat_scr
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; CHECK-NEXT: [[V_MOV_B1:%[0-9]+]]:vreg_64_align2 = V_MOV_B64_PSEUDO 900, implicit $exec
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; CHECK-NEXT: SCRATCH_STORE_DWORDX2_SADDR killed [[V_MOV_B1]], [[S_MOV_B32_]], 16, 0, implicit $exec, implicit $flat_scr
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; CHECK-NEXT: S_ENDPGM 0
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%0:vreg_64_align2 = V_MOV_B64_PSEUDO 0, implicit $exec
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SCRATCH_STORE_DWORDX2_SADDR %0, %stack.1, 8, 0, implicit $exec, implicit $flat_scr
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SCRATCH_STORE_DWORDX2_SADDR %0, %stack.1, 0, 0, implicit $exec, implicit $flat_scr
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%1:vreg_64_align2 = V_MOV_B64_PSEUDO 900, implicit $exec
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SCRATCH_STORE_DWORDX2_SADDR killed %1, %stack.2, 0, 0, implicit $exec, implicit $flat_scr
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S_ENDPGM 0
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...
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