Initial support for acquire-release atomics, specified as part of https://github.com/WebAssembly/shared-everything-threads This adds an ordering operand to atomic loads, stores, RMWs, wait/notify, and fences. It currently defaults to 0 and ISel is not updated yet, so atomics produced by the compiler will still always be seqcst. Asm parsing and printing, binary emission and disassembly are all updated. Binary emission will always use the old encoding because the encoding is smaller, and to get backwards compatibility for free.
372 lines
14 KiB
C++
372 lines
14 KiB
C++
//==- WebAssemblyDisassembler.cpp - Disassembler for WebAssembly -*- C++ -*-==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file is part of the WebAssembly Disassembler.
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///
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/// It contains code to translate the data produced by the decoder into
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/// MCInsts.
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///
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/WebAssemblyMCAsmInfo.h"
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#include "MCTargetDesc/WebAssemblyMCTypeUtilities.h"
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#include "TargetInfo/WebAssemblyTargetInfo.h"
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#include "llvm/BinaryFormat/Wasm.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCDisassembler/MCDisassembler.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MCSymbolWasm.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Endian.h"
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#include "llvm/Support/LEB128.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-disassembler"
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using DecodeStatus = MCDisassembler::DecodeStatus;
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#include "WebAssemblyGenDisassemblerTables.inc"
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static constexpr int WebAssemblyInstructionTableSize = 256;
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namespace {
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class WebAssemblyDisassembler final : public MCDisassembler {
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std::unique_ptr<const MCInstrInfo> MCII;
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DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
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ArrayRef<uint8_t> Bytes, uint64_t Address,
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raw_ostream &CStream) const override;
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Expected<bool> onSymbolStart(SymbolInfoTy &Symbol, uint64_t &Size,
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ArrayRef<uint8_t> Bytes,
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uint64_t Address) const override;
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public:
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WebAssemblyDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
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std::unique_ptr<const MCInstrInfo> MCII)
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: MCDisassembler(STI, Ctx), MCII(std::move(MCII)) {}
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};
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} // end anonymous namespace
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static MCDisassembler *createWebAssemblyDisassembler(const Target &T,
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const MCSubtargetInfo &STI,
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MCContext &Ctx) {
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std::unique_ptr<const MCInstrInfo> MCII(T.createMCInstrInfo());
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return new WebAssemblyDisassembler(STI, Ctx, std::move(MCII));
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}
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extern "C" LLVM_ABI LLVM_EXTERNAL_VISIBILITY void
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LLVMInitializeWebAssemblyDisassembler() {
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// Register the disassembler for each target.
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TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget32(),
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createWebAssemblyDisassembler);
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TargetRegistry::RegisterMCDisassembler(getTheWebAssemblyTarget64(),
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createWebAssemblyDisassembler);
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}
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static int nextByte(ArrayRef<uint8_t> Bytes, uint64_t &Size) {
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if (Size >= Bytes.size())
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return -1;
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auto V = Bytes[Size];
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Size++;
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return V;
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}
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static bool nextLEB(int64_t &Val, ArrayRef<uint8_t> Bytes, uint64_t &Size,
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bool Signed) {
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unsigned N = 0;
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const char *Error = nullptr;
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Val = Signed ? decodeSLEB128(Bytes.data() + Size, &N,
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Bytes.data() + Bytes.size(), &Error)
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: static_cast<int64_t>(decodeULEB128(Bytes.data() + Size, &N,
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Bytes.data() + Bytes.size(),
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&Error));
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if (Error)
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return false;
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Size += N;
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return true;
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}
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static bool parseLEBImmediate(MCInst &MI, uint64_t &Size,
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ArrayRef<uint8_t> Bytes, bool Signed) {
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int64_t Val;
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if (!nextLEB(Val, Bytes, Size, Signed))
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return false;
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MI.addOperand(MCOperand::createImm(Val));
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return true;
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}
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template <typename T>
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bool parseImmediate(MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes) {
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if (Size + sizeof(T) > Bytes.size())
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return false;
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T Val =
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support::endian::read<T, llvm::endianness::little>(Bytes.data() + Size);
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Size += sizeof(T);
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if (std::is_floating_point<T>::value) {
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MI.addOperand(
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MCOperand::createDFPImm(bit_cast<uint64_t>(static_cast<double>(Val))));
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} else {
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MI.addOperand(MCOperand::createImm(static_cast<int64_t>(Val)));
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}
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return true;
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}
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Expected<bool> WebAssemblyDisassembler::onSymbolStart(SymbolInfoTy &Symbol,
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uint64_t &Size,
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ArrayRef<uint8_t> Bytes,
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uint64_t Address) const {
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Size = 0;
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if (Symbol.Type == wasm::WASM_SYMBOL_TYPE_SECTION) {
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// Start of a code section: we're parsing only the function count.
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int64_t FunctionCount;
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if (!nextLEB(FunctionCount, Bytes, Size, false))
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return false;
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outs() << " # " << FunctionCount << " functions in section.";
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} else {
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// Parse the start of a single function.
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int64_t BodySize, LocalEntryCount;
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if (!nextLEB(BodySize, Bytes, Size, false) ||
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!nextLEB(LocalEntryCount, Bytes, Size, false))
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return false;
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if (LocalEntryCount) {
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outs() << " .local ";
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for (int64_t I = 0; I < LocalEntryCount; I++) {
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int64_t Count, Type;
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if (!nextLEB(Count, Bytes, Size, false) ||
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!nextLEB(Type, Bytes, Size, false))
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return false;
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for (int64_t J = 0; J < Count; J++) {
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if (I || J)
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outs() << ", ";
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outs() << WebAssembly::anyTypeToString(Type);
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}
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}
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}
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}
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outs() << "\n";
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return true;
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}
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MCDisassembler::DecodeStatus WebAssemblyDisassembler::getInstruction(
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MCInst &MI, uint64_t &Size, ArrayRef<uint8_t> Bytes, uint64_t /*Address*/,
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raw_ostream &CS) const {
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CommentStream = &CS;
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Size = 0;
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int Opc = nextByte(Bytes, Size);
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if (Opc < 0)
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return MCDisassembler::Fail;
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const auto *WasmInst = &InstructionTable0[Opc];
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// If this is a prefix byte, indirect to another table.
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if (WasmInst->ET == ET_Prefix) {
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WasmInst = nullptr;
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// Linear search, so far only 4 entries.
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for (const auto &[Prefix, Table] : PrefixTable) {
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if (Prefix == Opc) {
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WasmInst = Table;
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break;
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}
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}
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if (!WasmInst)
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return MCDisassembler::Fail;
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int64_t PrefixedOpc;
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if (!nextLEB(PrefixedOpc, Bytes, Size, false))
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return MCDisassembler::Fail;
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if (PrefixedOpc < 0 || PrefixedOpc >= WebAssemblyInstructionTableSize)
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return MCDisassembler::Fail;
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WasmInst += PrefixedOpc;
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}
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if (WasmInst->ET == ET_Unused)
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return MCDisassembler::Fail;
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// At this point we must have a valid instruction to decode.
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assert(WasmInst->ET == ET_Instruction);
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MI.setOpcode(WasmInst->Opcode);
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// Parse any operands.
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for (uint8_t OPI = 0; OPI < WasmInst->NumOperands; OPI++) {
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auto OT = OperandTable[WasmInst->OperandStart + OPI];
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switch (OT) {
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// ULEB operands:
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case WebAssembly::OPERAND_BASIC_BLOCK:
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case WebAssembly::OPERAND_LOCAL:
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case WebAssembly::OPERAND_GLOBAL:
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case WebAssembly::OPERAND_FUNCTION32:
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case WebAssembly::OPERAND_TABLE:
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case WebAssembly::OPERAND_OFFSET32:
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case WebAssembly::OPERAND_OFFSET64:
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case WebAssembly::OPERAND_P2ALIGN:
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case WebAssembly::OPERAND_TYPEINDEX:
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case WebAssembly::OPERAND_TAG:
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case MCOI::OPERAND_IMMEDIATE: {
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if (!parseLEBImmediate(MI, Size, Bytes, false))
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return MCDisassembler::Fail;
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if (OT == WebAssembly::OPERAND_P2ALIGN) {
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// The byte that encodes P2align also encodes whether a memory index
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// and/or ordering is present.
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int64_t Val = MI.getOperand(MI.getNumOperands() - 1).getImm();
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if (Val & wasm::WASM_MEMARG_HAS_MEM_ORDER) {
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// Clear the order so we just have the alignment in this operand.
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MI.getOperand(MI.getNumOperands() - 1)
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.setImm(Val & ~wasm::WASM_MEMARG_HAS_MEM_ORDER);
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if (Size >= Bytes.size())
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return MCDisassembler::Fail;
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uint8_t Order = Bytes[Size++];
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// If we have a memory ordering, it must have been preceded by a
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// MEMORDER operand which was added as a placeholder (because we are
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// iterating in MI operand order which has mem order first, but this
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// byte is encoded first).
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assert(OPI > 0 &&
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OperandTable[WasmInst->OperandStart + OPI - 1] ==
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WebAssembly::OPERAND_MEMORDER &&
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"P2ALIGN with memory order not preceded by MEMORDER");
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if (Order == wasm::WASM_MEM_ORDER_RMW_ACQ_REL ||
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Order == wasm::WASM_MEM_ORDER_ACQ_REL)
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MI.getOperand(MI.getNumOperands() - 2)
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.setImm(wasm::WASM_MEM_ORDER_ACQ_REL);
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else
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MI.getOperand(MI.getNumOperands() - 2)
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.setImm(wasm::WASM_MEM_ORDER_SEQ_CST);
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}
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}
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break;
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}
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// SLEB operands:
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case WebAssembly::OPERAND_I32IMM:
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case WebAssembly::OPERAND_I64IMM: {
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if (!parseLEBImmediate(MI, Size, Bytes, true))
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return MCDisassembler::Fail;
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break;
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}
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// block_type operands:
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case WebAssembly::OPERAND_SIGNATURE: {
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int64_t Val;
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uint64_t PrevSize = Size;
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if (!nextLEB(Val, Bytes, Size, true))
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return MCDisassembler::Fail;
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if (Val < 0) {
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// Negative values are single septet value types or empty types
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if (Size != PrevSize + 1) {
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MI.addOperand(
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MCOperand::createImm(int64_t(WebAssembly::BlockType::Invalid)));
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} else {
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MI.addOperand(MCOperand::createImm(Val & 0x7f));
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}
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} else {
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// We don't have access to the signature, so create a symbol without one
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MCSymbol *Sym = getContext().createTempSymbol("typeindex", true);
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auto *WasmSym = static_cast<MCSymbolWasm *>(Sym);
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WasmSym->setType(wasm::WASM_SYMBOL_TYPE_FUNCTION);
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const MCExpr *Expr = MCSymbolRefExpr::create(
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WasmSym, WebAssembly::S_TYPEINDEX, getContext());
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MI.addOperand(MCOperand::createExpr(Expr));
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}
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break;
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}
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// FP operands.
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case WebAssembly::OPERAND_F32IMM: {
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if (!parseImmediate<float>(MI, Size, Bytes))
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return MCDisassembler::Fail;
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break;
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}
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case WebAssembly::OPERAND_F64IMM: {
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if (!parseImmediate<double>(MI, Size, Bytes))
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return MCDisassembler::Fail;
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break;
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}
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// Vector lane operands (not LEB encoded).
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case WebAssembly::OPERAND_VEC_I8IMM: {
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if (!parseImmediate<uint8_t>(MI, Size, Bytes))
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return MCDisassembler::Fail;
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break;
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}
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case WebAssembly::OPERAND_MEMORDER: {
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uint8_t Val;
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if (OPI + 1 < WasmInst->NumOperands &&
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OperandTable[WasmInst->OperandStart + OPI + 1] ==
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WebAssembly::OPERAND_P2ALIGN) {
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// If we have P2ALIGN next, it will be encoded as part of the memarg,
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// which has not been parsed yet. Default to SEQ_CST
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// and we will update it when we parse P2ALIGN if necessary.
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Val = wasm::WASM_MEM_ORDER_SEQ_CST;
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} else {
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// atomic.fence instructions have no p2align operand.
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if (Size >= Bytes.size())
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return MCDisassembler::Fail;
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Val = Bytes[Size++];
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}
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if (Val == wasm::WASM_MEM_ORDER_RMW_ACQ_REL ||
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Val == wasm::WASM_MEM_ORDER_ACQ_REL)
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MI.addOperand(MCOperand::createImm(wasm::WASM_MEM_ORDER_ACQ_REL));
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else
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MI.addOperand(MCOperand::createImm(wasm::WASM_MEM_ORDER_SEQ_CST));
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break;
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}
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case WebAssembly::OPERAND_VEC_I16IMM: {
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if (!parseImmediate<uint16_t>(MI, Size, Bytes))
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return MCDisassembler::Fail;
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break;
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}
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case WebAssembly::OPERAND_VEC_I32IMM: {
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if (!parseImmediate<uint32_t>(MI, Size, Bytes))
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return MCDisassembler::Fail;
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break;
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}
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case WebAssembly::OPERAND_VEC_I64IMM: {
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if (!parseImmediate<uint64_t>(MI, Size, Bytes))
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return MCDisassembler::Fail;
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break;
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}
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case WebAssembly::OPERAND_BRLIST: {
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int64_t TargetTableLen;
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if (!nextLEB(TargetTableLen, Bytes, Size, false))
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return MCDisassembler::Fail;
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for (int64_t I = 0; I < TargetTableLen; I++) {
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if (!parseLEBImmediate(MI, Size, Bytes, false))
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return MCDisassembler::Fail;
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}
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// Default case.
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if (!parseLEBImmediate(MI, Size, Bytes, false))
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return MCDisassembler::Fail;
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break;
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}
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case WebAssembly::OPERAND_CATCH_LIST: {
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if (!parseLEBImmediate(MI, Size, Bytes, false))
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return MCDisassembler::Fail;
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int64_t NumCatches = MI.getOperand(MI.getNumOperands() - 1).getImm();
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for (int64_t I = 0; I < NumCatches; I++) {
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if (!parseImmediate<uint8_t>(MI, Size, Bytes))
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return MCDisassembler::Fail;
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int64_t CatchOpcode = MI.getOperand(MI.getNumOperands() - 1).getImm();
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if (CatchOpcode == wasm::WASM_OPCODE_CATCH ||
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CatchOpcode == wasm::WASM_OPCODE_CATCH_REF) {
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if (!parseLEBImmediate(MI, Size, Bytes, false)) // tag index
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return MCDisassembler::Fail;
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}
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if (!parseLEBImmediate(MI, Size, Bytes, false)) // destination
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return MCDisassembler::Fail;
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}
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break;
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}
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case MCOI::OPERAND_REGISTER:
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// The tablegen header currently does not have any register operands since
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// we use only the stack (_S) instructions.
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// If you hit this that probably means a bad instruction definition in
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// tablegen.
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llvm_unreachable("Register operand in WebAssemblyDisassembler");
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default:
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llvm_unreachable("Unknown operand type in WebAssemblyDisassembler");
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}
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}
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return MCDisassembler::Success;
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}
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