da851db4bb
AIX has "millicode" routines, which are functions loaded at boot time into fixed addresses in kernel memory. This allows them to be customized for the processor. The __memccpy routine is a millicode implementation; we use millicode for the memccpy function instead of a library call to improve performance --------- Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
120 lines
4.2 KiB
C++
120 lines
4.2 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "PPCSelectionDAGInfo.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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#define GET_SDNODE_DESC
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#include "PPCGenSDNodeInfo.inc"
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using namespace llvm;
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PPCSelectionDAGInfo::PPCSelectionDAGInfo()
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: SelectionDAGGenTargetInfo(PPCGenSDNodeInfo) {}
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PPCSelectionDAGInfo::~PPCSelectionDAGInfo() = default;
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const char *PPCSelectionDAGInfo::getTargetNodeName(unsigned Opcode) const {
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switch (static_cast<PPCISD::NodeType>(Opcode)) {
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case PPCISD::GlobalBaseReg:
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return "PPCISD::GlobalBaseReg";
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case PPCISD::SRA_ADDZE:
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return "PPCISD::SRA_ADDZE";
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case PPCISD::READ_TIME_BASE:
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return "PPCISD::READ_TIME_BASE";
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case PPCISD::MFOCRF:
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return "PPCISD::MFOCRF";
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case PPCISD::ANDI_rec_1_EQ_BIT:
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return "PPCISD::ANDI_rec_1_EQ_BIT";
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case PPCISD::ANDI_rec_1_GT_BIT:
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return "PPCISD::ANDI_rec_1_GT_BIT";
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case PPCISD::BDNZ:
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return "PPCISD::BDNZ";
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case PPCISD::BDZ:
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return "PPCISD::BDZ";
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case PPCISD::PPC32_PICGOT:
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return "PPCISD::PPC32_PICGOT";
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case PPCISD::VADD_SPLAT:
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return "PPCISD::VADD_SPLAT";
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}
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return SelectionDAGGenTargetInfo::getTargetNodeName(Opcode);
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}
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void PPCSelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
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const SDNode *N) const {
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switch (N->getOpcode()) {
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default:
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break;
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case PPCISD::DYNAREAOFFSET:
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// invalid number of results; expected 2, got 1
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case PPCISD::TOC_ENTRY:
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// invalid number of results; expected 1, got 2
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case PPCISD::STORE_COND:
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// invalid number of results; expected 2, got 3
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case PPCISD::LD_SPLAT:
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case PPCISD::SEXT_LD_SPLAT:
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case PPCISD::ZEXT_LD_SPLAT:
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// invalid number of operands; expected 2, got 3
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case PPCISD::ST_VSR_SCAL_INT:
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// invalid number of operands; expected 4, got 5
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case PPCISD::XXPERM:
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// operand #1 must have type v2f64, but has type v16i8
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case PPCISD::ACC_BUILD:
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// operand #3 must have type v4i32, but has type v16i8
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case PPCISD::PAIR_BUILD:
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// operand #1 must have type v4i32, but has type v16i8
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return;
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}
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SelectionDAGGenTargetInfo::verifyTargetNode(DAG, N);
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}
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std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForMemccpy(
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SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Dst, SDValue Src,
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SDValue C, SDValue Size, const CallInst *CI) const {
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return DAG.getMemccpy(Chain, dl, Dst, Src, C, Size, CI);
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;
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}
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std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForMemcmp(
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SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2,
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SDValue Op3, const CallInst *CI) const {
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return DAG.getMemcmp(Chain, dl, Op1, Op2, Op3, CI);
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}
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std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForStrcmp(
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SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Op1, SDValue Op2,
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MachinePointerInfo Op1PtrInfo, MachinePointerInfo Op2PtrInfo,
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const CallInst *CI) const {
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return DAG.getStrcmp(Chain, DL, Op1, Op2, CI);
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}
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std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForStrcpy(
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SelectionDAG &DAG, const SDLoc &DL, SDValue Chain, SDValue Dest,
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SDValue Src, MachinePointerInfo DestPtrInfo, MachinePointerInfo SrcPtrInfo,
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bool isStpcpy, const CallInst *CI) const {
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if (isStpcpy)
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return SelectionDAGTargetInfo::EmitTargetCodeForStrcpy(
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DAG, DL, Chain, Dest, Src, DestPtrInfo, SrcPtrInfo, isStpcpy, CI);
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return DAG.getStrcpy(Chain, DL, Dest, Src, CI);
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}
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std::pair<SDValue, SDValue>
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PPCSelectionDAGInfo::EmitTargetCodeForStrlen(SelectionDAG &DAG, const SDLoc &DL,
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SDValue Chain, SDValue Src,
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const CallInst *CI) const {
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return DAG.getStrlen(Chain, DL, Src, CI);
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}
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std::pair<SDValue, SDValue> PPCSelectionDAGInfo::EmitTargetCodeForStrstr(
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SelectionDAG &DAG, const SDLoc &dl, SDValue Chain, SDValue Op1, SDValue Op2,
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const CallInst *CI) const {
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return DAG.getStrstr(Chain, dl, Op1, Op2, CI);
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}
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