This patch replaces LLVM_ATTRIBUTE_UNUSED with [[maybe_unused]] where we do not need to move the position of [[maybe_unused]] within declarations. Notes: - [[maybe_unused]] is a standard feature of C++17. - The compiler is far more lenient about the placement of __attribute__((unused)) than that of [[maybe_unused]]. I'll follow up with another patch to finish up the rest.
442 lines
16 KiB
C++
442 lines
16 KiB
C++
//===-- CSKYDisassembler.cpp - Disassembler for CSKY ----------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the CSKYDisassembler class.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/CSKYBaseInfo.h"
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#include "MCTargetDesc/CSKYMCTargetDesc.h"
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#include "TargetInfo/CSKYTargetInfo.h"
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#include "llvm/ADT/DenseMap.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCDecoder.h"
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#include "llvm/MC/MCDecoderOps.h"
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#include "llvm/MC/MCDisassembler/MCDisassembler.h"
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#include "llvm/MC/MCInst.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/Endian.h"
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using namespace llvm;
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using namespace llvm::MCD;
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#define DEBUG_TYPE "csky-disassembler"
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typedef MCDisassembler::DecodeStatus DecodeStatus;
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namespace {
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class CSKYDisassembler : public MCDisassembler {
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std::unique_ptr<MCInstrInfo const> const MCII;
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mutable StringRef symbolName;
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public:
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CSKYDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
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MCInstrInfo const *MCII);
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DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
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ArrayRef<uint8_t> Bytes, uint64_t Address,
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raw_ostream &CStream) const override;
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};
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} // end anonymous namespace
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CSKYDisassembler::CSKYDisassembler(const MCSubtargetInfo &STI, MCContext &Ctx,
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MCInstrInfo const *MCII)
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: MCDisassembler(STI, Ctx), MCII(MCII) {}
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static MCDisassembler *createCSKYDisassembler(const Target &T,
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const MCSubtargetInfo &STI,
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MCContext &Ctx) {
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return new CSKYDisassembler(STI, Ctx, T.createMCInstrInfo());
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}
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeCSKYDisassembler() {
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TargetRegistry::RegisterMCDisassembler(getTheCSKYTarget(),
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createCSKYDisassembler);
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}
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static const uint16_t GPRDecoderTable[] = {
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CSKY::R0, CSKY::R1, CSKY::R2, CSKY::R3, CSKY::R4, CSKY::R5, CSKY::R6,
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CSKY::R7, CSKY::R8, CSKY::R9, CSKY::R10, CSKY::R11, CSKY::R12, CSKY::R13,
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CSKY::R14, CSKY::R15, CSKY::R16, CSKY::R17, CSKY::R18, CSKY::R19, CSKY::R20,
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CSKY::R21, CSKY::R22, CSKY::R23, CSKY::R24, CSKY::R25, CSKY::R26, CSKY::R27,
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CSKY::R28, CSKY::R29, CSKY::R30, CSKY::R31};
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static const uint16_t GPRPairDecoderTable[] = {
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CSKY::R0_R1, CSKY::R1_R2, CSKY::R2_R3, CSKY::R3_R4, CSKY::R4_R5,
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CSKY::R5_R6, CSKY::R6_R7, CSKY::R7_R8, CSKY::R8_R9, CSKY::R9_R10,
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CSKY::R10_R11, CSKY::R11_R12, CSKY::R12_R13, CSKY::R13_R14, CSKY::R14_R15,
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CSKY::R15_R16, CSKY::R16_R17, CSKY::R17_R18, CSKY::R18_R19, CSKY::R19_R20,
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CSKY::R20_R21, CSKY::R21_R22, CSKY::R22_R23, CSKY::R23_R24, CSKY::R24_R25,
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CSKY::R25_R26, CSKY::R26_R27, CSKY::R27_R28, CSKY::R28_R29, CSKY::R29_R30,
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CSKY::R30_R31, CSKY::R31_R32};
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static const uint16_t FPR32DecoderTable[] = {
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CSKY::F0_32, CSKY::F1_32, CSKY::F2_32, CSKY::F3_32, CSKY::F4_32,
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CSKY::F5_32, CSKY::F6_32, CSKY::F7_32, CSKY::F8_32, CSKY::F9_32,
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CSKY::F10_32, CSKY::F11_32, CSKY::F12_32, CSKY::F13_32, CSKY::F14_32,
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CSKY::F15_32, CSKY::F16_32, CSKY::F17_32, CSKY::F18_32, CSKY::F19_32,
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CSKY::F20_32, CSKY::F21_32, CSKY::F22_32, CSKY::F23_32, CSKY::F24_32,
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CSKY::F25_32, CSKY::F26_32, CSKY::F27_32, CSKY::F28_32, CSKY::F29_32,
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CSKY::F30_32, CSKY::F31_32};
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static const uint16_t FPR64DecoderTable[] = {
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CSKY::F0_64, CSKY::F1_64, CSKY::F2_64, CSKY::F3_64, CSKY::F4_64,
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CSKY::F5_64, CSKY::F6_64, CSKY::F7_64, CSKY::F8_64, CSKY::F9_64,
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CSKY::F10_64, CSKY::F11_64, CSKY::F12_64, CSKY::F13_64, CSKY::F14_64,
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CSKY::F15_64, CSKY::F16_64, CSKY::F17_64, CSKY::F18_64, CSKY::F19_64,
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CSKY::F20_64, CSKY::F21_64, CSKY::F22_64, CSKY::F23_64, CSKY::F24_64,
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CSKY::F25_64, CSKY::F26_64, CSKY::F27_64, CSKY::F28_64, CSKY::F29_64,
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CSKY::F30_64, CSKY::F31_64};
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static const uint16_t FPR128DecoderTable[] = {
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CSKY::F0_128, CSKY::F1_128, CSKY::F2_128, CSKY::F3_128, CSKY::F4_128,
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CSKY::F5_128, CSKY::F6_128, CSKY::F7_128, CSKY::F8_128, CSKY::F9_128,
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CSKY::F10_128, CSKY::F11_128, CSKY::F12_128, CSKY::F13_128, CSKY::F14_128,
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CSKY::F15_128, CSKY::F16_128, CSKY::F17_128, CSKY::F18_128, CSKY::F19_128,
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CSKY::F20_128, CSKY::F21_128, CSKY::F22_128, CSKY::F23_128, CSKY::F24_128,
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CSKY::F25_128, CSKY::F26_128, CSKY::F27_128, CSKY::F28_128, CSKY::F29_128,
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CSKY::F30_128, CSKY::F31_128};
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static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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if (RegNo >= 32)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeFPR32RegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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if (RegNo >= 32)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodesFPR32RegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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if (RegNo >= 16)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[RegNo]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodesFPR64RegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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if (RegNo >= 16)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodesFPR64_VRegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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if (RegNo >= 16)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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if (RegNo >= 32)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[RegNo]));
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return MCDisassembler::Success;
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}
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// TODO
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[[maybe_unused]]
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static DecodeStatus DecodesFPR128RegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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if (RegNo >= 16)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(FPR128DecoderTable[RegNo]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodesGPRRegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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if (RegNo >= 16)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodemGPRRegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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if (RegNo >= 8)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(GPRDecoderTable[RegNo]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeGPRSPRegisterClass(MCInst &Inst,
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const MCDisassembler *Decoder) {
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Inst.addOperand(MCOperand::createReg(CSKY::R14));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeGPRPairRegisterClass(MCInst &Inst, uint64_t RegNo,
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uint64_t Address,
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const MCDisassembler *Decoder) {
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const FeatureBitset &FeatureBits =
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Decoder->getSubtargetInfo().getFeatureBits();
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bool hasHighReg = FeatureBits[CSKY::FeatureHighreg];
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if (RegNo >= 32 || (!hasHighReg && RegNo >= 16))
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(GPRPairDecoderTable[RegNo]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeCARRYRegisterClass(MCInst &Inst,
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const MCDisassembler *Decoder) {
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Inst.addOperand(MCOperand::createReg(CSKY::C));
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return MCDisassembler::Success;
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}
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template <unsigned N, unsigned S>
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static DecodeStatus decodeUImmOperand(MCInst &Inst, uint64_t Imm,
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int64_t Address,
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const MCDisassembler *Decoder) {
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assert(isUInt<N>(Imm) && "Invalid immediate");
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Inst.addOperand(MCOperand::createImm(Imm << S));
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return MCDisassembler::Success;
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}
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template <unsigned N>
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static DecodeStatus decodeOImmOperand(MCInst &Inst, uint64_t Imm,
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int64_t Address,
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const MCDisassembler *Decoder) {
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assert(isUInt<N>(Imm) && "Invalid immediate");
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Inst.addOperand(MCOperand::createImm(Imm + 1));
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeLRW16Imm8(MCInst &Inst, uint64_t Imm, int64_t Address,
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const MCDisassembler *Decoder) {
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assert(isUInt<8>(Imm) && "Invalid immediate");
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if ((Imm >> 7) & 0x1) {
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Inst.addOperand(MCOperand::createImm((Imm & 0x7F) << 2));
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} else {
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uint64_t V = ((Imm ^ 0xFFFFFFFF) & 0xFF);
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Inst.addOperand(MCOperand::createImm(V << 2));
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}
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeJMPIXImmOperand(MCInst &Inst, uint64_t Imm,
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int64_t Address,
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const MCDisassembler *Decoder) {
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assert(isUInt<2>(Imm) && "Invalid immediate");
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if (Imm == 0)
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Inst.addOperand(MCOperand::createImm(16));
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else if (Imm == 1)
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Inst.addOperand(MCOperand::createImm(24));
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else if (Imm == 2)
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Inst.addOperand(MCOperand::createImm(32));
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else if (Imm == 3)
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Inst.addOperand(MCOperand::createImm(40));
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else
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return MCDisassembler::Fail;
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeRegSeqOperand(MCInst &Inst, uint64_t Imm,
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int64_t Address,
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const MCDisassembler *Decoder) {
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assert(isUInt<10>(Imm) && "Invalid immediate");
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auto Imm5 = Imm & 0x1f;
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auto Ry = (Imm >> 5) & 0x1f;
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if (DecodeGPRRegisterClass(Inst, Ry, Address, Decoder) ==
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MCDisassembler::Fail)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(GPRDecoderTable[Ry + Imm5]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeRegSeqOperandF1(MCInst &Inst, uint64_t Imm,
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int64_t Address,
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const MCDisassembler *Decoder) {
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assert(isUInt<10>(Imm) && "Invalid immediate");
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auto Imm5 = Imm & 0x1f;
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auto Ry = (Imm >> 5) & 0x1f;
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if (DecodesFPR32RegisterClass(Inst, Ry, Address, Decoder) ==
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MCDisassembler::Fail)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[Ry + Imm5]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeRegSeqOperandD1(MCInst &Inst, uint64_t Imm,
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int64_t Address,
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const MCDisassembler *Decoder) {
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assert(isUInt<10>(Imm) && "Invalid immediate");
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auto Imm5 = Imm & 0x1f;
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auto Ry = (Imm >> 5) & 0x1f;
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if (DecodesFPR64RegisterClass(Inst, Ry, Address, Decoder) ==
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MCDisassembler::Fail)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[Ry + Imm5]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeRegSeqOperandF2(MCInst &Inst, uint64_t Imm,
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int64_t Address,
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const MCDisassembler *Decoder) {
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assert(isUInt<10>(Imm) && "Invalid immediate");
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auto Imm5 = Imm & 0x1f;
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auto Ry = (Imm >> 5) & 0x1f;
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if (DecodeFPR32RegisterClass(Inst, Ry, Address, Decoder) ==
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MCDisassembler::Fail)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(FPR32DecoderTable[Ry + Imm5]));
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return MCDisassembler::Success;
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}
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static DecodeStatus DecodeRegSeqOperandD2(MCInst &Inst, uint64_t Imm,
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int64_t Address,
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const MCDisassembler *Decoder) {
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assert(isUInt<10>(Imm) && "Invalid immediate");
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auto Imm5 = Imm & 0x1f;
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auto Ry = (Imm >> 5) & 0x1f;
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if (DecodeFPR64RegisterClass(Inst, Ry, Address, Decoder) ==
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MCDisassembler::Fail)
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return MCDisassembler::Fail;
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Inst.addOperand(MCOperand::createReg(FPR64DecoderTable[Ry + Imm5]));
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return MCDisassembler::Success;
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}
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static DecodeStatus decodeImmShiftOpValue(MCInst &Inst, uint64_t Imm,
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int64_t Address,
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const MCDisassembler *Decoder) {
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Inst.addOperand(MCOperand::createImm(Log2_64(Imm)));
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return MCDisassembler::Success;
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}
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template <unsigned N, unsigned S>
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static DecodeStatus decodeSImmOperand(MCInst &Inst, uint64_t Imm,
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int64_t Address,
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const MCDisassembler *Decoder) {
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assert(isUInt<N>(Imm) && "Invalid immediate");
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// Sign-extend the number in the bottom N bits of Imm
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Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm) << S));
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return MCDisassembler::Success;
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}
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#include "CSKYGenDisassemblerTables.inc"
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static bool decodeFPUV3Instruction(MCInst &MI, uint32_t insn, uint64_t Address,
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const MCDisassembler *DisAsm,
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const MCSubtargetInfo &STI) {
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LLVM_DEBUG(dbgs() << "Trying CSKY 32-bit fpuv3 table :\n");
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if (!STI.hasFeature(CSKY::FeatureFPUV3_HF) &&
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!STI.hasFeature(CSKY::FeatureFPUV3_SF) &&
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!STI.hasFeature(CSKY::FeatureFPUV3_DF))
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return false;
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DecodeStatus Result =
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decodeInstruction(DecoderTableFPUV332, MI, insn, Address, DisAsm, STI);
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if (Result == MCDisassembler::Fail) {
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MI.clear();
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return false;
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}
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return true;
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}
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DecodeStatus CSKYDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
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ArrayRef<uint8_t> Bytes,
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uint64_t Address,
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raw_ostream &CS) const {
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uint32_t Insn;
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DecodeStatus Result = MCDisassembler::Fail;
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Insn = support::endian::read16le(Bytes.data());
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if ((Insn >> 14) == 0x3) {
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if (Bytes.size() < 4) {
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Size = 0;
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return MCDisassembler::Fail;
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}
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Insn = (Insn << 16) | support::endian::read16le(&Bytes[2]);
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if (decodeFPUV3Instruction(MI, Insn, Address, this, STI))
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Result = MCDisassembler::Success;
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else {
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LLVM_DEBUG(dbgs() << "Trying CSKY 32-bit table :\n");
|
|
Result = decodeInstruction(DecoderTable32, MI, Insn, Address, this, STI);
|
|
}
|
|
|
|
Size = 4;
|
|
} else {
|
|
if (Bytes.size() < 2) {
|
|
Size = 0;
|
|
return MCDisassembler::Fail;
|
|
}
|
|
LLVM_DEBUG(dbgs() << "Trying CSKY 16-bit table :\n");
|
|
Result = decodeInstruction(DecoderTable16, MI, Insn, Address, this, STI);
|
|
Size = 2;
|
|
}
|
|
|
|
if (MI.getOpcode() == CSKY::INS32) {
|
|
MI.getOperand(3).setImm(MI.getOperand(3).getImm() +
|
|
MI.getOperand(4).getImm());
|
|
}
|
|
|
|
return Result;
|
|
}
|