ad1a45b903
Currently, when SDAG is run on AArch64 and an `optnone` function is encountered, the selector is chosen as FastISel. AArch64 makes use of GlobalISel at O0 and this patch aims to align `optnone` with this functionality. A flag is exposed to enable this functionality for a given backend but, as AArch64 is currently the only backend I could find using GlobalISel at O0 this is the only one with it implemented. This flag is set when the target supports GlobalISel & GlobalISel hasn't been forced by the user, the target machine or by being at an optimisation level lower than `EnableGlobalISelAtO`. If this happens, the GlobalISel passes are included as shown in `llvm/test/CodeGen/AArch64/O3-pipeline.ll` and skipped by IRTranslator for functions not marked as `optnone`. In updating the tests based on this functionality, I found some unused check lines or run lines that mixed SDAG with GlobalISel pass names which have been fixed. --------- Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
125 lines
4.3 KiB
C++
125 lines
4.3 KiB
C++
//===- MachineDominators.cpp - Machine Dominator Calculation --------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements simple dominator construction algorithms for finding
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// forward dominators on machine functions.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/InitializePasses.h"
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#include "llvm/Pass.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/GenericDomTreeConstruction.h"
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using namespace llvm;
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namespace llvm {
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// Always verify dominfo if expensive checking is enabled.
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#ifdef EXPENSIVE_CHECKS
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bool VerifyMachineDomInfo = true;
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#else
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bool VerifyMachineDomInfo = false;
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#endif
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} // namespace llvm
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static cl::opt<bool, true> VerifyMachineDomInfoX(
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"verify-machine-dom-info", cl::location(VerifyMachineDomInfo), cl::Hidden,
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cl::desc("Verify machine dominator info (time consuming)"));
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namespace llvm {
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template class LLVM_EXPORT_TEMPLATE DomTreeNodeBase<MachineBasicBlock>;
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template class LLVM_EXPORT_TEMPLATE
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DominatorTreeBase<MachineBasicBlock, false>; // DomTreeBase
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namespace DomTreeBuilder {
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template LLVM_EXPORT_TEMPLATE void Calculate<MBBDomTree>(MBBDomTree &DT);
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template LLVM_EXPORT_TEMPLATE void
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CalculateWithUpdates<MBBDomTree>(MBBDomTree &DT, MBBUpdates U);
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template LLVM_EXPORT_TEMPLATE void
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InsertEdge<MBBDomTree>(MBBDomTree &DT, MachineBasicBlock *From,
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MachineBasicBlock *To);
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template LLVM_EXPORT_TEMPLATE void
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DeleteEdge<MBBDomTree>(MBBDomTree &DT, MachineBasicBlock *From,
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MachineBasicBlock *To);
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template LLVM_EXPORT_TEMPLATE void
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ApplyUpdates<MBBDomTree>(MBBDomTree &DT, MBBDomTreeGraphDiff &,
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MBBDomTreeGraphDiff *);
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template LLVM_EXPORT_TEMPLATE bool
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Verify<MBBDomTree>(const MBBDomTree &DT, MBBDomTree::VerificationLevel VL);
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} // namespace DomTreeBuilder
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}
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bool MachineDominatorTree::invalidate(
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MachineFunction &, const PreservedAnalyses &PA,
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MachineFunctionAnalysisManager::Invalidator &) {
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// Check whether the analysis, all analyses on machine functions, or the
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// machine function's CFG have been preserved.
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auto PAC = PA.getChecker<MachineDominatorTreeAnalysis>();
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return !PAC.preserved() &&
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!PAC.preservedSet<AllAnalysesOn<MachineFunction>>() &&
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!PAC.preservedSet<CFGAnalyses>();
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}
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AnalysisKey MachineDominatorTreeAnalysis::Key;
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MachineDominatorTreeAnalysis::Result
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MachineDominatorTreeAnalysis::run(MachineFunction &MF,
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MachineFunctionAnalysisManager &) {
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return MachineDominatorTree(MF);
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}
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PreservedAnalyses
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MachineDominatorTreePrinterPass::run(MachineFunction &MF,
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MachineFunctionAnalysisManager &MFAM) {
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OS << "MachineDominatorTree for machine function: " << MF.getName() << '\n';
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MFAM.getResult<MachineDominatorTreeAnalysis>(MF).print(OS);
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return PreservedAnalyses::all();
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}
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char MachineDominatorTreeWrapperPass::ID = 0;
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INITIALIZE_PASS(MachineDominatorTreeWrapperPass, "machinedomtree",
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"MachineDominator Tree Construction", true, true)
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MachineDominatorTreeWrapperPass::MachineDominatorTreeWrapperPass()
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: MachineFunctionPass(ID) {}
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char &llvm::MachineDominatorsID = MachineDominatorTreeWrapperPass::ID;
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bool MachineDominatorTreeWrapperPass::runOnMachineFunction(MachineFunction &F) {
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if (F.empty()) {
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assert(F.getProperties().hasFailedISel() &&
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"Machine function should not be empty unless ISel failed.");
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return false;
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}
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DT = MachineDominatorTree(F);
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return false;
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}
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void MachineDominatorTreeWrapperPass::releaseMemory() { DT.reset(); }
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void MachineDominatorTreeWrapperPass::verifyAnalysis() const {
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if (VerifyMachineDomInfo && DT)
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if (!DT->verify(MachineDominatorTree::VerificationLevel::Basic))
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report_fatal_error("MachineDominatorTree verification failed!");
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}
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void MachineDominatorTreeWrapperPass::print(raw_ostream &OS,
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const Module *) const {
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if (DT)
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DT->print(OS);
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}
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