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llvm-project/lld/ELF/Arch
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Fangrui Song a3ae5b5080 Revert "[lld][AMDGPU] Support R_AMDGPU_ABS32_(LO|HI) relocations" (#191591)
Reverts llvm/llvm-project#191550

Merged without understanding getImplicitAddend and test convention, and
less than 4 hours after a colleague rubber stamping with "I am not ELF
or linker expert but to me looks good."
2026-04-10 21:21:47 -07:00
..
AArch64.cpp
[LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (#183962)
2026-03-31 08:47:54 +05:30
AMDGPU.cpp
Revert "[lld][AMDGPU] Support R_AMDGPU_ABS32_(LO|HI) relocations" (#191591)
2026-04-10 21:21:47 -07:00
ARM.cpp
[LLD][ELF] Skip non-inputsections to avoid invalid cast in Arm BE8 handling (#188154)
2026-04-02 10:16:54 +01:00
AVR.cpp
…
Hexagon.cpp
[ELF] Move Symbol::used to atomic flags field (#190117)
2026-04-01 23:21:13 -07:00
LoongArch.cpp
[lld][ELF] Fix crash when relaxation pass encounters synthetic sections
2026-03-16 10:06:34 +08:00
Mips.cpp
…
MipsArchTree.cpp
…
MSP430.cpp
…
PPC64.cpp
[ELF] Enable parallel relocation scanning for -z nocombreloc and PPC64 (#190309)
2026-04-02 22:00:15 -07:00
PPC.cpp
[ELF] Move PPC32Got2Section into Arch/PPC.cpp (#184383)
2026-03-03 17:18:00 +00:00
PPCInsns.def
…
RISCV.cpp
[lld][ELF] Fix crash when relaxation pass encounters synthetic sections
2026-03-16 10:06:34 +08:00
SPARCV9.cpp
…
SystemZ.cpp
…
TargetImpl.h
…
X86_64.cpp
…
X86.cpp
…
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